JPH09293883A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device which can easily form an electrode having capacitive coupling and can realize a high breakdown voltage, and also to provide a method for fabricating the semiconductor device. SOLUTION: An n-type single crystal silicon substrate 1 is subjected on its one major surface to ion implanting and thermal diffusing processes to form a p-type impurity diffusion region 1a and an n-type high-concentration impurity diffusion region 1b. After that a silicon oxide film 2 is formed and then etched with use of a photoresist layer 3 as a mask to form projections 2a thereon, and then the photoresist 3 is removed. Next, a polysilicon layer 4 is formed, the polysilicon layer 4 on top faces of the projections 2a is etched and removed with use of a photoresist layer 5 as a mask. Subsequently, a silicon oxide film 6 is formed, openings 7a to 7c are made therein with the photoresist as a mask and then the photoresist is removed. Finally, a metallic wiring material 8 is filled into the openings 7a to 7c to form a metallic wiring pattern.

Description

Detailed Description of the Invention

[0001]

The present invention relates to a semiconductor device and a method for manufacturing the same.

[0002]

2. Description of the Related Art FIG. 3 is a schematic sectional view showing a manufacturing process of a lateral diode of a semiconductor device according to a conventional example. A silicon oxide film 2 and a polysilicon layer 4a as an electrode are formed on the n-type single crystal silicon substrate 1 by a plasma CVD method or the like, and a photoresist (not shown) is applied on the polysilicon layer 4a, followed by exposure, The polysilicon layer 4a is patterned into a predetermined shape by developing, and the polysilicon layer 4a is etched using the patterned photoresist as a mask to remove the photoresist by plasma ashing or the like. (FIG. 3 (a)).

Next, a silicon oxide film 2b is formed on the entire surface of the n-type single crystal silicon substrate 1 on which the polysilicon layer 4a is formed by a plasma CVD method or the like.
After applying a photoresist (not shown) on b, it is exposed and developed to be patterned into a predetermined shape,
By etching the silicon oxide film 2b using the patterned photoresist as a mask, the silicon oxide film 2b is patterned into a predetermined shape, and the photoresist is removed by plasma ashing or the like (FIG. 3).
(B)).

Subsequently, a polysilicon layer 4b as an electrode is formed by the plasma CVD method or the like, and the polysilicon layer 4 is formed.
Etching is performed using a photoresist (not shown) patterned on the surface b having a predetermined shape as a mask to pattern the polysilicon layer 4b into a predetermined shape (FIG. 3C), and the photoresist is removed. To do.

Subsequently, a silicon oxide film 6 is formed on the entire surface of the n-type single crystal silicon substrate 1 on which the polysilicon layer 4b is formed by a plasma CVD method or the like (FIG. 3 (d)) and patterned into a predetermined shape. The silicon oxide film 6 is etched by using the photoresist (not shown) as a mask to form the opening 7a, the photoresist is removed, and then the photoresist (not shown) is applied again.
The photoresist 7 is patterned by exposing and developing to a predetermined shape, and the polysilicon layer 4b and the silicon oxide film 2 are etched using the patterned photoresist as a mask to form openings 7b and 7c, and the photoresist is removed. (FIG.3 (e)).

Finally, a lateral diode is manufactured by forming the metal wiring 8 so as to fill the openings 7a to 7c (FIG. 3 (f)).

In this lateral diode, when a high voltage is applied between the two metal wirings 8, the potential distribution in the drift region is equalized by the action of the capacitive coupling of the polysilicon layers 4a and 4b as the opposing electrodes. , Contributed to the high breakdown voltage of the device.

[0008]

However, in the manufacturing process of the lateral diode having the above-mentioned structure, the step of forming the polysilicon layer 4b of the second electrode is more than the manufacturing process of the general lateral diode. And the first layer electrode and 2
There is a problem that the step of forming the silicon oxide film 2b which is the interlayer film between the electrode of the layer is added, the process time becomes long, and the number of masks increases.

The present invention has been made in view of the above points, and an object of the present invention is to easily form an electrode having capacitive coupling and to realize a high breakdown voltage of an element. An object of the present invention is to provide a semiconductor device and a manufacturing method thereof.

[0010]

According to the first aspect of the present invention,
A first conductivity type semiconductor substrate, a first conductivity type high concentration impurity region and a second conductivity type impurity region formed on one main surface of the first conductivity type semiconductor substrate, and one main component of the first conductivity type semiconductor substrate. A first insulating film having a plurality of convex portions formed on the surface, and formed on the first insulating film except for the convex portions so as to have a convex portion in the vicinity of the convex portions. An electrode, a second insulating film formed on the convex portion and the electrode, the first insulating film, the electrode and the second insulating film on the first conductivity type high concentration impurity region and the second conductivity type impurity region And a metal wiring formed so as to fill the opening, the first conductivity type high-concentration impurity region, the electrode, and the second conductivity type being formed through the metal wiring. -Type impurity region and the electrode are connected, and the protrusion is capacitively coupled via the protrusion. It is characterized in that so.

According to a second aspect of the present invention, the first conductivity type high concentration impurity region and the second conductivity type impurity region are formed by performing ion implantation and thermal diffusion at desired positions on the surface of the first conductivity type semiconductor substrate. A first insulating film is formed on one main surface of the first conductive type semiconductor substrate, and the photoresist is used as a mask so that the first conductive type semiconductor substrate is not exposed at a desired position. After forming a convex portion made of the first insulating film by performing anisotropic etching, the photoresist is removed, and an electrode is formed on the entire surface of the first conductivity type semiconductor substrate on which the convex portion is formed. After the electrode on the convex portion is removed by etching using the photoresist as a mask, the photoresist is removed and a second insulating film is formed on the entire surface of the first conductivity type semiconductor substrate on which the electrode is formed. Then, using the photoresist as a mask, an opening is formed in the first insulating film, the electrode, and the second insulating film on the first-conductivity-type high-concentration impurity region and the second-conductivity-type impurity region, and the opening is buried. Metal wiring is formed on the first conductive type high concentration impurity region and the electrode, and the second conductive type impurity region and the electrode are connected through the metal wiring, and the electrode is a protrusion in the vicinity of the convex portion. A protrusion, and the protrusion is capacitively coupled via the protrusion.

According to a third aspect of the present invention, the first conductivity type high concentration impurity region and the second conductivity type impurity region are formed by performing ion implantation and thermal diffusion at desired positions on the surface of the first conductivity type semiconductor substrate. Forming a first insulating film on one main surface of the first conductive type semiconductor substrate, and using a photoresist as a mask to change a desired position of the first insulating film so that the first conductive type semiconductor substrate is not exposed. After forming a convex portion made of the first insulating film by performing anisotropic etching, the photoresist is removed, and an electrode is formed on the entire surface of the first conductivity type semiconductor substrate on which the convex portion is formed. After the electrode on the convex portion is removed by etching using the photoresist as a mask, the photoresist is removed and a second insulating film is formed on the entire surface of the first conductivity type semiconductor substrate on which the electrode is formed. Then, using the photoresist as a mask, an opening is formed in the first insulating film, the electrode, and the second insulating film on the first-conductivity-type high-concentration impurity region and the second-conductivity-type impurity region, and the opening is buried. Metal wiring is formed on the first conductive type high concentration impurity region and the electrode, and the second conductive type impurity region and the electrode are connected through the metal wiring, and the electrode is a protrusion in the vicinity of the convex portion. A protrusion, and the protrusion is capacitively coupled via the protrusion.

According to a fourth aspect of the present invention, in the method of manufacturing a semiconductor device according to the second or third aspect, the opening is formed in the electrode at the same time when the electrode on the protrusion is etched. It is characterized by doing so.

[0014]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a schematic cross-sectional view showing a manufacturing process of a lateral diode of a semiconductor device according to an embodiment of the present invention. First, a photoresist (not shown) is applied on the n-type single crystal silicon substrate 1 and then exposed and developed to form an opening, and the photoresist having the opening is used as a mask for boron (B). ^A p-type impurity diffusion region 1a is formed by ion implantation and thermal diffusion of a p-type impurity such as ⁺ ), and the photoresist is removed by plasma ashing or the like.

Subsequently, a photoresist (not shown) is applied on the n-type single crystal silicon substrate 1 and then exposed and developed to form an opening, and the photoresist having the opening is masked. As a result of performing ion implantation and thermal diffusion of n-type impurities such as high concentration phosphorus (P ⁺ ) as n
The mold high concentration impurity diffusion region 1b is formed, and the photoresist is removed.

Next, a silicon oxide film 2 which is an insulating film is formed on the n-type single crystal silicon substrate 1 (FIG. 1A),
After applying the photoresist 3 on the silicon oxide film 2,
The photoresist 3 is patterned into a predetermined shape by exposure and development, and the isotropic etching of the silicon oxide film 2 is performed by using the patterned photoresist 3 as a mask to form the convex portions 2a made of the silicon oxide film 2.
Is formed (FIG. 1B), and the photoresist 3 is removed by plasma ashing or the like. In this isotropic etching, the surface of the n-type single crystal silicon substrate 1 is not exposed,
Moreover, the convex portion 2a can be formed by etching the silicon oxide film 2 up to the point where the side etching is not connected. Here, as an example of a method of forming the silicon oxide film 2, it can be formed by a plasma CVD method using silane (SiH ₄ ) as a source gas.

Either wet etching or dry etching may be used as the isotropic etching. Further, in the present embodiment, the case where the convex portion 2a is formed by isotropic etching has been described, but the present invention is not limited to this. For example, as shown in FIG. Etching (ReactiveIo
The convex portion 2a may be formed by n Etching (RIE).

The convex portion of the n-type single crystal silicon substrate 1
Polysilicon layer as an electrode on the entire surface on which 2a is formed
4 is formed (FIG. 1C), and the photoresist 5 is applied.
After exposure, it is exposed and developed to form a pattern.
Mask with patterned photoresist 5
Formed on the convex portion 2a by etching as
The removed polysilicon layer 5 is removed (FIG. 1D), and the plasma is removed.
The photoresist 5 is removed by ashing or the like. This
Here, as an example of a method of forming the polysilicon layer 5,
Run (SiH_Four) Is used as a source gas by the low pressure CVD method.
Can be formed, and in this embodiment, the resistance value adjustment
Phosphoryl trichloride (POCl) _Three) Ion injection
Input and heat diffusion. In addition, the polysilicon layer 5
An example of etching is hydrogen fluoride (HF) and nitric acid.
(HNO_ThreeMethod of etching using a mixed solution of
Or CF_ThreeThose who perform etching in Cl gas plasma
There is a law.

Then, a silicon oxide film 6 as an insulating film is formed on the entire surface of the n-type single crystal silicon substrate 1 on which the convex portion 2a is formed by a plasma CVD method or the like (FIG. 1).
(E)) A photoresist (not shown) is applied on the silicon oxide film 6, and then exposed and developed to be patterned into a predetermined shape, and the silicon oxide film 6 is etched using the patterned photoresist as a mask. To form the opening 7a, the photoresist is removed, and then a photoresist (not shown) is applied again, and exposure and development are performed to perform patterning into a predetermined shape, and the patterned photoresist is used as a mask. As a result, the polysilicon layer 4 and the silicon oxide film 2 are etched to form openings 7b and 7c, and the photoresist is removed (FIG. 1 (f)). Here, as an example of an etchant for the silicon oxide films 2 and 6, an HF aqueous solution is used.

Although the openings 7a to 7c are formed after the silicon oxide film 6 is formed in the present embodiment, the invention is not limited to this, and the poly formed on the convex portion 2a may be formed. If the openings 7b are formed at the same time when the silicon layer 4 is removed by etching, the number of masks can be reduced.

Finally, the lateral diode can be manufactured by forming the metal wiring 8 such as aluminum so as to fill the openings 7a to 7c. As an example of a method of forming the metal wiring 8, it is possible to form an aluminum layer by performing sputtering using aluminum as a target and patterning the aluminum layer into a predetermined shape by using a photolithography technique and an etching technique.

Therefore, in this embodiment, the convex portion 2a
By forming the polysilicon layer 4 which is one layer of the electrode, the capacitive coupling structure can be realized and the process time can be shortened.

[0023]

According to the inventions of claims 1 to 3, a first conductivity type semiconductor substrate, a first conductivity type high concentration impurity region and a second conductivity type high concentration impurity region formed on one main surface of the first conductivity type semiconductor substrate are provided. A conductive type impurity region, a first insulating film having a plurality of protrusions formed on one main surface of the first conductive type semiconductor substrate, and a first insulating film having a protrusion in the vicinity of the protrusion An electrode formed on a portion excluding the upper convex portion, a second insulating film formed on the convex portion and the electrode, a first conductive type high concentration impurity region, and a first conductive type impurity region on the first conductive type high concentration impurity region. An insulating film, an electrode, and an opening formed in the second insulating film, and a metal wiring formed so as to fill the opening. The first conductivity type high concentration impurity region and the electrode are formed through the metal wiring. , The second conductivity type impurity region is connected to the electrode, and the protrusion is capacitively coupled via the protrusion. With this configuration, a capacitive coupling structure can be realized by forming a single-layer electrode, an electrode having capacitive coupling can be easily formed, and a high breakdown voltage of an element can be realized, and a semiconductor device thereof. A manufacturing method could be provided.

According to a fourth aspect of the present invention, in the method of manufacturing a semiconductor according to the second or third aspect, when the electrode on the convex portion is etched, an opening is formed in the electrode at the same time. Moreover, the number of masks can be reduced, and the process time and cost can be reduced.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view showing a manufacturing process of a lateral diode of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a schematic cross-sectional view showing a manufacturing process of a lateral diode of a semiconductor device according to another embodiment of the present invention.

FIG. 3 is a schematic cross-sectional view showing a manufacturing process of a lateral diode of a semiconductor device according to a conventional example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 n-type single crystal silicon substrate 1a p-type impurity diffusion region 1b n-type high concentration impurity diffusion region 2 silicon oxide film 2a convex portion 2b silicon oxide film 3 photoresist 4, 4a, 4b polysilicon layer 5 photoresist 6 silicon oxide film 7a to 7c Opening 8 Metal wiring

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Yosuke Hagiwara 1048 Kadoma Kadoma, Osaka Prefecture Matsushita Electric Works, Ltd.

Claims (4)

[Claims] 1. A first-conductivity-type semiconductor substrate, first-conductivity-type high-concentration impurity regions and second-conductivity-type impurity regions formed on one main surface of the first-conductivity-type semiconductor substrate, and the first-conductivity type A first insulating film having a plurality of protrusions formed on one main surface of a semiconductor substrate, and except for the protrusions on the first insulating film so that protrusions are provided in the vicinity of the protrusions. An electrode formed on a concave portion, a second insulating film formed on the convex portion and the electrode, the first insulating film on the first conductivity type high concentration impurity region and the second conductivity type impurity region, and an electrode And an opening formed in the second insulating film, and a metal wiring formed so as to fill the opening, the first conductivity type high concentration impurity region and the electrode via the metal wiring. , The second conductivity type impurity region and the electrode are connected to each other, and the protrusion is provided via the protrusion. A semiconductor device characterized by being capacitively coupled. 2. A first-conductivity-type high-concentration impurity region and a second-conductivity-type impurity region are formed by performing ion implantation and thermal diffusion at a desired position on the surface of the first-conductivity-type semiconductor substrate. A first insulating film is formed on one main surface of a semiconductor substrate, and isotropic etching is performed using a photoresist as a mask so that the first conductive type semiconductor substrate is not exposed at a desired position of the first insulating film. After forming the convex portion formed of the first insulating film by, the photoresist is removed, an electrode is formed on the entire surface of the first conductivity type semiconductor substrate on which the convex portion is formed, and the photoresist is used as a mask. After removing the electrode on the convex portion by etching,
The photoresist is removed, a second insulating film is formed on the entire surface of the first conductivity type semiconductor substrate on which the electrodes are formed, and the first conductivity type high concentration impurity region and the second conductivity are formed using the photoresist as a mask. An opening is formed in the first insulating film, the electrode, and the second insulating film on the type impurity region, a metal wiring is formed so as to fill the opening, and the first conductivity type high concentration is formed through the metal wiring. The impurity region is connected to the electrode, the impurity region of the second conductivity type is connected to the electrode, the electrode has a protrusion in the vicinity of the protrusion, and the protrusion is capacitively coupled via the protrusion. A method of manufacturing a semiconductor device characterized by the above. 3. A first-conductivity-type high-concentration impurity region and a second-conductivity-type impurity region are formed by performing ion implantation and thermal diffusion at desired positions on the surface of the first-conductivity-type semiconductor substrate, A first insulating film is formed on one main surface of the semiconductor substrate, and anisotropic etching is performed by using a photoresist as a mask so that the first conductive type semiconductor substrate is not exposed at a desired position of the first insulating film. After forming the convex portion formed of the first insulating film by, the photoresist is removed, an electrode is formed on the entire surface of the first conductivity type semiconductor substrate on which the convex portion is formed, and the photoresist is used as a mask. After removing the electrode on the convex portion by etching,
The photoresist is removed, a second insulating film is formed on the entire surface of the first conductivity type semiconductor substrate on which the electrodes are formed, and the first conductivity type high concentration impurity region and the second conductivity are formed using the photoresist as a mask. An opening is formed in the first insulating film, the electrode, and the second insulating film on the type impurity region, a metal wiring is formed so as to fill the opening, and the first conductivity type high concentration is formed through the metal wiring. The impurity region is connected to the electrode, the impurity region of the second conductivity type is connected to the electrode, the electrode has a protrusion in the vicinity of the protrusion, and the protrusion is capacitively coupled via the protrusion. A method of manufacturing a semiconductor device characterized by the above. 4. The manufacturing of the semiconductor device according to claim 2, wherein the opening is formed in the electrode at the same time when the electrode on the convex portion is etched. Method.