JPH09293882A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device which can easily form an electrode having capacitive coupling and can realize a high breakdown voltage, and also to provide a method for fabricating the semiconductor device. SOLUTION: An n-type single crystal silicon substrate 1 is subjected on its one major surface to ion implanting and thermal diffusing processes to form a p-type impurity diffusion region 1a and an n-type high-concentration impurity diffusion region 1b, and after that, a silicon oxide film 2 and a silicon nitride film 3 are formed thereon. The silicon nitride film 3 is etched with use of a predetermined shape of pattern made of photoresist 4 as a mask to form projections 3a thereon, and then the photoresist 4 is removed. Next, a polysilicon layer 5 is formed as an electrode, the polysilicon layer 5 formed on top faces of the projections 3a is removed with use of photoresist 6 as a mask, and then the photoresist 6 is removed. Subsequently, a silicon oxide film 7 is formed, openings 8a to 8c are made therein with the photoresist as a mask and then the photoresist is removed. Finally, metallic wiring material 9 is filled into the openings 8a to 8c to form a metallic wiring pattern.

Description

Detailed Description of the Invention

[0001]

The present invention relates to a semiconductor device and a method for manufacturing the same.

[0002]

2. Description of the Related Art FIG. 2 is a schematic sectional view showing a manufacturing process of a lateral diode of a semiconductor device according to a conventional example. A silicon oxide film 2 and a polysilicon layer 5a as an electrode are formed on the n-type single crystal silicon substrate 1 by a plasma CVD method or the like, and a photoresist (not shown) is applied on the polysilicon layer 5a, followed by exposure, The polysilicon layer 5a is patterned into a predetermined shape by developing, and the polysilicon layer 5a is etched using the patterned photoresist as a mask to pattern the polysilicon layer 5a into a predetermined shape, and the photoresist is removed by plasma ashing or the like. (FIG. 2 (a)).

Next, a silicon oxide film 2a is formed on the surface of the n-type single crystal silicon substrate 1 on which the polysilicon layer 5a is formed by a plasma CVD method or the like, and the silicon oxide film 2a is formed.
After applying a photoresist (not shown) on the top, exposing,
The silicon oxide film 2a is patterned into a predetermined shape by developing, and the silicon oxide film 2a is patterned into a predetermined shape by using the patterned photoresist as a mask, and the photoresist is removed by plasma ashing or the like. (Fig. 2
(B)).

Subsequently, a polysilicon layer 5b as an electrode is formed by the plasma CVD method or the like, and the polysilicon layer 5 is formed.
Etching is performed using a photoresist (not shown) patterned on b as a predetermined pattern to form a pattern of the polysilicon layer 5b, and the photoresist is removed (FIG. 2 (c)). ).

Then, a silicon oxide film 7 is formed on the surface of the n-type single crystal silicon substrate 1 on which the polysilicon layer 5b is formed by a plasma CVD method or the like (FIG. 2 (d)) and patterned into a predetermined shape. Photoresist (not shown)
The opening 8a is formed by etching the silicon oxide film 7 using the mask as a mask, the photoresist is removed, a photoresist (not shown) is applied again, and exposure and development are performed to form a pattern into a predetermined shape. Then
By using the patterned photoresist as a mask, the polysilicon layer 5b and the silicon oxide film 2 are etched to form openings 8b and 8c, and the photoresist is removed (FIG. 2E).

Finally, a lateral diode is manufactured by forming a metal wiring 9 so as to fill the openings 8a to 8c.

In this lateral diode, when a high voltage is applied between the two metal wirings 9, the potential distribution in the drift region is equalized by the action of capacitive coupling between the polysilicon layers 5a and 5b serving as the opposing electrodes. , Contributed to the high breakdown voltage of the device.

[0008]

However, in the manufacturing process of the lateral diode having the above-mentioned structure, the step of forming the polysilicon layer 5b of the second electrode is more than the manufacturing process of the general lateral diode. And the first layer electrode and 2
There is a problem that the step of forming the silicon oxide film 2a which is the interlayer film between the electrode of the layer is added, the process time becomes long, and the number of masks increases.

The present invention has been made in view of the above points, and an object of the present invention is to easily form an electrode having capacitive coupling and to realize a high breakdown voltage of an element. An object of the present invention is to provide a semiconductor device and a manufacturing method thereof.

[0010]

According to the first aspect of the present invention,
A first conductivity type semiconductor substrate, first conductivity type high-concentration impurity regions and second conductivity type impurity regions formed separately on one main surface of the first conductivity type semiconductor substrate, and the first conductivity type semiconductor substrate The first insulating film formed on one main surface, a plurality of convex second insulating films formed on the first insulating film, and the first insulating film having a protrusion in the vicinity of the second insulating film. An electrode formed on one insulating film, a second insulating film and a third insulating film formed on the electrode, the first conductive type high concentration impurity region and the first conductive type impurity region on the first conductive type Insulation film,
An opening formed in the electrode and the third insulating film; and a metal wiring formed so as to fill the opening. The first conductivity type high concentration impurity region and the metal wiring are formed through the metal wiring. An electrode, the second conductivity type impurity region and the electrode are connected to each other, and the protrusion is capacitively coupled via the second insulating film.

According to a second aspect of the present invention, the first conductivity type high concentration impurity region and the second conductivity type impurity region are formed by performing ion implantation and thermal diffusion at desired positions on the surface of the first conductivity type semiconductor substrate. Forming a first insulating film and a second insulating film on one main surface of the first conductivity type semiconductor substrate, and using a photoresist as a mask to reach a desired position of the second insulating film to the first insulating film. To form a plurality of protrusions made of the second insulating film, the photoresist is removed, and electrodes are formed on the entire surface of the first conductivity type semiconductor substrate on which the protrusions are formed. Formed, after removing the electrode formed on the convex portion by using the photoresist as a mask by etching, the photoresist is removed, a third insulating film is formed on the convex portion and the electrode,
An opening is formed in the first insulating film, the electrode, and the third insulating film on the first-conductivity-type high-concentration impurity region and the second-conductivity-type impurity region by using a photoresist as a mask, and a metal is formed so as to fill the opening. Wiring is formed, the first conductivity type high concentration impurity region and the electrode are connected through the metal wire, and the second conductivity type impurity region and the electrode are connected, and the electrode has a protrusion in the vicinity of the protrusion. The projection portion is capacitively coupled through the projection portion.

According to a third aspect of the present invention, in the method of manufacturing a semiconductor device according to the second aspect, the opening is formed in the electrode at the same time when the electrode on the protrusion is etched. It is characterized by that.

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a schematic cross-sectional view showing a manufacturing process of a lateral diode of a semiconductor device according to an embodiment of the present invention. First, a photoresist (not shown) is applied on the n-type single crystal silicon substrate 1 and then exposed and developed to form an opening, and the photoresist having the opening is used as a mask for boron (B). ^A p-type impurity diffusion region 1a is formed by ion implantation and thermal diffusion of a p-type impurity such as ⁺ ), and the photoresist is removed by plasma ashing or the like.

Subsequently, a photoresist (not shown) is applied on the n-type single crystal silicon substrate 1 and then exposed and developed to form an opening, and the photoresist having the opening is masked. As a result of performing ion implantation and thermal diffusion of n-type impurities such as high concentration phosphorus (P ⁺ ) as n
The mold high concentration impurity diffusion region 1b is formed, and the photoresist is removed.

Next, a silicon oxide film 2 and a silicon nitride film 3 which are insulating films are formed on the n-type single crystal silicon substrate 1, a photoresist 4 is applied on the silicon nitride film 3, and then exposure and development are performed. Is performed to pattern the photoresist 4 into a predetermined shape (FIG. 1A), and the silicon nitride film 3 is etched using the patterned photoresist 4 as a mask to form the convex portions 3a made of the silicon nitride film 3. It is formed (FIG. 1B), and the photoresist is removed by plasma ashing or the like. Here, as an example of a method of forming the silicon oxide film 2, silane (S
iH ₄ ) can be formed by a plasma CVD method using a source gas, and as an example of a method of forming the silicon nitride film 4, silane (SiH ₄ ) and ammonia (NH ₃ ) can be formed by a plasma CVD method. . An example of a method of etching the silicon nitride film 3 is a method of etching with fluorine radicals in CF ₄ gas plasma.

Then, a polysilicon layer 5 as an electrode is formed on the entire surface of the n-type single crystal silicon substrate 1 on which the convex portions 3a are formed (FIG. 1C), a photoresist 6 is applied, and then exposed. , Development is performed to pattern into a predetermined shape, and the patterned photoresist 6 is used as a mask to perform etching to remove the polysilicon layer 5 formed on the convex portion 3a (FIG. 1 (d)), and plasma. The photoresist 6 is removed by ashing or the like. Here, as an example of a method of forming the polysilicon layer 5, the polysilicon layer 5 can be formed by a plasma CVD method using silane (SiH ₄ ) as a source gas, and in the present embodiment, phosphoryl trichloride ( Ion implantation of POCl ₃ ) and thermal diffusion are performed. Further, as an example of the etchant for the polysilicon layer 5, hydrogen fluoride (HF) is used.
And a mixed solution of nitric acid (HNO ₃ ) is used.

Then, a silicon oxide film 7 as an insulating film is formed on the entire surface of the n-type single crystal silicon substrate 1 on which the convex portions 3a are formed by a plasma CVD method or the like (FIG. 1).
(E)) A photoresist (not shown) is applied on the silicon oxide film 7, and then exposed and developed to be patterned into a predetermined shape, and the silicon oxide film 7 is etched using the patterned photoresist as a mask. To form the opening 8a, remove the photoresist, apply a photoresist (not shown) again, and perform exposure and development to perform patterning into a predetermined shape, and mask the patterned photoresist. As a result, the silicon nitride film 3 and the silicon oxide film 2 are etched to form openings 8b and 8c, and the photoresist is removed (FIG. 1 (f)). Here, an HF aqueous solution is used as an example of the etchant for the silicon oxide films 2 and 7.

In this embodiment, after removing the polysilicon layer 5 on the convex portion 3a, the silicon oxide film 7 is removed.
And the silicon oxide film 7, the polysilicon layer 5, and the silicon oxide film 2 are etched to form the opening 8a.
Although the number of masks is not limited to this, it is possible to reduce the number of masks by forming the openings 8b at the same time when removing the polysilicon layer 5 on the protrusions 3a. be able to.

Finally, the lateral diode can be manufactured by forming the metal wiring 9 of aluminum or the like so as to fill the openings 8a to 8c. Here, as an example of a method of forming the metal wiring 9, it is possible to form an aluminum layer by performing sputtering using aluminum as a target and patterning it into a predetermined shape using a photolithography technique and an etching technique.

Therefore, in this embodiment, the convex portion 3a is formed.
Then, the polysilicon layer 5a as an electrode is formed on the entire surface on which the convex portion 3a is formed, and the polysilicon layer 5a on the convex portion 3a is removed by etching. By forming the polysilicon layer 5 of the above, a capacitive coupling structure can be realized. Also, the convex portion 3a
If the material is changed, the permittivity can be changed, and the capacitance can be adjusted accordingly. Furthermore, since the material of the convex portion 3a is different from the material formed on the one main surface of the n-type single crystal silicon substrate 1, the etching for forming the convex portion 3a can be selective, and the etching can be performed with the n-type single crystal silicon. It is possible to avoid reaching the surface of the substrate 1.

[0021]

The invention according to claim 1 or 2 is
A first conductivity type semiconductor substrate, first conductivity type high-concentration impurity regions and second conductivity type impurity regions formed separately on one main surface of the first conductivity type semiconductor substrate, and the first conductivity type semiconductor substrate The first insulating film formed on one main surface, a plurality of convex second insulating films formed on the first insulating film, and the first insulating film having a protrusion in the vicinity of the second insulating film. An electrode formed on one insulating film, a second insulating film and a third insulating film formed on the electrode, the first conductive type high concentration impurity region and the first conductive type impurity region on the first conductive type Insulation film,
An opening formed in the electrode and the third insulating film; and a metal wiring formed so as to fill the opening. The first conductivity type high concentration impurity region and the metal wiring are formed through the metal wiring. Since the electrode, the second conductivity type impurity region and the electrode are connected to each other and the protrusion is capacitively coupled through the second insulating film, a capacitive coupling structure is realized by forming one layer of the electrode. Thus, it is possible to provide a semiconductor device capable of easily forming an electrode having capacitive coupling and realizing a high breakdown voltage of an element, and a manufacturing method thereof.

According to a third aspect of the present invention, in the method of manufacturing a semiconductor device according to the second aspect, when the electrodes on the convex portions are etched, the openings are formed in the electrodes at the same time. Can be reduced, and the process time and cost can be reduced.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view showing a manufacturing process of a lateral diode of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a schematic cross-sectional view showing a manufacturing process of a lateral diode of a semiconductor device according to a conventional example.

[Explanation of symbols]

 1 n-type single crystal silicon substrate 1a p-type impurity diffusion region 1b n-type high-concentration impurity diffusion region 2, 2a silicon oxide film 3 silicon nitride film 3a convex portion 4 photoresist 5, 5a, 5b polysilicon layer 6 photoresist 7 silicon Oxide film 8a to 8c Opening 9 Metal wiring

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Yosuke Hagiwara 1048 Kadoma Kadoma, Osaka Prefecture Matsushita Electric Works, Ltd.

Claims (3)

[Claims] 1. A first-conductivity-type semiconductor substrate, a first-conductivity-type high-concentration impurity region and a second-conductivity-type impurity region which are formed on one main surface of the first-conductivity-type semiconductor substrate so as to be separated from each other. A first insulating film formed on one main surface of the conductive type semiconductor substrate, a plurality of convex second insulating films formed on the first insulating film, and a protrusion in the vicinity of the second insulating film. An electrode formed on the first insulating film so as to have, a second insulating film and a third insulating film formed on the electrode, the first conductivity type high concentration impurity region and the second conductivity type impurity region. An opening formed in the first insulating film, the electrode, and the third insulating film above; and a metal wiring formed so as to fill the opening. The first wiring is formed through the metal wiring. The conductivity type high concentration impurity region and the electrode are connected, and the second conductivity type impurity region and the electrode are connected. The semiconductor device is characterized in that the protrusion is capacitively coupled via the second insulating film. 2. A first-conductivity-type high-concentration impurity region and a second-conductivity-type impurity region are formed by performing ion implantation and thermal diffusion at a desired position on the surface of the first-conductivity-type semiconductor substrate. Forming a first insulating film and a second insulating film on one main surface of a semiconductor substrate, and performing etching so that a desired position of the second insulating film reaches the first insulating film by using a photoresist as a mask. After forming a plurality of convex portions composed of the second insulating film by, the photoresist is removed, an electrode is formed on the entire surface of the first conductivity type semiconductor substrate on which the convex portions are formed, and the photoresist is removed. After removing the electrode formed on the convex portion as a mask by etching, the photoresist is removed, a third insulating film is formed on the convex portion and the electrode, and the first conductive layer is formed by using the photoresist as a mask. An opening is formed in the first insulating film, the electrode, and the third insulating film on the electric-type high-concentration impurity region and the second conductivity-type impurity region, and a metal wiring is formed so as to fill the opening. The first-conductivity-type high-concentration impurity region and the electrode are connected to each other, the second-conductivity-type impurity region and the electrode are connected to each other, the electrode has a protrusion in the vicinity of the protrusion, and the protrusion is interposed. A method of manufacturing a semiconductor device, wherein the protrusions are capacitively coupled. 3. The method of manufacturing a semiconductor device according to claim 2, wherein the opening is formed in the electrode at the same time when the electrode on the protrusion is etched.