JPH09289183A - Flattening method of semiconductor substrate and its equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable working wherein a current due to voltage applying flows uniformly and surface roughness is excellent, at the time of flattening a semiconductor wafer. SOLUTION: The surface of a silicon wafer 5 retained with a chuck 6 is pressed on an abrasive pad 2 arranged on a table 1, and alkaline liquid 4 is supplied on the abrasive pad 2 from a nozzle 3. A voltage is so applied from a power supply 7 via electrodes 8a and 8b that the wafer 5 has a negative potential and the liquid 4 on the abrasive pad 2 has a positive potential. The surface of the wafer 5 and the abrasive pad 2 are relatively slid via the liquid 4, and the surface of the wafer 5 is polished, away eliminated and flattened. Since the wafer 5 side is made minus, eluation of silicon from the wafer 5 is not generated. Reaction of OH radical contained in alkali of the liquid 4 is generated by heat generation due to an uniform current flow from the working liquid 4, to which a plus voltage is directly applied, to the wafer 5. Thereby function of polishing away the surface of the wafer 5 is moderately generated, and roughness of the surface of the wafer 5 is made excellent.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and apparatus for flattening the surface of a semiconductor substrate such as a silicon wafer.

[0002]

2. Description of the Related Art During the manufacturing process of semiconductor devices,
For example, the surface of various films formed on a wafer is often flattened. If this flattening is not performed uniformly, unevenness is generated on the film surface, so that the focus is not focused during exposure in the lithography process, and miniaturization becomes difficult. Therefore, as described in, for example, JP-A-62-208868, a so-called chemical machine for polishing a film surface of a wafer with a polishing liquid (slurry) while supplying a polishing liquid (slurry) to the polishing cloth (pad). Has been attempted to be planarized by dynamic polishing (CMP).

In the method of processing a silicon wafer described in the above publication, a voltage is applied so that a metal plate, which is a polishing platen having a polishing pad provided with a positive potential on the wafer side, has a negative potential, and a polishing liquid is applied onto the pad. The wafer and the pad are rotated relative to each other while being dropped, and polishing is performed.

[0004]

However, in the above method, the polishing surface plate to which the polishing pad is attached is used as the negative electrode, and there is a drawback that it is difficult for the current to flow uniformly from the wafer. Further, when the wafer side is positive as in this method, silicon elutes to increase the processing removal rate, which causes a problem that the processed surface becomes rough.

Therefore, it is an object of the present invention to provide a method and an apparatus capable of processing a current having a uniform surface roughness and a good surface roughness when flattening a semiconductor substrate.

[0006]

In order to achieve the above object, the present invention is a method of flattening a surface of a semiconductor substrate, wherein the surface of the substrate is pressed onto a polishing pad, and the substrate has a negative potential. A voltage is applied between the substrate and the working liquid so that the working liquid supplied onto the polishing pad has a positive potential, and the surface of the substrate and the polishing pad are relatively moved through the working liquid. It is characterized in that the surface of the substrate is flattened by sliding. In this case, an alkali can be used as the working fluid, and the pH of the working fluid is 9-12.
It is good to change between. The applied voltage is 10 m
V to 500 mV is preferable, and the temperature of the working fluid may be changed between 20 ° C and 37 ° C.

The present invention is also an apparatus for flattening the surface of a semiconductor substrate, comprising substrate holding means for holding the substrate, a polishing platen provided with a polishing pad, the substrate and the polishing pad. Voltage applying means for applying a voltage between the substrate and the processing liquid supplied to the polishing pad, the substrate holding means presses the surface of the substrate onto the polishing pad, and the voltage applying means brings the substrate to a negative potential. At the same time, the working liquid is set to a positive potential, and the surface of the substrate is flattened by relatively sliding the surface of the substrate and the polishing pad through the working liquid by the substrate holding means and the polishing platen. It is characterized by In this case, the electrode in contact with the working fluid in the voltage applying means may be platinum.

[0008]

In the present invention, when a voltage is applied so that the semiconductor substrate is on the negative side and the working liquid on the polishing pad is on the positive side, the substrate is operated by an electrochemical action that is a combination of the electric action and the chemical action of the working liquid. The surface of the substrate is softened, and the surface of the substrate is polished and removed by the frictional force of sliding on the polishing pad. By directly applying the positive voltage to the working fluid, the current from the working fluid is kept uniform and
By making the substrate side negative and the processing liquid side positive, it is possible to reduce the elution of the substrate material and improve the surface roughness.

[0009]

BEST MODE FOR CARRYING OUT THE INVENTION A semiconductor wafer flattening method and apparatus according to an embodiment of the present invention will be described below with reference to FIG.
This will be described with reference to FIG.

FIG. 1 is a schematic diagram of the apparatus. In the figure, a polishing pad 2 is attached to a table 1 which is a polishing platen, and an alkaline working liquid 4 is supplied from the nozzle 3 onto the polishing pad 2. A silicon wafer 5 as a semiconductor wafer is fixedly held by a chuck 6, and a load P is applied to press the surface of the wafer 5 onto the polishing pad 2. Then, one electrode 8a of the power source 7 is in contact with the wafer 5 and the other electrode 8b is directly immersed in the working liquid 4, and a voltage is applied so that the wafer 5 side is negative and the working liquid 4 side is positive. It The electrode 8b immersed in the working liquid 4 is made of platinum to reduce metal contamination due to elution.

While supplying the processing liquid 4 onto the polishing pad 2, the surface of the wafer 5 is pressed against the polishing pad 2 so that the wafer 5 has a negative potential and the processing liquid 4 has a positive potential, and the table 1 (and the chuck). 6) Rotate.
At this time, by making the side of the wafer 5 negative, the elution of silicon from the wafer 5 does not occur, and the working liquid 4 is heated by the uniform flow of current from the working liquid 4 that is directly set to the positive potential to the wafer 5. The reaction of the OH group contained in the alkali occurs. As a result, the action of polishing and removing the surface of the wafer 5 gradually occurs, and the surface roughness of the wafer 5 can be improved. The surface to be processed of the wafer 5 may be polysilicon or single crystal.

By changing the pH of the alkali of the working liquid 4, it becomes possible to control the chemical action. Here, it is preferable to change the pH of the alkali between 9 and 12, and if it is smaller than this, the processing efficiency is low, and if it is larger, the surface becomes rough. The voltage applied between the processing liquid 4 and the wafer 5 is preferably about 10 mV to 500 mV. If it is smaller than this, the processing efficiency is low, and if it is larger, the surface becomes rough, and particularly desirable is about 100 mV to 200 mV. Is. Furthermore, the temperature of the working fluid 4 is preferably controlled between 20 ° C. and 37 ° C., and if it is lower than this, the working efficiency decreases, and if it is higher, the surface becomes rough.

[0013]

【Example】

Example 1 In the apparatus as in the embodiment of FIG. 1, the wafer 5 side is minus 100 mV and the pressing force is 300 g / cm.
^When the processing liquid 4 was processed to have a pH of 10.5 and a temperature of 30 ° C., the removal rate was 0.2 μm / min and the surface roughness was 0.1 nm RMS.

[Embodiment 2] In a similar apparatus, the wafer 5 side was processed to a minus 200 mV, a pressing force of 300 g / cm ² , the working liquid 4 at a pH of 10.5 and a temperature of 30 ° C., and the removal rate was 0.1 μm. / Min, a surface roughness of 0.05 nm RMS was obtained.

[Embodiment 3] In a similar apparatus, the wafer 5 side was processed to a minus 200 mV, a pressing force of 300 g / cm ² , the processing liquid 4 at a pH of 10.5 and a temperature of 20 ° C., and the removal rate was 0.05 μm. / Min, a surface roughness of 0.02 nm RMS was obtained.

[Embodiment 4] In a similar apparatus, the wafer 5 side was processed at a negative pressure of 200 mV and a pressing force of 300 g / cm ² , and the processing liquid 4 was processed at a pH of 12 and a temperature of 30 ° C. The removal rate was 0.3 μm / min. Then, a surface roughness of 0.2 nm RMS was obtained.

Although the embodiments of the present invention have been described above, the present invention is not limited to the above embodiments, and various effective modifications and applications are possible based on the technical idea of the present invention. For example, it goes without saying that the type of processing liquid, the material of the polishing pad, etc. can be appropriately selected according to the characteristics of the surface of the semiconductor substrate to be planarized.

[0018]

As described above, according to the present invention,
By applying a voltage so that the semiconductor substrate is on the negative side and the working liquid on the polishing pad is on the positive side, a current can be made to flow from the working liquid to the substrate extremely uniformly, and the elution of substrate material is reduced. The surface roughness can be made extremely good. Further, since it is not necessary to use a processing liquid containing abrasive grains, polishing processing with less contamination becomes possible. As a result, highly uniform flattening with excellent uniformity can be achieved and yield loss can be reduced.

[Brief description of drawings]

FIG. 1 is a schematic diagram of a semiconductor wafer flattening apparatus according to an embodiment of the present invention.

[Explanation of symbols]

 1 table (polishing surface plate) 2 polishing pad 3 nozzle 4 working liquid 5 silicon wafer 6 chuck 7 power supply 8a, 8b electrode

Claims (7)

[Claims] 1. A method of flattening a surface of a semiconductor substrate, wherein the surface of the substrate is pressed onto a polishing pad, and the processing liquid supplied to the polishing pad at a negative potential of the substrate has a positive potential. Voltage is applied between the substrate and the working liquid so that the surface of the substrate and the polishing pad are relatively slid through the working liquid to flatten the surface of the substrate. A method of planarizing a semiconductor substrate, which comprises: 2. The method of planarizing a semiconductor substrate according to claim 1, wherein the processing liquid is an alkali. 3. The method of planarizing a semiconductor substrate according to claim 1, wherein the pH of the processing liquid is changed between 9 and 12. 4. The method of planarizing a semiconductor substrate according to claim 1, wherein the applied voltage is 10 mV to 500 mV. 5. The method of planarizing a semiconductor substrate according to claim 1, wherein the temperature of the processing liquid is changed between 20 ° C. and 37 ° C. 6. An apparatus for flattening a surface of a semiconductor substrate, comprising substrate holding means for holding the substrate, a polishing platen provided with a polishing pad, the substrate and the polishing pad. Voltage applying means for applying a voltage between the working liquid,
The substrate holding means presses the surface of the substrate onto the polishing pad, the voltage applying means brings the substrate to a negative potential and the working liquid has a positive potential, and the substrate holding means and the polishing platen are provided. By relatively sliding the surface of the substrate and the polishing pad through the working liquid,
An apparatus for planarizing a semiconductor substrate, which planarizes the surface of the substrate. 7. An apparatus for planarizing a semiconductor substrate according to claim 6, wherein the electrode in contact with the working liquid in the voltage applying means is platinum.