JPH09283875A - Printed wiring substrate for mcm - Google Patents

Printed wiring substrate for mcm

Info

Publication number
JPH09283875A
JPH09283875A JP8097899A JP9789996A JPH09283875A JP H09283875 A JPH09283875 A JP H09283875A JP 8097899 A JP8097899 A JP 8097899A JP 9789996 A JP9789996 A JP 9789996A JP H09283875 A JPH09283875 A JP H09283875A
Authority
JP
Japan
Prior art keywords
mcm
power supply
wiring
semiconductor element
semiconductor elements
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8097899A
Other languages
Japanese (ja)
Inventor
Hiroshi Sakai
浩 酒井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP8097899A priority Critical patent/JPH09283875A/en
Publication of JPH09283875A publication Critical patent/JPH09283875A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0266Marks, test patterns or identification means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits

Landscapes

  • Structure Of Printed Boards (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a MCM substrate capable of separately measuring electric characteristics of each semiconductor element mounted on a MCM(multi-chip module) substrate, and of thereby simply inspecting an electric connection between each semiconductor element and the MCM substrate. SOLUTION: Power sources (potential wire, grounding wire) 3 formed in a MCM substrate 1 are stuctured as respectively electrically independent power sources 3a, 3b corresponding to a plurality of semiconductor elements 2a, 2b mounted. Electrical characteristics of internal diodes 5a, 5b of each of semiconductor element 2a, 2b can come to be measured every semiconductor element using an inspection pad 8, a connection condition between each of the semiconductor elements 2a, 2b and a wire 4 can come to be inspected using the measured electrical characteristics.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は複数の半導体素子を
1枚の基板に搭載したマルチチップモジュール(MC
M:Multi Chip Module)に関し、特
に各半導体素子に接続する電源回路を改善したMCM用
印刷配線基板に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multi-chip module (MC which mounts a plurality of semiconductor elements on one substrate.
M: Multi Chip Module), and more particularly to a printed wiring board for MCM in which a power supply circuit connected to each semiconductor element is improved.

【0002】[0002]

【従来の技術】近年における半導体装置の高集積化に伴
い、複数個の半導体素子を1枚の印刷配線板に一体的に
搭載したMCMの利用が高められている。このMCMで
は、通常予め印刷配線技術によって所要のパターン配線
を形成した基板(以下、MCM基板と称する)に半導体
素子を含む各種部品を搭載して各種部品をパターン配線
に電気接続する構成がとられている。そして、このパタ
ーン配線では、各半導体素子に接続される電源配線や接
地配線(以下、これらを電源配線と総称する)を一体に
形成して共通化し、この電源配線の一部に外部接続端子
を設け、この外部接続端子を通して各半導体素子への電
源供給を行うように構成されている。
2. Description of the Related Art With the recent high integration of semiconductor devices, the use of MCMs in which a plurality of semiconductor elements are integrally mounted on a single printed wiring board is increasing. In this MCM, usually, various components including semiconductor elements are mounted on a substrate (hereinafter referred to as an MCM substrate) on which a required pattern wiring is formed by a printed wiring technique in advance, and the various components are electrically connected to the pattern wiring. ing. In this pattern wiring, power supply wirings and ground wirings (hereinafter collectively referred to as power supply wirings) connected to each semiconductor element are integrally formed and made common, and an external connection terminal is provided in a part of this power supply wiring. It is provided so that power is supplied to each semiconductor element through the external connection terminal.

【0003】[0003]

【発明が解決しようとする課題】このような従来のMC
Mでは、複数の半導体素子を一旦MCM基板に実装する
と、各半導体素子はそれぞれ共通化された電源配線を介
して相互に電気接続されるため、個々の半導体素子とM
CM基板との間の電気的な接続を検査することが困難に
なるという問題がある。その理由は、通常半導体素子と
MCM基板との接続を電気的に検査する方法として、半
導体素子の入出力端と入出力バッファ回路との間に介挿
されている保護ダイオードの特性を測ることが一般的に
行われているが、前記したような電源配線を共通化した
MCM基板では、この電源配線を介して複数の半導体素
子の各保護ダイオードが並列に接続されることになり、
各保護ダイオードの電気的特性をそれぞれ単独で測定す
ることができなくなる。このため、各半導体素子の保護
ダイオード特性のバラツキにより、半導体素子とMCM
基板間の接続の良否の見極めが難しくなるためである。
SUMMARY OF THE INVENTION Such conventional MC
In M, once a plurality of semiconductor elements are mounted on the MCM substrate, the respective semiconductor elements are electrically connected to each other through the common power supply wiring, so that the individual semiconductor elements and M
There is a problem that it becomes difficult to inspect the electrical connection with the CM board. The reason is that, as a method of electrically inspecting the connection between the semiconductor element and the MCM board, usually, the characteristics of the protection diode interposed between the input / output terminal of the semiconductor element and the input / output buffer circuit can be measured. Although generally performed, in the MCM substrate having the common power supply wiring as described above, the protection diodes of the plurality of semiconductor elements are connected in parallel via the power supply wiring,
It becomes impossible to measure the electrical characteristics of each protection diode independently. Therefore, due to variations in the protection diode characteristics of each semiconductor element, the semiconductor element and MCM
This is because it is difficult to determine the quality of the connection between the boards.

【0004】本発明の目的は、MCM基板に搭載した各
半導体素子の電気特性を個別に測定できるようにし、こ
れにより各半導体素子とMCM基板との間の電気的接続
の検査を簡便に行うことのできるMCM基板を提供する
ことにある。
An object of the present invention is to enable the electrical characteristics of each semiconductor element mounted on an MCM board to be individually measured, thereby facilitating the inspection of the electrical connection between each semiconductor element and the MCM board. An object of the present invention is to provide an MCM substrate that can be manufactured.

【0005】[0005]

【課題を解決するための手段】本発明のMCM基板は、
MCM基板に形成されてMCM基板に搭載される複数の
半導体素子に接続される電源配線が、各半導体素子に対
応してそれぞれ電気的に独立されていることを特徴とす
る。ここで、電源配線は所要の電位が供給される配線
と、この配線に対向される接地配線を含み、この電源配
線の少なくとも一部が複数の半導体素子に対応してそれ
ぞれ電気的に独立されている。この場合、電源配線は各
半導体素子が搭載される領域にそれぞれ個別に形成され
ることが好ましい。また、各電源配線は接続線によって
相互に電気接続が可能に構成されることが好ましい。
The MCM substrate of the present invention comprises:
The power supply wiring formed on the MCM substrate and connected to the plurality of semiconductor elements mounted on the MCM substrate is electrically independent for each semiconductor element. Here, the power supply wiring includes a wiring to which a required potential is supplied and a ground wiring facing the wiring, and at least a part of the power supply wiring is electrically independent of each other corresponding to the plurality of semiconductor elements. There is. In this case, it is preferable that the power supply wiring is individually formed in the region where each semiconductor element is mounted. Further, it is preferable that the respective power supply wirings are configured so that they can be electrically connected to each other by connection lines.

【0006】[0006]

【発明の実施の形態】次に、本発明の実施形態について
図面を参照して説明する。図1は本発明の実施形態を模
式的に示す平面図、図2はその模式的な断面構成図であ
る。MCM基板1は、例えばセラミック積層技術等によ
り絶縁層と配線層とを多層に形成した、多層印刷配線基
板として形成されており、その多層の配線層の一部を利
用して電源配線3を構成している。また、前記MCM基
板1上には、複数個の半導体素子2、この実施形態では
2個の半導体素子2a,2bが搭載されており、前記M
CM基板1の表面に形成された表面配線4に表面実装さ
れ、かつこの表面配線4に対する電気接続が行われる。
この表面配線4は信号用配線や電源用配線が混在された
パターン構成とされており、各半導体素子2に設けられ
る外部端子(外部リード)に半田等により接続される。
Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a plan view schematically showing an embodiment of the present invention, and FIG. 2 is a schematic sectional configuration diagram thereof. The MCM board 1 is formed as a multilayer printed wiring board in which an insulating layer and a wiring layer are formed in multiple layers by, for example, a ceramic lamination technique, and the power supply wiring 3 is configured by using a part of the multilayer wiring layer. are doing. Further, a plurality of semiconductor elements 2, in this embodiment, two semiconductor elements 2a and 2b are mounted on the MCM substrate 1, and the M
The surface wiring 4 formed on the surface of the CM substrate 1 is surface-mounted, and the surface wiring 4 is electrically connected.
The surface wirings 4 have a pattern configuration in which signal wirings and power supply wirings are mixed, and are connected to external terminals (external leads) provided in each semiconductor element 2 by soldering or the like.

【0007】ここで、前記電源配線3は、前記各半導体
素子2a,2bに対してそれぞれ個別の配線3a,3b
として形成されており、両者は電気的に独立した構成と
されている。この実施形態では各電源配線3a,3b
は、それぞれが対応する半導体素子2a,2bを包囲す
る領域に可及的に広い面積を占める状態で形成されてい
る。そして、各電源配線3a,3bはそれぞれスルーホ
ール6a,6bを介して前記表面配線4の一部4a,4
bに個別に接続され、この表面配線4a,4bを介して
前記各半導体素子2a,2bにそれぞれ電気接続されて
いる。
Here, the power supply wiring 3 is provided for each of the semiconductor elements 2a and 2b.
And are electrically independent of each other. In this embodiment, each power supply wiring 3a, 3b
Are formed so as to occupy as large an area as possible in the regions surrounding the corresponding semiconductor elements 2a and 2b. Then, the power supply wirings 3a and 3b are respectively connected to the portions 4a and 4 of the surface wiring 4 through the through holes 6a and 6b.
b is individually connected to the semiconductor elements 2a and 2b through the surface wirings 4a and 4b.

【0008】したがって、このように構成されたMCM
基板1では、各半導体素子2a,2bに対応する電源配
線3a,3bが、少なくとも各半導体素子2a,2bを
搭載した状態ではそれぞれ電気的に独立されているた
め、例えば各半導体素子2a,2bに内蔵されている保
護ダイオード5a,5bはそれぞれ電気的に独立した状
態にあり、電源配線3を介してそれぞれが並列に接続さ
れることはない。このため、例えば、半導体素子2aに
設けられている接続端子7aとMCM基板1の配線との
接続状態は、その接続端子7aに接続されるべき表面配
線4上の検査パッド8と電源配線3aとの間に存在され
る半導体素子2aの保護ダイオード5aの電気的特性を
測定することにより検査可能となる。同様に、半導体素
子2bのある接続端子7bの接続状態は、表面配線4上
の検査パッド8と電源配線3bとの間に存在する保護ダ
イオード5bの特性を測ることにより検査可能となる。
Therefore, the MCM configured as described above
In the substrate 1, the power supply wirings 3a and 3b corresponding to the semiconductor elements 2a and 2b are electrically independent at least in the state where the semiconductor elements 2a and 2b are mounted. The built-in protection diodes 5a and 5b are electrically independent from each other, and are not connected in parallel via the power supply wiring 3. Therefore, for example, the connection state between the connection terminal 7a provided in the semiconductor element 2a and the wiring of the MCM substrate 1 is determined by the inspection pad 8 on the surface wiring 4 and the power supply wiring 3a to be connected to the connection terminal 7a. The inspection can be performed by measuring the electrical characteristics of the protection diode 5a of the semiconductor element 2a existing between the two. Similarly, the connection state of the connection terminal 7b having the semiconductor element 2b can be inspected by measuring the characteristics of the protection diode 5b existing between the inspection pad 8 on the surface wiring 4 and the power supply wiring 3b.

【0009】そして、この配線状態の検査が完了した後
は、それぞれ独立されている電源配線3a,3bをブリ
ッジ配線9等により接続すれば、MCM基板1として1
つの共通化された電源配線3が構成されることになり、
これまでのMCM基板と同様に、この電源配線に対して
外部の電源回路を接続することでMCM基板に対する電
源接続が実現される。
After the inspection of the wiring state is completed, the power source wirings 3a and 3b, which are independent of each other, are connected by the bridge wiring 9 or the like to complete the MCM substrate 1.
Two common power supply lines 3 will be configured,
Similar to the conventional MCM board, the power supply connection to the MCM board is realized by connecting an external power supply circuit to this power supply wiring.

【0010】なお、本発明においては、前記実施形態の
電源配線としては、所要の電位が供給される電源配線、
またはこれと対をなす接地配線の少なくとも一方に適用
すればよい。ただし、接地配線を含む全ての電源配線を
前記したように独立した構成とすることにより、搭載さ
れる半導体素子の種々の端子における接続状態をより詳
細に検査することが可能となる。
In the present invention, the power supply wiring of the above embodiment is a power supply wiring to which a required potential is supplied,
Alternatively, it may be applied to at least one of the ground wirings forming a pair therewith. However, by configuring all the power supply wirings including the ground wirings independently as described above, it becomes possible to inspect the connection state at various terminals of the mounted semiconductor element in more detail.

【0011】また、前記実施形態では、2つの半導体素
子を搭載した例を示しているが、3つ以上の半導体素子
を搭載する場合にも本発明を同様に適用できることは言
うまでもない。また、それぞれ独立形成する電源配線の
パターンも前記した実施形態のものに限られるものでな
いことは言うまでもない。
Further, in the above-mentioned embodiment, an example in which two semiconductor elements are mounted is shown, but it goes without saying that the present invention can be similarly applied to the case where three or more semiconductor elements are mounted. Needless to say, the patterns of the power supply wirings formed independently of each other are not limited to those in the above-described embodiment.

【0012】[0012]

【発明の効果】以上説明したように本発明は、MCM基
板に設けた電源配線を、複数の半導体素子に対応してそ
れぞれ電気的に独立した構成としているので、各半導体
素子の電気的な特性、特に内蔵された保護ダイオードの
電気特性をそれぞれ単独で測定することが可能となり、
各半導体素子とMCM基板の配線との電気的な接続状態
の検査を容易に行うことが可能となり、高品質のMCM
を構築する上で極めて有用なものとなる。
As described above, according to the present invention, the power supply wiring provided on the MCM substrate is electrically independent of each other to correspond to a plurality of semiconductor elements. , In particular, it becomes possible to independently measure the electrical characteristics of the built-in protection diode,
It is possible to easily inspect the electrical connection state between each semiconductor element and the wiring of the MCM board, and high quality MCM
Will be extremely useful in constructing.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明のMCM基板の実施形態を模式的に示す
平面図である。
FIG. 1 is a plan view schematically showing an embodiment of an MCM substrate of the present invention.

【図2】図1の模式的な断面図である。FIG. 2 is a schematic cross-sectional view of FIG.

【符号の説明】[Explanation of symbols]

1 MCM基板 2(2a,2b) 半導体素子 3(3a,3b) 電源配線 4(4a,4b) 表面配線 5a,5b 保護ダイオード 6a,6b スルーホール 7a,7b 接続端子 8 検査パッド 1 MCM substrate 2 (2a, 2b) Semiconductor element 3 (3a, 3b) Power supply wiring 4 (4a, 4b) Surface wiring 5a, 5b Protection diode 6a, 6b Through hole 7a, 7b Connection terminal 8 Inspection pad

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 複数の半導体素子を1枚の基板に搭載す
るマルチチップモジュール(MCM)用の印刷配線基板
において、前記各半導体素子に接続される電源配線が各
半導体素子に対応してそれぞれ電気的に独立されている
ことを特徴とするMCM用印刷配線基板。
1. In a printed wiring board for a multi-chip module (MCM) in which a plurality of semiconductor elements are mounted on a single board, power supply wirings connected to the respective semiconductor elements are electrically connected to the respective semiconductor elements. Printed wiring board for MCM, which is characterized in that it is independent.
【請求項2】 電源配線は所要の電位が供給される配線
と、この配線に対向される接地配線を含み、この電源配
線の少なくとも一部が複数の半導体素子に対応してそれ
ぞれ電気的に独立されている請求項1のMCM用印刷配
線基板。
2. The power supply wiring includes a wiring to which a required potential is supplied and a ground wiring facing the wiring, and at least a part of the power supply wiring corresponds to a plurality of semiconductor elements and is electrically independent of each other. The printed wiring board for MCM according to claim 1.
【請求項3】 電源配線は各半導体素子が搭載される領
域にそれぞれ個別に形成される請求項1または2のMC
M用印刷配線基板。
3. The MC according to claim 1, wherein the power supply wiring is individually formed in a region where each semiconductor element is mounted.
Printed wiring board for M.
【請求項4】 各電源配線は接続線によって相互に電気
接続が可能に構成される請求項1ないし3のいずれかの
MCM用印刷配線基板。
4. The printed wiring board for an MCM according to claim 1, wherein each power supply wiring is configured to be electrically connectable to each other by a connecting wire.
JP8097899A 1996-04-19 1996-04-19 Printed wiring substrate for mcm Pending JPH09283875A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8097899A JPH09283875A (en) 1996-04-19 1996-04-19 Printed wiring substrate for mcm

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8097899A JPH09283875A (en) 1996-04-19 1996-04-19 Printed wiring substrate for mcm

Publications (1)

Publication Number Publication Date
JPH09283875A true JPH09283875A (en) 1997-10-31

Family

ID=14204595

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8097899A Pending JPH09283875A (en) 1996-04-19 1996-04-19 Printed wiring substrate for mcm

Country Status (1)

Country Link
JP (1) JPH09283875A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014207488A (en) * 2004-03-26 2014-10-30 エスシーエー アイピーエルエー ホールディングス インコーポレイテッド Multi-chip module

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0745962A (en) * 1993-07-28 1995-02-14 Fujitsu Ltd Pattern against radio interference waves on multilayer printed-circuit board
JPH07211999A (en) * 1994-01-26 1995-08-11 Nippon Telegr & Teleph Corp <Ntt> Package for semiconductor chip

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0745962A (en) * 1993-07-28 1995-02-14 Fujitsu Ltd Pattern against radio interference waves on multilayer printed-circuit board
JPH07211999A (en) * 1994-01-26 1995-08-11 Nippon Telegr & Teleph Corp <Ntt> Package for semiconductor chip

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014207488A (en) * 2004-03-26 2014-10-30 エスシーエー アイピーエルエー ホールディングス インコーポレイテッド Multi-chip module

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