JPH09283519A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce production costs at the time of forming one layer of wiring through polishing process, by forming a flattened insulating film and plug material through only once polishing operation, which would require twice polishing operations for polishing the insulating film and the plug material in a prior art. SOLUTION: A semiconductor substrate 10 is formed thereon with an aluminum alloy wiring pattern 12, on the entire surface of which an insulating film 13 having a constant thickness is deposited. Projected part of the insulating film 13 are formed therein with openings 14, into which tungsten 15 is selectively filled. Thereafter, the tungsten 15 except for the insides of the openings 14 is completely removed with use of a slurry containing polishing particles of silica or cerium in KOH, NH4 OH, organic alkali or water to reduce step differences on the insulating film and to form tungsten plugs 16.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming a plug.

[0002]

2. Description of the Related Art Recently, as a method of forming a plug of a semiconductor device, a process of embedding a metal in an opening formed in a flat insulating film and then removing excess metal by chemical mechanical polishing or the like has been put into practical use. Is being done.

There are two methods for embedding the metal in the opening, that is, a method of depositing the metal on the entire surface and a method of selectively depositing the metal in the opening. Of the two methods, in the case of blanket deposition, an adhesion layer (barrier layer) is formed on the insulating film.
Is generally deposited, but an adhesion layer (barrier layer)
Due to the problem that voids are generated inside the plug due to the overhang, the selective deposition is becoming mainstream.

In the case of selective deposition, it is common to deposit up to the upper part of the opening in consideration of variations in depth of holes formed in the insulating film and variations in deposition conditions. Remove by mechanical polishing. Therefore, a plug forming method (semiconductor device manufacturing method) using selective deposition will be described below with reference to the drawings.

FIG. 2 is a schematic sectional view showing the steps of a conventional method for forming a plug.

First, as shown in FIG. 2A, a wiring 22 made of aluminum alloy or the like is formed on a flat insulating film 21 formed on a semiconductor substrate 20, for example, and then an insulating film 23 is uniformly formed on the entire surface. To a uniform thickness. At this time, on the surface of the insulating film 23, a step equivalent to the height of the wiring 22 is generated.

Next, as shown in FIG. 2 (b), an insulating film 23 is formed by using a polishing agent (slurry) containing polishing particles such as silica or cerium in KOH, NH ₄ OH, organic alkali or water. Chemical mechanical polishing is performed to reduce the level difference on the surface of the insulating film 23.

Next, as shown in FIG. 2C, the wiring 22
The insulating film 23 in the region where the upper contact is formed is removed by dry etching, and the opening 2 reaching the wiring 22 is formed.
4 is formed.

After that, as shown in FIG. 2D, tungsten 25, for example, as a plug material is selectively deposited in the opening 24. But here, as mentioned above,
For the tungsten 25, it is necessary to consider variations in the depth of the opening 24, variations in the deposition conditions, and the like, and the tungsten 25 is deposited up to the upper portion of the opening 24.

Next, as shown in FIG. 2 (e), the opening 2
Tungsten deposited in areas other than 4 is removed by chemical mechanical polishing using a slurry containing, for example, hydrogen peroxide or iron nitrate as an oxidant and, for example, alumina as polishing particles, to form a tungsten plug.

Although the case where the contact is formed on the wiring has been described above, the same applies to the case where the contact is formed on the element region.

As noted above, selective deposition of plug material,
In the conventional method of forming a plug of tungsten or the like by using the polishing process, it is necessary to use two polishing processes of flattening the surface of the insulating film and removing the plug material other than inside the opening.

[0013]

However, in order to perform the polishing process twice, two polishing devices are required, which increases the production cost. As a matter of course, as the number of wiring layers increases (because two polishing devices are required to form one layer), the cost further increases.

Therefore, a method of manufacturing a semiconductor device in which a metal is embedded in an opening of an insulating film according to the present invention provides a low-cost manufacturing method using a polishing process in the case of selective deposition of a metal material. It is intended.

[0015]

In order to achieve the above object, the present invention comprises a step of forming at least a step on a semiconductor substrate, and a step of depositing an insulating film having a uniform thickness on the entire surface, Removing a desired region of a convex portion of the insulating film to form an opening; selectively depositing a metal in the opening to embed the metal in the opening; the metal and the insulating film; The polishing agent (slurry) for polishing the metal and the insulating film is KOH, NH ₄ OH, an organic alkali, or water, and silica or cerium which is an abrasive particle. It is characterized by containing.

According to the present invention, the polishing speed of the insulating film is larger than that of the metal material when the pressure applied to the metal material and the insulating film during polishing is equal. Since it is embedded in the convex portion, the pressure increases at that portion, and the polishing rate of the metal material becomes higher than the polishing rate of the insulating film other than the convex portion. Therefore,
The insulating film and the metal material as a whole are flattened, that is, a slurry which is generally used for polishing and flattening the insulating film without performing two polishing steps of flattening the insulating film and removing a surplus portion of the metal material. Both objectives can be achieved by polishing both at once.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of a method for manufacturing a semiconductor device in which a metal is embedded in an opening of an insulating film according to the present invention will be described below with reference to the drawings.

FIG. 1 is a cross-sectional process diagram of a method of forming a plug (method of manufacturing a semiconductor device) according to an embodiment of the present invention. Below, a description will be given along with FIGS. 1 (a) to 1 (d). The invention will be described.

First, as shown in FIG. 1A, an aluminum / silicon / copper alloy having a width of 2 μm and a thickness of 0.5 μm, for example, is formed as a wiring of a conductive material on an insulating film 11 formed on a semiconductor substrate 10. The wiring 12 is formed, and then the insulating film 13 having a uniform thickness is deposited by, eg, 1 μm by CVD. At this time, since a step due to the presence of the wiring 12 is generated on the surface of the insulating film 13, the height of the step is 0.5 μm, which is the same as the thickness of the wiring 12.

Next, as shown in FIG. 1B, the insulating film 1
A region of the convex portion 3 (that is, a region where a plug is formed and is aligned with the wiring 12) is dry-etched to form an opening 14 reaching the wiring 12 and having a diameter of 0.8 μm, for example.

Next, as shown in FIG. 1C, the opening 1
4, for example, tungsten 15 is selectively deposited as a plug material in the inside of 4 by CVD. Here, it is necessary to consider variations in the depth of the opening 14 and variations in the deposition conditions, and the tungsten 15 is deposited to the upper portion of the opening 14. In addition to tungsten, a metal such as aluminum or copper may be used as the plug material.

Next, as shown in FIG. 1D, chemical mechanical polishing using a slurry containing abrasive particles such as silica or cerium in KOH, NH ₄ OH, organic alkali, or water is performed, and an insulating film and tungsten are used. Apply to both at the same time. When the pressures applied to the insulating film and tungsten are equal, the insulating film has a higher polishing rate.
As shown in FIG. 1C, 5 is embedded in the convex portion of the insulating film 13 and is deposited up to the upper portion of the convex portion. Therefore, high pressure acts on this portion, and the polishing rate of the tungsten 15 is increased. Is greatly increased. Further, since the insulating film on the convex portion is subjected to a higher pressure than the insulating film other than the convex portion, the polishing rate of the insulating film on the convex portion is higher than the polishing rate of the insulating film on the portion other than the convex portion. Therefore, eventually, the flattening of the insulating film 13 and the removal of the excess tungsten are simultaneously achieved so that the surface becomes flat.

In the present invention, the step of the insulating film is caused by the thickness of the lower wiring, but the step of causing the insulating film is not limited to the wiring but may be an element region such as a gate insulating film. .

Further, the present invention is applied when the insulating film forming the opening for depositing the plug is formed on the one having the step caused by the wiring,
This step means a step that is positively (consciously) generated by wiring or the like, and does not indicate a step that is somewhat uneven when the insulating film is simply deposited. .

Further, if the side surface of the step which is intentionally generated is extremely gentle, the step is less likely to occur in the insulating film deposited on the side surface. Therefore, the step angle is 30 degrees or more. Are the subject of the present invention.

[0026]

As described above, according to the present invention, the polishing process for forming one layer of wiring is performed once by polishing the plug material and the insulating film at once, instead of the conventionally required two times. It is possible to reduce the production cost.

[Brief description of drawings]

FIG. 1 is a sectional view of a manufacturing process of a semiconductor device having a plug according to an embodiment of the present invention.

FIG. 2 is a sectional view of a manufacturing process of a conventional semiconductor device having a plug.

[Explanation of symbols]

 10 Semiconductor Substrate 11 Insulating Film 12 Wiring 13 Insulating Film 14 Opening 15 Tungsten 16 Tungsten Plug

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Tomoyasu Murakami 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.

Claims (2)

[Claims] 1. A step of depositing an insulating film having a uniform thickness on the entire surface of a semiconductor substrate having a step, a step of removing a desired region of a convex portion of the insulating film to form an opening, and the opening. A method for manufacturing a semiconductor device, comprising: a step of selectively depositing a metal in a portion and burying the metal in the opening; and a step of polishing the metal and the insulating film at the same time. A method of manufacturing a semiconductor device, wherein in the polishing step, the polishing agent is one containing KOH, NH ₄ OH, an organic alkali or water and polishing particles of silica or cerium. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the step formed on the semiconductor substrate is caused by the formation of a wiring pattern or a gate electrode.