JPH0927717A - Oscillation circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress noise production due to a higher harmonic component by making a mamping resistance value small and facilitating oscillation when the power source is turned on, and making the resistance value large a specific time later. SOLUTION: A control signal S is low, a 1st analog switch 10 is turned on, and a 2nd analog switch 12 is turned off within a specific time after the power source is turned on, so a resistance 11 having a small resistance value is connected as a damping resistance between the output of an inverter 4 and a terminal 7. Therefore, coefficient of the filter composed of the resistance 11 and a capacitor 3 becomes small and the oscillation circuit 23 is easy to oscillate. The signal S goes up to a high level the specific time later, and the switch 12 is also turned-on to connect the resistances 11 and 13 in parallel. Further, the Q' output of a D flip-flop 14 goes down to the low level its delay time later and the switch 10 is turned off, so that only the high resistance 13 is connected. Then the filter coefficient becomes large and a cutoff frequency decreases to suppress the production of higher harmonic components, thereby reducing the influence of the higher harmonic components during actual operation.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an oscillator circuit that oscillates using a crystal or ceramic oscillator.

[0002]

2. Description of the Related Art An oscillation circuit using a crystal or ceramic oscillator is conventionally an inverter composed of a CMOS, in which capacitors 2 and 3 are connected between both ends of the oscillator 1 and ground, as shown in FIG. 4 is connected in parallel to the vibrator 1, and a damping resistor 5 is further connected between the output end of the inverter 4 and one end of the vibrator 1. Normally, the output of the inverter 4 is shaped into a square wave by the inverter 7 of the next stage and output to each circuit.

Such a crystal oscillating circuit is also widely used in electronic tuning LSIs. For example, in the case of FM radio, a crystal oscillating circuit having a reference clock of 4.5 MHz is used. Reference clock 4.5M
When a harmonic component of 20 times the Hz occurs in the reception band of the FM radio, the harmonic component is output as a beat sound when the same frequency is received, which deteriorates the sound quality. Therefore, conventionally, the value of the damping resistor 5 shown in FIG. 5 is increased to some extent to suppress the generation of harmonic components.

Inverter 4 and damping resistor 5
Is configured inside the LSI, and the vibrator 1 and the capacitors 2 and 3 are connected to the terminals 6 and 7 as external parts.

[0005]

As described above, in the conventional circuit configuration, if the resistance value R1 of the damping resistor 5 is increased, the harmonic component can be suppressed to a small value, but this resistance value is increased. Then, there arises a problem that it becomes difficult to oscillate when the power is turned on.

[0006]

According to the present invention, in an oscillation circuit in which a capacitor is connected to both ends of an oscillator and an inverter is connected in parallel to the oscillator, after a predetermined time has elapsed after the start of oscillation. Connects a first resistor between the output of the inverter and one end of the oscillator,
The above problem is solved by making the resistance value between the output of the inverter and one end of the oscillation oscillator smaller than the first resistance until the predetermined time elapses after the start of oscillation.

Further, the present invention is characterized in that a second resistor is connected in parallel with the first resistor until the predetermined time elapses after the start of oscillation. Further, according to the present invention, a resistance value between the output of the inverter and one end of the oscillator is smaller than that of the first resistor and is higher than that of the first resistor until the predetermined time elapses after the start of oscillation. Second small
It is characterized by inserting the resistance of.

Further, according to the present invention, a first series circuit including a first resistor and a first switch is provided between the output of the inverter and one end of the oscillator, and a resistor of the first resistor. A second resistor having a smaller value and a second series circuit including a second switch are connected in parallel, and only the second switch is turned on until a predetermined time elapses after the start of oscillation, and after the predetermined time elapses. It is characterized in that the first and second switches are turned on and then the second switch is turned off.

[0009]

According to the present invention, the resistance value between the output of the inverter and one end of the oscillator becomes small until a predetermined time elapses after the start of oscillation, so that the oscillation circuit easily oscillates.
After the lapse of a predetermined time after the start of oscillation, the first resistor having a relatively large resistance value is connected between the output of the inverter and one end of the oscillator, so that the generation of harmonic components is suppressed, During actual operation, it is less likely to be affected by harmonic components.

[0010]

1 is a circuit diagram showing the configuration of an embodiment of the present invention, and the same components as those of the conventional example of FIG. 5 are designated by the same reference numerals. In this embodiment, a series circuit of the first analog switch 10 and the first resistor 11 is connected between the inverter 4 and the terminal 7, and the second analog switch 12 and the second analog switch 12 are connected in parallel to the series circuit. A series circuit with the resistor 13 is connected. The resistance value of the resistor 13 is set to be somewhat large like the conventional resistance value R1, and the resistance value R2 of the resistor 11 is set to be extremely small.

Further, here, a delay circuit composed of a D flip-flop 14 for delaying the control signal S is provided, and the inverted Q output of the D flip-flop 14 is inputted to the first analog switch 10. The control signal S is input to the second analog switch 12.
By the way, the oscillation circuit 23 shown in FIG.
The circuit configuration of a part of I20 is shown below.
The I20 internally includes a PLL circuit 21 for electronic tuning and a microcomputer section 22 that controls the PLL circuit 21. Then, the microcomputer unit 22 detects that the power is turned on by the power line,
It is determined whether or not a predetermined time T has passed since the power was turned on, and when it has passed, a control signal S is output.

That is, when the power supply voltage VDD rises as shown in FIG. 3A, the control signal S becomes H level as shown in FIG. 3A after a lapse of a predetermined time T. When the control signal S is at L level, the inverted Q output of the D flip-flop 14 is at H level as shown in FIG.
Therefore, since the first analog switch 10 is turned on and the second analog switch 12 is turned off until the predetermined time T elapses, a resistor having a small resistance value is provided as a damping resistor between the output of the inverter 4 and the terminal 7. Only 11 will be connected. Therefore, during this period, the coefficient of the filter formed by the resistor 11 and the capacitor 3 has a small value, and the oscillation circuit is in a state where it is extremely easy to oscillate.

However, after the elapse of the predetermined time T, the control signal S from the microcomputer unit 22 becomes H level as shown in FIG. 3A, the second analog switch 12 is also turned on, and the resistor 13 is connected in parallel with the resistor 11. The Rukoto. Furthermore,
When the delay time tD determined by the D flip-flop 14 elapses, the inverted Q output of the D flip-flop 14 becomes L level as shown in FIG. Similarly, only the resistor 13 having a resistance value of R1 is connected. Therefore, in this case, the coefficient of the filter composed of the resistor 13 and the capacitor 3 has a large value, and the cutoff frequency is lowered to suppress the generation of harmonic components.

By the way, in the above embodiment, the second analog switch 12 is operated until the predetermined time T elapses after the power is turned on.
However, as shown in FIG. 2, the analog switch 12 may be removed and the resistor 13 may be always connected between the inverter 4 and the terminal 7. In this case, since the damping resistance becomes the parallel resistance value of R1 and R2 until the predetermined time T elapses after the power is turned on, the damping resistance becomes a value considerably smaller than R1 and the same effect as described above can be obtained.

[0015]

According to the present invention, since the damping resistance value is small when the power is turned on, the oscillation circuit easily oscillates, and after a lapse of a predetermined time after the power is turned on, the damping resistance value becomes large, so that the harmonic component is generated. It becomes possible to suppress the generation of noise.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a configuration of an embodiment of the present invention.

FIG. 2 is a circuit diagram showing a configuration of another embodiment of the present invention.

FIG. 3 is a timing chart showing the operation of the embodiment.

FIG. 4 is a block diagram showing an entire LSI to which the present invention is applied.

FIG. 5 is a circuit diagram showing a conventional oscillator circuit.

[Explanation of symbols]

 1 Oscillator 2 3 Capacitor 4 Inverter 5 Damping resistance 6,7 Terminals 10, 12 Analog switch 11, 13 Resistance 14 D flip-flop 20 LSI 21 PLL circuit 22 Microcomputer part 23 Oscillation circuit

Claims (4)

[Claims] 1. An oscillation circuit comprising a capacitor connected to both ends of an oscillation oscillator and an inverter connected in parallel to the oscillation oscillator. A first resistor is connected to one end of the oscillator and the resistance value between the output of the inverter and one end of the oscillator is set to the first value until the predetermined time elapses after the start of oscillation. The oscillator circuit is characterized by being made smaller than the resistance of. 2. The oscillator circuit according to claim 1, wherein a second resistor is connected in parallel with the first resistor until the predetermined time elapses after the start of oscillation. 3. A resistance value between the output of the inverter and one end of the oscillator is smaller than that of the first resistor until the predetermined time elapses after the start of oscillation. The oscillator circuit according to claim 1, wherein a second resistor is inserted. 4. A first series circuit including a first resistor and a first switch between an output of the inverter and one end of the oscillator, and a first series circuit having a resistance value smaller than that of the first resistor. The second resistor and the second series circuit including the second switch are connected in parallel, and only the second switch is turned on until a predetermined time elapses after the start of oscillation, and once the predetermined time elapses, the first and second 2. The oscillator circuit according to claim 1, wherein the second switch is turned on and then the second switch is turned off.