JPH0927656A - Manufacture of ridge waveguide semiconductor laser - Google Patents

Manufacture of ridge waveguide semiconductor laser

Info

Publication number
JPH0927656A
JPH0927656A JP17530095A JP17530095A JPH0927656A JP H0927656 A JPH0927656 A JP H0927656A JP 17530095 A JP17530095 A JP 17530095A JP 17530095 A JP17530095 A JP 17530095A JP H0927656 A JPH0927656 A JP H0927656A
Authority
JP
Japan
Prior art keywords
layer
ridge
semiconductor laser
ridge waveguide
waveguide semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP17530095A
Other languages
Japanese (ja)
Inventor
Yoshinori Yamauchi
義則 山内
Hideaki Horikawa
英明 堀川
Osamu Goto
修 後藤
Hiroki Yaegashi
浩樹 八重樫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP17530095A priority Critical patent/JPH0927656A/en
Publication of JPH0927656A publication Critical patent/JPH0927656A/en
Withdrawn legal-status Critical Current

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  • Led Devices (AREA)
  • Semiconductor Lasers (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a ridge waveguide semiconductor laser which is low in threshold current and high in luminous efficacy. SOLUTION: An SiO2 mask 12 is formed on an N-InP substrate 11, and an etching process is carried out for the formation of a mesa stripe 11A. A high-resistance layer 13 is grown filling up each side of the mesa stripe 11A to be flush with the mesa stripe 11A. Then, the SiO2 mask 12 is removed, and then an N-InP clad layer 14, an active layer 15, a P-InP clad layer 16, and a P-InGaAsP contact, layer 17 are successively grown. Then, an SiO2 stripe mask is formed, and a ridge 18 is formed by etching. Next, an SiO2 insulating film 19 is formed on all the surface, and a window 19A is provided to only the top of the ridge 18, and a P-side electrode 20 is formed. An N-side electrode 21 is formed on the bottom of the N-InP substrate 11. By this setup, a high- resistance current, blocking layer is introduced under the active layer 15 of a ridge waveguide semiconductor laser.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、光通信用の光源として
用いるリッジウェイブガイド半導体レーザの製造方法に
関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a ridge waveguide semiconductor laser used as a light source for optical communication.

【0002】[0002]

【従来の技術】従来、この種のリッジウェイブガイド半
導体レーザには、例えば、『Single−mode
C.W.Ridge−waveguide Laser
Emitting at 1.55μm』 I.P.
Kaminow,R.E.Nahory,M.A.Po
llack,L.W.Stulz,and J.C.D
ewinter、Electronics Lette
rs Vol.15(1979)P.763〜765に
開示されるものがあり、以下に説明する。
2. Description of the Related Art Conventionally, a ridge waveguide semiconductor laser of this type is, for example, a "Single-mode".
C. W. Ridge-waveguide Laser
Emitting at 1.55 μm ”I. P.
Kaminow, R.M. E. FIG. Nahory, M .; A. Po
Llack, L .; W. Sturz, and J.M. C. D
einter, Electronics Lette
rs Vol. 15 (1979) P.I. 763 to 765, which will be described below.

【0003】図2は上記文献に示される従来のリッジウ
ェイブガイド半導体レーザの断面図である。この図に示
すように、n−InP基板1上に、n−InPクラッド
層2、InGaAsP活性層3、p−InGaAsPバ
ッファ層4、p−InPクラッド層5、p−InGaA
sPキャップ層6を成長させる。
FIG. 2 is a sectional view of a conventional ridge waveguide semiconductor laser shown in the above document. As shown in this figure, on an n-InP substrate 1, an n-InP clad layer 2, an InGaAsP active layer 3, a p-InGaAsP buffer layer 4, a p-InP clad layer 5, a p-InGaA layer.
The sP cap layer 6 is grown.

【0004】次に、両端に幅Vの開口部(谷部)10を
持つリッジ用の幅Wのマスクを形成し、HCl+H3
4 のエッチャントによりリッジ9を形成する。この
時、p−InGaAsPバッファ層4がエッチングスト
ップ層となる。次に、SiO2絶縁膜7をスパッタによ
り全面につけた後、リッジの部分にのみ窓を作る。最後
にp側電極8を形成する。
Next, a mask with a width W for a ridge having openings (valleys) 10 with a width V at both ends is formed, and HCl + H 3 P
The ridge 9 is formed by an etchant of O 4 . At this time, the p-InGaAsP buffer layer 4 serves as an etching stop layer. Next, after depositing the SiO 2 insulating film 7 on the entire surface by sputtering, a window is formed only in the ridge portion. Finally, the p-side electrode 8 is formed.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、上記し
た従来のリッジウェイブガイド半導体レーザでは、活性
層3の下側で電流の狭窄を行っていないために、電極か
ら注入された電流が活性層3付近で広がり、閾電流値が
高く、発光効率が悪くなる。本発明は、上記問題点を除
去し、閾電流値が低く、発光効率が高いリッジウェイブ
ガイド半導体レーザの製造方法を提供することを目的と
する。
However, in the above-mentioned conventional ridge waveguide semiconductor laser, the current injected from the electrode is near the active layer 3 because the current is not constricted below the active layer 3. , The threshold current value is high, and the luminous efficiency is poor. SUMMARY OF THE INVENTION It is an object of the present invention to eliminate the above problems and provide a method for manufacturing a ridge waveguide semiconductor laser having a low threshold current value and a high light emission efficiency.

【0006】[0006]

【課題を解決するための手段】本発明は、上記目的を達
成するために、リッジウェイブガイド半導体レーザの製
造方法において、第1導電型InP基板上にマスクを形
成し、エッチングを行いメサストライプを形成する工程
と、このメサストライプの両側に高抵抗層を埋め込み平
坦にする工程と、第1導電型InPクラッド層と、活性
層と、第2導電型InPクラッド層と、第2導電型In
GaAsPコンタクト層を順次成長させる工程と、スト
ライプマスクを形成し、エッチングによりリッジを形成
する工程と、絶縁膜を全面に形成後、前記リッジの上部
にのみ窓を形成し電極を形成する工程とを施すようにし
たものである。
In order to achieve the above object, the present invention provides a method for manufacturing a ridge waveguide semiconductor laser, in which a mask is formed on a first conductivity type InP substrate and etching is performed to form a mesa stripe. A step of forming, a step of burying and flattening a high resistance layer on both sides of the mesa stripe, a first conductivity type InP clad layer, an active layer, a second conductivity type InP clad layer, and a second conductivity type In
A step of sequentially growing a GaAsP contact layer, a step of forming a stripe mask and forming a ridge by etching, and a step of forming an insulating film over the entire surface and then forming a window only above the ridge to form an electrode. It is something that is applied.

【0007】[0007]

【作用】本発明によれば、上記したように、n−InP
基板上にSiO2 マスクを形成し、エッチングを行いメ
サストライプを形成する。そのメサストライプの両側
に、高抵抗層を埋め込み成長させ、素子を平坦にする。
次に、n−InPクラッド層と、活性層と、p−InP
クラッド層と、p−InGaAsPコンタクト層を順次
成長させる。次に、SiO2 ストライプマスクを形成
し、エッチングによりリッジを形成する。次に、SiO
2 絶縁膜を全面に形成後、リッジの上部にのみ窓を形成
し電極を形成する。
According to the present invention, as described above, n-InP
A SiO 2 mask is formed on the substrate and etching is performed to form a mesa stripe. A high resistance layer is embedded and grown on both sides of the mesa stripe to flatten the device.
Next, an n-InP clad layer, an active layer, and p-InP
A clad layer and a p-InGaAsP contact layer are sequentially grown. Next, a SiO 2 stripe mask is formed, and a ridge is formed by etching. Next, SiO
2 After forming an insulating film on the entire surface, a window is formed only on the ridge and an electrode is formed.

【0008】このようにして、リッジウェイブガイド半
導体レーザの活性層の下に高抵抗電流ブロック層を導入
することにより、閾電流値の低減、発光効率の向上を図
ることができる。
In this way, by introducing the high resistance current blocking layer below the active layer of the ridge waveguide semiconductor laser, the threshold current value can be reduced and the light emission efficiency can be improved.

【0009】[0009]

【実施例】以下、本発明の実施例について図面を参照し
ながら詳細に説明する。図1は本発明の実施例を示すリ
ッジウェイブガイド半導体レーザの製造工程断面図であ
る。 (1)まず、図1(a)に示すように、n−InP基板
11上に、幅W1のSiO2 マスク12を形成し、エッ
チングを行いメサストライプ11Aを形成する。ここ
で、幅W1は狭い方が良いが、W2〔図1(d)参照〕
よりも広くする。
Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a sectional view of a manufacturing process of a ridge waveguide semiconductor laser showing an embodiment of the present invention. (1) First, as shown in FIG. 1A, a SiO 2 mask 12 having a width W1 is formed on an n-InP substrate 11, and etching is performed to form a mesa stripe 11A. Here, it is better that the width W1 is narrower, but W2 [see FIG. 1 (d)]
Wider than.

【0010】(2)次に、図1(b)に示すように、そ
のメサストライプ11Aの両側に高抵抗層13を埋め込
み成長させ、素子を平坦にする。 (3)次いで、図1(c)に示すように、SiO2 マス
ク12を除去した後、n−InPクラッド層14、活性
層15、p−InPクラッド層16、p−InGaAs
Pコンタクト層17を成長させる。
(2) Next, as shown in FIG. 1B, high resistance layers 13 are buried and grown on both sides of the mesa stripe 11A to flatten the element. (3) Next, as shown in FIG. 1C, after removing the SiO 2 mask 12, the n-InP clad layer 14, the active layer 15, the p-InP clad layer 16, and the p-InGaAs are formed.
The P contact layer 17 is grown.

【0011】(4)次いで、p−InGaAsPコンタ
クト層17上に、幅W2のSiO2ストライプマスク
(図示なし)を形成し、図1(d)に示すように、エッ
チングにより、幅W2のリッジ18を形成する。この
時、幅W2は横モードとなるようにする。次に、SiO
2 絶縁膜19を全面に形成する。 (5)最後に、図1(e)に示すように、リッジ18の
上部にのみ窓19Aを形成した後、p側電極20を形成
し、n−InP基板11側にはn側電極21を形成す
る。
(4) Next, an SiO 2 stripe mask (not shown) having a width W2 is formed on the p-InGaAsP contact layer 17, and as shown in FIG. 1D, the ridge 18 having a width W2 is etched. To form. At this time, the width W2 is set to the horizontal mode. Next, SiO
2 The insulating film 19 is formed on the entire surface. (5) Finally, as shown in FIG. 1E, after forming the window 19A only on the upper portion of the ridge 18, the p-side electrode 20 is formed, and the n-InP substrate 11 side is provided with the n-side electrode 21. Form.

【0012】そこで、図1(e)において、リッジウェ
イブガイド半導体レーザのp側電極20側が+になるよ
うにバイアスをかけると、p−InGaAsPコンタク
ト層17から、n−InP基板11へ向けて電流が流
れ、レーザ発振する。なお、本発明は上記実施例に限定
されるものではなく、本発明の趣旨に基づいて種々の変
形が可能であり、これらを本発明の範囲から排除するも
のではない。
Therefore, in FIG. 1E, when a bias is applied so that the p-side electrode 20 side of the ridge waveguide semiconductor laser becomes +, a current flows from the p-InGaAsP contact layer 17 toward the n-InP substrate 11. Flows and laser oscillation occurs. It should be noted that the present invention is not limited to the above embodiment, and various modifications can be made based on the gist of the present invention, and these are not excluded from the scope of the present invention.

【0013】[0013]

【発明の効果】以上、詳細に説明したように、本発明に
よれば、リッジウェイブガイド半導体レーザにおいて、
活性層の下に高抵抗電流ブロック層を導入することによ
り、閾電流値の低減、発光効率の向上を図ることができ
る。
As described above in detail, according to the present invention, in the ridge waveguide semiconductor laser,
By introducing the high resistance current blocking layer below the active layer, it is possible to reduce the threshold current value and improve the luminous efficiency.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例を示すリッジウェイブガイド半
導体レーザの製造工程断面図である。
FIG. 1 is a sectional view of a ridge waveguide semiconductor laser manufacturing process showing an embodiment of the present invention.

【図2】従来のリッジウェイブガイド半導体レーザの断
面図である。
FIG. 2 is a sectional view of a conventional ridge waveguide semiconductor laser.

【符号の説明】[Explanation of symbols]

11 n−InP基板 11A メサストライプ 12 SiO2 マスク 13 高抵抗層 14 n−InPクラッド層 15 活性層 16 p−InPクラッド層 17 p−InGaAsPコンタクト層 18 リッジ 19 SiO2 絶縁膜 19A 窓 20 p側電極 21 n側電極11 n-InP substrate 11A Mesa stripe 12 SiO 2 mask 13 High resistance layer 14 n-InP clad layer 15 Active layer 16 p-InP clad layer 17 p-InGaAsP contact layer 18 Ridge 19 SiO 2 insulating film 19A window 20 p-side electrode 21 n-side electrode

フロントページの続き (72)発明者 八重樫 浩樹 東京都港区虎ノ門1丁目7番12号 沖電気 工業株式会社内Continuation of the front page (72) Inventor Hiroki Yaegashi 1-7-12 Toranomon, Minato-ku, Tokyo Oki Electric Industry Co., Ltd.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 リッジウェイブガイド半導体レーザの製
造方法において、(a)第1導電型InP基板上にマス
クを形成し、エッチングを行いメサストライプを形成す
る工程と、(b)該メサストライプの両側に高抵抗層を
埋め込み平坦にする工程と、(c)第1導電型InPク
ラッド層と、活性層と、第2導電型InPクラッド層
と、第2導電型InGaAsPコンタクト層を順次成長
させる工程と、(d)ストライプマスクを形成し、エッ
チングによりリッジを形成する工程と、(e)絶縁膜を
全面に形成後、前記リッジの上部にのみ窓を形成し電極
を形成する工程とを施すことを特徴とするリッジウェイ
ブガイド半導体レーザの製造方法。
1. A method for manufacturing a ridge waveguide semiconductor laser, comprising: (a) a step of forming a mask on a first conductivity type InP substrate and performing etching to form a mesa stripe; and (b) both sides of the mesa stripe. And a step of (c) sequentially growing a first conductivity type InP clad layer, an active layer, a second conductivity type InP clad layer, and a second conductivity type InGaAsP contact layer. , (D) forming a stripe mask and forming a ridge by etching, and (e) forming an insulating film over the entire surface and then forming a window only above the ridge to form an electrode. A method of manufacturing a ridge waveguide semiconductor laser having a feature.
JP17530095A 1995-07-12 1995-07-12 Manufacture of ridge waveguide semiconductor laser Withdrawn JPH0927656A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17530095A JPH0927656A (en) 1995-07-12 1995-07-12 Manufacture of ridge waveguide semiconductor laser

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17530095A JPH0927656A (en) 1995-07-12 1995-07-12 Manufacture of ridge waveguide semiconductor laser

Publications (1)

Publication Number Publication Date
JPH0927656A true JPH0927656A (en) 1997-01-28

Family

ID=15993692

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17530095A Withdrawn JPH0927656A (en) 1995-07-12 1995-07-12 Manufacture of ridge waveguide semiconductor laser

Country Status (1)

Country Link
JP (1) JPH0927656A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2840689A1 (en) * 2002-06-06 2003-12-12 Silios Technologies Integrated optical waveguide having channel/optical substrate and guide layer having index above substrate and waveguide having adaptation layer extending either side channel.
CN102304818A (en) * 2011-04-29 2012-01-04 浙江海森纺机科技有限公司 Cross seat on knotless fishing net machine
CN102433682A (en) * 2011-09-20 2012-05-02 浙江海森纺机科技有限公司 Line pressing connecting rod of knotless fishing net machine
CN102433681A (en) * 2011-09-02 2012-05-02 浙江海森纺机科技有限公司 Valve part of knot-free fishing net machine
CN105826814A (en) * 2016-05-19 2016-08-03 中国科学院半导体研究所 Method of preparing indium phosphide-based narrow-ridge waveguide semiconductor laser

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2840689A1 (en) * 2002-06-06 2003-12-12 Silios Technologies Integrated optical waveguide having channel/optical substrate and guide layer having index above substrate and waveguide having adaptation layer extending either side channel.
WO2003104865A3 (en) * 2002-06-06 2006-04-20 Silios Technologies Waveguide comprising a channel and an adaptation layer
CN102304818A (en) * 2011-04-29 2012-01-04 浙江海森纺机科技有限公司 Cross seat on knotless fishing net machine
CN102433681A (en) * 2011-09-02 2012-05-02 浙江海森纺机科技有限公司 Valve part of knot-free fishing net machine
CN102433682A (en) * 2011-09-20 2012-05-02 浙江海森纺机科技有限公司 Line pressing connecting rod of knotless fishing net machine
CN105826814A (en) * 2016-05-19 2016-08-03 中国科学院半导体研究所 Method of preparing indium phosphide-based narrow-ridge waveguide semiconductor laser

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