JPH09266236A - Semiconductor device manufacturing method - Google Patents

Semiconductor device manufacturing method

Info

Publication number
JPH09266236A
JPH09266236A JP12938696A JP12938696A JPH09266236A JP H09266236 A JPH09266236 A JP H09266236A JP 12938696 A JP12938696 A JP 12938696A JP 12938696 A JP12938696 A JP 12938696A JP H09266236 A JPH09266236 A JP H09266236A
Authority
JP
Japan
Prior art keywords
elements
wafer
resin
tape
divided
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12938696A
Other languages
Japanese (ja)
Other versions
JP3483700B2 (en
Inventor
Mitsuyasu Wake
三泰 和氣
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP12938696A priority Critical patent/JP3483700B2/en
Publication of JPH09266236A publication Critical patent/JPH09266236A/en
Application granted granted Critical
Publication of JP3483700B2 publication Critical patent/JP3483700B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Die Bonding (AREA)
  • Dicing (AREA)

Abstract

PROBLEM TO BE SOLVED: To improve the pickup efficiency of elements divided from a wafer by a hardening resin is coated according to the electric characteristic of a divided element surface, separating those elements not coated with this resin and picking up and die-bonding them. SOLUTION: A wafer 1 is laid on a stage, the electric characteristics of selected elements are measured one after another, the water 1 supported on a resin tape 6 is fully cut like a grid from the surface, an UV-setting resin is spread on the surface of those elements not meeting required characteristics and hardened by an ultraviolet ray, the tape 6 is expanded through the periphery of an expandable ring 9 to separate divided elements from each other and the elements at the coated region are peeled off from the tape 6, the elements are knocked up by knockout pins 10, picked up by a suction collet and moved to lead frame tabs of a work to be bonded.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明が属する技術分野】本発明は、ウエハから分割形
成される個別半導体装置の製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing an individual semiconductor device which is divided and formed from a wafer.

【0002】[0002]

【従来の技術】ダイオードやLED等の個別半導体装置
は、ウエハの状態で不純物の拡散やエッチング並びに金
属電極膜の形成等の工程を連続的に施した後、個別の素
子に分割してダイボンディングや樹脂封止等を実施する
ことにより製造されている。これらの複数の素子はシリ
コン等の半導体材料から成るウエハ内に上述のような共
通の工程を経て一括的に形成されるのであるが、ウエハ
自体には不純物の偏析やマクロレベルでの欠陥等が不可
避的に介入するため、作り込まれる素子は、たとえ共通
の工程により形成したとしても、ウエハの領域により電
気的特性の微妙なばらつきが素子間に生じる。
2. Description of the Related Art An individual semiconductor device such as a diode or an LED is subjected to a process of diffusing and etching impurities and forming a metal electrode film continuously in a wafer state, and then divided into individual elements for die bonding. It is manufactured by carrying out resin sealing or the like. These plural elements are collectively formed in a wafer made of a semiconductor material such as silicon through the above-described common steps. However, the wafer itself has segregation of impurities and defects on a macro level. Since the devices are inevitably intervened, even if the devices to be built are formed by a common process, slight variations in electrical characteristics occur between the devices depending on the area of the wafer.

【0003】このため、ウエハに作り込まれた素子は、
一般に、個別に分割されるに先だって、それぞれの素子
表面に測定用のプローブやこれに接続されたテスタ等を
使用して電気的特性を測定することにより素子としての
所要の特性要件を満足するか否かの良否の判別や素子の
特性上の分類を行っている。とりわけ、良否の判別に際
しては、ウエハ内の全ての素子について一定項目の電気
的特性の測定を実施した上で、所要の特性を満足しない
素子については「否」と判別している。ここで、「否」
と判別された素子は、図3に示すように、顔料を混入し
たインク樹脂をドット状に塗布し及び硬化させてマーキ
ングを施した後、伸張可能な樹脂から成る樹脂テープ上
に貼着した状態でダイシングブレード等を使用したカッ
トにより個別素子に分割後、エキスパンド装置等を利用
して樹脂テープの伸張により素子間を相互に離間させた
状態で、素子表面のマーキングの有無を光学的に認識し
ながら「良」と判定されマーキングが付されていない素
子のみを選択的にリードフレームのタブ上やまたは基板
の搭載箇所にダイボンディングすることにより半導体装
置を製造している。
For this reason, the elements formed on the wafer are
In general, do you satisfy the required characteristic requirements as an element by measuring the electrical characteristics by using a measuring probe or a tester connected to this on the surface of each element before dividing it individually? Whether the quality is good or bad is determined and the characteristics of the elements are classified. In particular, when determining pass / fail, electrical characteristics of certain elements are measured for all the elements in the wafer, and then “not acceptable” is determined for elements that do not satisfy the required characteristics. Where "No"
As shown in FIG. 3, the element judged to be in a state in which the ink resin mixed with the pigment is applied in a dot shape and cured to make a marking, and then the element is attached to a resin tape made of an expandable resin. After dividing into individual elements by cutting with a dicing blade, etc., the presence or absence of marking on the element surface is optically recognized by separating the elements by expanding the resin tape using an expanding device etc. However, a semiconductor device is manufactured by selectively die-bonding only the elements which are determined as “good” and which are not marked, to the tab of the lead frame or to the mounting position of the substrate.

【0004】他方、近年では、半導体製造技術の発展や
小型化への要望に伴い各種の半導体素子も微細化の一途
をたどり、場合によっては単一のウエハに数万個にも及
ぶ莫大な個数の素子が形成されるに至っている。
On the other hand, in recent years, various semiconductor elements have been miniaturized with the development of semiconductor manufacturing technology and demands for miniaturization, and in some cases, a huge number of tens of thousands on a single wafer. Element has been formed.

【0005】[0005]

【発明が解決しようとする課題】しかし、単一のウエハ
上により多数の素子を形成する場合、素子ごとの電気的
特性の測定やその測定に基づく良否の判別やそのマーキ
ングに要する時間は素子数の増大に伴って大幅に増大す
る。とりわけ、ドット状のマーキングについては、通
常、インク樹脂を収容したシリンジとマーキングを施す
べき素子との間を各素子ごとにX,Y,及びZの3方向
に相対的な移動及び位置合わせを行いながら個別にドッ
ト状のインクマーキングを施しているため、場合によっ
ては7ー8時間程度もの時間をマーキングに要する場合
がある。
However, when a large number of elements are formed on a single wafer, the time required for measuring the electrical characteristics of each element, determining the quality based on the measurement, and marking the element is the number of elements. Increase significantly with increasing. In particular, for dot-shaped marking, usually, relative movement and alignment are performed between the syringe containing the ink resin and the element to be marked in the three directions of X, Y, and Z for each element. However, since dot-shaped ink marking is individually applied, it may take about 7-8 hours depending on the case.

【0006】また、このようにドット状のマーキングを
施した後も、ダイボンディングのために素子をピックア
ップする場合、測定の段階で「否」と判別された素子も
含めて全素子に対してカメラを介してマーキングの有無
を識別し、マーキングの付されていないと認識された素
子についてのみ選択的にピックアップやダイボンディン
グを行っているので、この段階でもまた無駄な時間が要
されている。
In addition, even after the dot-shaped marking is made in this way, when picking up the elements for die bonding, the camera is applied to all the elements including the elements which are determined as "no" at the measurement stage. The presence or absence of the marking is identified through the, and the pickup or die bonding is selectively performed only on the element recognized as not having the marking, so that wasteful time is required at this stage as well.

【0007】従って、本発明は、ウエハから分割された
素子のピックアップの効率を向上させた半導体装置の製
造方法を得ることを目的とする。
Therefore, it is an object of the present invention to obtain a method of manufacturing a semiconductor device in which the efficiency of picking up elements divided from a wafer is improved.

【0008】[0008]

【課題を解決するための手段】請求項1の半導体装置の
製造方法は、半導体ウエハに形成した複数の素子のうち
選択されたものについて電気的特性を測定を行うと共に
ウエハを分割し、分割した素子の表面に測定の結果に応
じて硬化性樹脂を連続状に塗布し、塗布した硬化性樹脂
を硬化させた後硬化性樹脂が塗布されていない素子を相
互に離間した状態でピックアップ及びダイボンディング
することを特徴とする。
According to a first aspect of the present invention, there is provided a method of manufacturing a semiconductor device, wherein electrical characteristics of a selected one of a plurality of elements formed on a semiconductor wafer are measured, and the wafer is divided. A curable resin is continuously applied to the surface of the element according to the measurement result, and after curing the applied curable resin, the elements not coated with the curable resin are picked up and die-bonded in a state of being separated from each other. It is characterized by doing.

【0009】このため、硬化性樹脂の塗布は、全素子に
ついて電気的測定およびそれに対するマーキングを行う
のではなく、選択的に電気的測定を行い判別を得た素
子、例えば「否」と判別された素子、に沿って硬化性樹
脂を連続状に行うことができるので、塗布に要する時間
を大幅に短縮することができる。請求項2の半導体装置
の製造方法は、請求項1の方法において、ウエハを伸張
性の樹脂テープの貼着する工程を更に含み、素子の離間
は樹脂テープの伸張により行うように構成される。
For this reason, the application of the curable resin does not perform electrical measurement and marking on all the elements, but selectively determines the elements that have been determined by electrical measurement, for example, "no". Since the curable resin can be continuously applied along the device, the time required for coating can be significantly reduced. According to a second aspect of the present invention, there is provided a method of manufacturing a semiconductor device according to the first aspect, further comprising a step of attaching a stretchable resin tape to the wafer, and separating the elements by stretching the resin tape.

【0010】本発明方法をこのように実施することによ
り、容易に本発明を実施することが可能になる。請求項
3の半導体装置の製造方法は、請求項2において、電気
的特性の測定を、ウエハの樹脂テープへの貼着の工程の
前、ウエハの樹脂テイプへの貼着とウエハの分割の工程
の間、または、ウエハの分割と硬化性樹脂の塗布の工程
の間、のいずれかに行うように構成される。
By carrying out the method of the present invention in this manner, the present invention can be easily carried out. According to a third aspect of the present invention, in the method of manufacturing a semiconductor device according to the second aspect, the measurement of the electrical characteristics is performed before the step of attaching the wafer to the resin tape, the step of attaching the wafer to the resin tape and dividing the wafer. Or during the process of dividing the wafer and applying the curable resin.

【0011】本発明方法をこのように実施することによ
り、工程の自由度は増大され、形成する素子やウエハの
種類や構造に応じた方法の実施が可能になる。
By carrying out the method of the present invention in this way, the degree of freedom in the process is increased, and it becomes possible to carry out the method according to the type and structure of the element or wafer to be formed.

【0012】[0012]

【発明の実施の形態】次に、本発明による半導体装置の
製造方法について、図1及び図2を参照しながら詳細に
説明する。本発明の製造方法では、まず、表面に複数の
電子素子が形成された半導体ウエハを準備する。ウエハ
としては、例えば、ダイオード用のP型及びN型の拡散
領域や金属電極が形成された素子が多数、例えば数万
個、表面に形成されたシリコン製の、例えば4インチ
の、ウエハを使用し得る。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, a method of manufacturing a semiconductor device according to the present invention will be described in detail with reference to FIGS. In the manufacturing method of the present invention, first, a semiconductor wafer having a plurality of electronic elements formed on its surface is prepared. As the wafer, for example, a large number of elements having P-type and N-type diffusion regions for diodes and metal electrodes are formed, for example, tens of thousands, and a silicon wafer having a surface of, for example, 4 inches is used. You can

【0013】このようなウエハを準備したら、図1
(a)に示すように、ウエハ1をテーブル2を介して
X,Y,及びZ方向に移動可能なステージ3上に搭載し
た状態で特性測定用のプローブ4を上方より用いて行方
向及び列方向に、例えば、5素子ごとに選択した素子に
ついて電気的特性の測定を順次行う。測定する電気的特
性としては、製造する素子の仕様や規格に応じて要求さ
れる電圧値や電流値等の範囲を予め決定しておく。
After preparing such a wafer, as shown in FIG.
As shown in (a), a wafer 1 is mounted on a stage 3 which can be moved in the X, Y, and Z directions via a table 2, and a probe 4 for characteristic measurement is used from the upper side in the row and column directions. In the direction, for example, the electrical characteristics of the elements selected every 5 elements are sequentially measured. As the electrical characteristics to be measured, the range of voltage value, current value, etc. required according to the specifications and standards of the element to be manufactured is determined in advance.

【0014】ここで、ウエハ内での不純物の偏析等に起
因する電気的特性のばらつきは、一般に、断続的にでは
なく連続的に生じるため、測定は必ずしも全数の素子に
ついて実施しなくても、上述のように、素子を選択的に
測定することにより電気的特性上の良否等をほぼ推定で
き、概ねの良否判別や特性上の選別が可能となる。ステ
ージ3及びプローブ4は図示しない制御装置及びこれと
接続して設けられた記憶手段、例えばフロッピィディス
ク、に電気的に接続されており、測定により得られた各
素子についての特性値及びそれらに基づく判定結果とし
ての「良」(要求特性を満足)及び「否」(要求特性を
不満足)に関するデータは図2に示されるウエハ1端面
に設けられた、図2中に示される、オリフラ(Orientati
on Flat)面1aを基準とする各素子の位置データに関連
して記憶手段に記憶保存される。
Here, since variations in electrical characteristics due to segregation of impurities in the wafer generally occur continuously rather than intermittently, the measurement does not necessarily have to be performed for all elements. As described above, by selectively measuring the elements, it is possible to almost estimate the quality of the electrical characteristics and the like, and it is possible to roughly determine the quality and select the characteristics. The stage 3 and the probe 4 are electrically connected to a control device (not shown) and storage means provided in connection with the control device, for example, a floppy disk, and are based on characteristic values of each element obtained by measurement and based on them. The data regarding "good" (satisfying the required characteristics) and "failure" (not satisfying the required characteristics) as the determination result is the orientation flat (Orientati) shown in FIG. 2 provided on the end surface of the wafer 1 shown in FIG.
It is stored and stored in the storage means in association with the position data of each element based on the (on Flat) surface 1a.

【0015】素子の特性測定を終了したら、図1(b)
に示すように、ウエハ1をその裏面にて円環状のフラッ
トリング5に取付けられた伸張性の樹脂テープ6上にフ
ラットリング5に同心状になるように貼着する。樹脂テ
ープ6はその表面に粘着性の層が形成されているので、
ウエハ1はテープ6上に容易に貼着することができる。
After the characteristic measurement of the device is completed, FIG.
As shown in FIG. 5, the wafer 1 is attached to the flat ring 5 concentrically on the stretchable resin tape 6 attached to the annular flat ring 5 on the back surface thereof. Since the resin tape 6 has an adhesive layer formed on its surface,
The wafer 1 can be easily attached to the tape 6.

【0016】次いで、このように樹脂テープ6上に支持
したウエハ1をその表面側からダイシングブレード7を
使用して、図2に最良に示されるように、格子状のフル
カットによる分割を施すことにより、例えば1辺約3m
mの、立方体状の個別化されたダイオード素子が得られ
る。このようにウエハ1を分割したら、図1(c)に示
すように、フラットリング5ごとステージ3のテーブル
2上に固定して、ステージ3をX及びY方向(水平方
向)またはX,Y,及びZ方向(水平及び垂直方向)に
移動させながらシリンジ8内に収容した硬化性の液状樹
脂、例えばUV硬化性樹脂、を上述の測定で「否」と判
定された素子の表面に沿って連続状に塗布する。塗布
は、分割された素子間を跨ぐように行い、より具体的に
は、図2に示す例のように、上述の測定により求められ
た素子位置や良否等の判別データに関する記憶手段及び
制御装置からの電気信号に基づいて測定結果から「否」
と判別された素子であってそれらの素子によりウエハ面
に画成される領域(以下「塗布領域」という)11に包
含される素子の表面をステージ3をシリンジ3に対して
X及びY方向に位置合わせ及び移動することにより行
う。
Next, the wafer 1 thus supported on the resin tape 6 is divided from the surface side by a dicing blade 7 by a grid-like full cut as best shown in FIG. Depending, for example, one side is about 3m
m, cubic individualized diode elements are obtained. After the wafer 1 is divided in this way, as shown in FIG. 1C, the flat ring 5 is fixed on the table 2 of the stage 3, and the stage 3 is moved in the X and Y directions (horizontal direction) or X, Y ,. And a curable liquid resin, such as a UV curable resin, housed in the syringe 8 while being moved in the Z direction (horizontal and vertical directions) continuously along the surface of the element determined to be “NO” in the above measurement. Apply in a striped pattern. The coating is performed so as to straddle the divided elements, and more specifically, as in the example shown in FIG. 2, a storage unit and a control device for the determination data such as the element position and the quality determined by the above measurement. "No" from the measurement result based on the electrical signal from
The surface of the element which is determined to be the element and which is included in an area (hereinafter referred to as “coating area”) 11 defined by the elements on the wafer surface is mounted on the stage 3 in the X and Y directions with respect to the syringe 3. This is done by aligning and moving.

【0017】使用する硬化性樹脂としては、上述のよう
な、紫外線の照射により簡易に硬化可能なUV硬化樹脂
に代えて、加熱により硬化する熱硬化性樹脂も同様に使
用可能である。このように硬化性樹脂を塗布したら、紫
外線を上方から照射する等によって硬化させた後、図1
(d)に示すように、通常のエキスパンドと同様に、樹
脂テープ6をエキスパンド装置に取付けた状態でエキス
パンド装置のエキスパンドリング9の外周を介して伸張
させることにより分割した素子同士を離間する。この樹
脂テープ6の伸張に際しては、特性測定時に「良」と判
定された素子、即ち塗布領域外の素子、は伸張に伴い一
定間隔で相互に離間される一方、塗布領域の素子同士は
硬化した硬化樹脂を介して相互に接着されるため、離間
が妨げられ樹脂テープ6から剥離される。
As the curable resin to be used, instead of the UV curable resin which can be easily cured by irradiation with ultraviolet rays as described above, a thermosetting resin which is cured by heating can be used as well. After the curable resin is applied in this manner, it is cured by irradiating it with ultraviolet rays from above, and then, as shown in FIG.
As shown in (d), the divided elements are separated from each other by extending the resin tape 6 attached to the expander through the outer circumference of the expand ring 9 of the expander as in the ordinary expander. When the resin tape 6 is stretched, the elements judged as “good” at the time of the characteristic measurement, that is, the elements outside the application area, are separated from each other at a constant interval along with the extension, while the elements in the application area are cured. Since they are adhered to each other via the cured resin, they are separated from each other and are separated from the resin tape 6.

【0018】このような素子間の接着に際して、硬化樹
脂の塗布厚さ等を適宜調整することにより樹脂テープ6
の伸張により適当に破断される程度の強度で接着でき
る。そのため、多連状に接合された部分、例えば図2中
のウエハ周縁塗布領域11a、については素子間の任意
の箇所で分断されることになるので、エキスパンドに支
障が生じることはない。
At the time of adhering such elements, the resin tape 6 can be prepared by appropriately adjusting the coating thickness of the cured resin.
It can be bonded with a strength such that it can be appropriately broken by stretching. Therefore, the portion joined in a multi-layered manner, for example, the wafer peripheral edge coating region 11a in FIG. 2 is divided at any place between the elements, so that there is no problem in expanding.

【0019】樹脂テープ6のエキスパンドにより剥離さ
れた素子は、例えばピンセット等を使用して、テープ6
から容易に除去することができる。このように塗布領域
の素子を除去したら、図示しないカメラにより離間され
た素子の位置及び存在を確認しながら、突き上げピン1
0により素子を突き上げると共に図示しない吸着コレッ
トにより突き上げた素子をピックアップして被ボンディ
ング体としてのリードフレームのタブ等に順次移送及び
載置することによりダイボンディング工程を実施する。
The element separated by the expansion of the resin tape 6 is attached to the tape 6 by using, for example, tweezers.
Can be easily removed from. After removing the elements in the application region in this manner, the push-up pin 1 is checked while confirming the position and existence of the elements separated by a camera (not shown).
The element is pushed up by 0, and the element pushed up by a suction collet (not shown) is picked up and sequentially transferred and placed on a tab or the like of a lead frame as an object to be bonded to perform a die bonding process.

【0020】このようにダイボンディングされた素子
は、必要な組立工程、例えばワイヤボンディング工程や
樹脂封止工程等を施すことにより個別半導体装置が製造
される。尚、本発明の方法では、特性判別を選択した素
子について推定的に行うので、特性上本来「否」と判別
されるべき素子も「良」と判別された素子と共に組立工
程が施される可能性もあるが、組立工程を経た後の素子
または装置は全数が通常の検査工程で必要な電気特性等
検査により除去可能であり問題が生じることはほとんど
ない。
The thus die-bonded element is subjected to a necessary assembly process such as a wire bonding process or a resin sealing process to manufacture an individual semiconductor device. In addition, in the method of the present invention, the characteristic determination is presumably performed for the selected element, so that an element that should originally be determined as “not” in terms of characteristics can be subjected to the assembly process together with the element determined as “good”. However, all the elements or devices after the assembly process can be removed by the inspection of the electrical characteristics and the like required in the normal inspection process, and there is almost no problem.

【0021】尚、上述した例では、素子の電気的特性の
測定をウエハの樹脂テープへの貼着に先だって行った
が、測定はウエハに形成した素子の種類や構造、例えば
裏面電極の有無やウエハ基板の材料等に応じて、上記ウ
エハの貼着と分割の工程の間、または分割と硬化性樹脂
の工程の間等で実施することも可能であることはいうま
でもない。
In the above example, the electrical characteristics of the device were measured prior to the attachment of the wafer to the resin tape. However, the measurement was performed on the type and structure of the device formed on the wafer, for example, the presence or absence of the back electrode. It goes without saying that it may be performed between the steps of attaching and dividing the wafer, or between the step of dividing and the curable resin, depending on the material of the wafer substrate.

【0022】上述した例では、測定する素子を行方向及
び列方向に5素子ごとに選択したが、このような選択は
製造する半導体装置の仕様や規格に応じて適宜変更可能
であることはいうまでもない。また、本発明方法は上述
したような素子の良否の選別にかぎられるものではな
く、測定による特性値に応じた級分け等についても適用
可能である。
In the above-mentioned example, the elements to be measured are selected every 5 elements in the row direction and the column direction, but such selection can be appropriately changed according to the specifications and standards of the semiconductor device to be manufactured. There is no end. Further, the method of the present invention is not limited to the above-described selection of the quality of the element, but can be applied to classification according to the characteristic value by measurement.

【0023】[0023]

【発明の効果】以上詳細に説明したように、本発明の方
法によれば、硬化性樹脂の塗布は、全素子について電気
的測定およびそれに対するマーキングを行うのではな
く、選択的に電気的測定を行い判別を得た素子、例えば
「否」と判別された素子、に沿って硬化性樹脂を連続状
に行うことができるので、塗布に要する時間を大幅に短
縮することができる。
As described above in detail, according to the method of the present invention, the application of the curable resin does not perform electrical measurement and marking on all elements, but selectively performs electrical measurement. Since the curable resin can be continuously applied along the element determined by performing the above, for example, the element determined to be “no”, the time required for coating can be significantly reduced.

【0024】また、複数の素子が形成された後であって
硬化性樹脂の塗布の前に半導体ウエハを伸張可能な樹脂
テープ上に貼着し、硬化性樹脂の硬化後に樹脂テープを
伸張させることにより素子を相互に離間させることによ
り、樹脂テープの伸張に伴い硬化性樹脂の硬化により固
着された複数の素子は相互に離間されることなく樹脂テ
ープから剥離されるので、樹脂テープ表面から容易に除
去することができ、従って、これらの除去後に残る素子
をピックアップ及びダイボンディングすることにより、
これらに要する時間を大幅に短縮することができる。
Further, after the plurality of elements are formed and before the application of the curable resin, the semiconductor wafer is attached onto the expandable resin tape, and the resin tape is expanded after the curable resin is cured. By separating the elements from each other by the resin tape, the plurality of elements fixed by the hardening of the curable resin as the resin tape is stretched are separated from the resin tape without being separated from each other. Can be removed, and thus by picking up and die bonding the remaining elements after these removal,
The time required for these can be significantly reduced.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の製造方法の主要な工程を示す概略図で
ある。
FIG. 1 is a schematic view showing main steps of a manufacturing method of the present invention.

【図2】本発明の製造方法による硬化性樹脂の塗布の例
を示す平面図である。
FIG. 2 is a plan view showing an example of application of a curable resin according to the manufacturing method of the present invention.

【図3】従来の方法によるインクマーキングの例を示す
平面図である。
FIG. 3 is a plan view showing an example of ink marking by a conventional method.

【符号の説明】[Explanation of symbols]

1 半導体ウエハ 2 テーブル 3 ステージ 4 プローブ 5 フラットリング 6 樹脂テープ 7 ダイシングブレード 8 シリンジ 9 エキスパンドリング 10 突き上げピン 11 塗布領域 1 Semiconductor Wafer 2 Table 3 Stage 4 Probe 5 Flat Ring 6 Resin Tape 7 Dicing Blade 8 Syringe 9 Expanding Ring 10 Push-up Pin 11 Application Area

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】半導体ウエハに形成した複数の素子のうち
選択されたものについて電気的特性の測定を行うと共に
前記ウエハを分割し、分割した素子の表面に前記測定の
結果に応じて硬化性樹脂を連続状に塗布し、塗布した硬
化性樹脂を硬化させた後硬化性樹脂が塗布されていない
素子を相互に離間した状態でピックアップ及びダイボン
ディングすることを特徴とする半導体装置の製造方法。
1. The electrical characteristics of selected ones of a plurality of elements formed on a semiconductor wafer are measured, the wafer is divided, and a curable resin is applied to the surfaces of the divided elements according to the result of the measurement. Is continuously applied, the applied curable resin is cured, and then the elements not coated with the curable resin are picked up and die-bonded in a state of being separated from each other, and a method for manufacturing a semiconductor device.
【請求項2】前記製造方法は前記ウエハを伸張性の樹脂
テープに貼着する工程をさらに含み、前記素子の離間は
前記樹脂テープの伸張により行う請求項1に記載の半導
体装置の製造方法。
2. The method of manufacturing a semiconductor device according to claim 1, wherein the manufacturing method further includes a step of adhering the wafer to a stretchable resin tape, and separating the elements by stretching the resin tape.
【請求項3】前記電気的特性の測定は、前記ウエハの前
記樹脂テープへの貼着の工程の前、前記ウエハの前記樹
脂テープへの貼着と前記ウエハの分割の工程の間、また
は、前記ウエハの分割と前記硬化性樹脂の塗布の工程の
間、のいずれかに行う請求項2に記載の半導体装置の製
造方法。
3. The measurement of the electrical characteristics is performed before the step of attaching the wafer to the resin tape, during the step of attaching the wafer to the resin tape and dividing the wafer, or The method of manufacturing a semiconductor device according to claim 2, wherein the method is performed during any one of the steps of dividing the wafer and applying the curable resin.
JP12938696A 1996-01-24 1996-05-24 Method for manufacturing semiconductor device Expired - Fee Related JP3483700B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12938696A JP3483700B2 (en) 1996-01-24 1996-05-24 Method for manufacturing semiconductor device

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP8-10461 1996-01-24
JP1046196 1996-01-24
JP12938696A JP3483700B2 (en) 1996-01-24 1996-05-24 Method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JPH09266236A true JPH09266236A (en) 1997-10-07
JP3483700B2 JP3483700B2 (en) 2004-01-06

Family

ID=26345740

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12938696A Expired - Fee Related JP3483700B2 (en) 1996-01-24 1996-05-24 Method for manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JP3483700B2 (en)

Also Published As

Publication number Publication date
JP3483700B2 (en) 2004-01-06

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