JPH11204551A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

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Publication number
JPH11204551A
JPH11204551A JP715698A JP715698A JPH11204551A JP H11204551 A JPH11204551 A JP H11204551A JP 715698 A JP715698 A JP 715698A JP 715698 A JP715698 A JP 715698A JP H11204551 A JPH11204551 A JP H11204551A
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Patent type
Prior art keywords
tape
substrate
dicing
die bonding
chip
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Pending
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JP715698A
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Japanese (ja)
Inventor
Hideo Yamanaka
英雄 山中
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Sony Corp
ソニー株式会社
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836Wafer tapes, e.g. grinding or dicing support tapes
    • HELECTRICITY
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    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27Manufacturing methods
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    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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    • H01L24/741Apparatus for manufacturing means for bonding, e.g. connectors
    • H01L24/743Apparatus for manufacturing layer connectors
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    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
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    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
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    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • HELECTRICITY
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    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
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    • H01L2221/68336Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding involving stretching of the auxiliary support post dicing
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    • H01L2221/6834Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
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    • H01L2224/27Manufacturing methods
    • H01L2224/274Manufacturing methods by blanket deposition of the material of the layer connector
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    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
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    • H01L2224/741Apparatus for manufacturing means for bonding, e.g. connectors
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    • H01BASIC ELECTRIC ELEMENTS
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    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83001Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus
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    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83191Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
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    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855Hardening the adhesive by curing, i.e. thermosetting
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    • H01L2924/07802Adhesive characteristics other than chemical not being an ohmic electrical conductor
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Abstract

PROBLEM TO BE SOLVED: To prevent the chips of an adhesive layer for die bond which is generated at cutting and dividing of a substrate from being attached directly to the surface of a chip member. SOLUTION: A transparent protecting tape 3 is attached to a functional element forming part 2 of a substrate 1, and the functional element is protected by the transparent tape 3, and the back face of the substrate 1 is cut so that the substrate is made into a prescribed thickness. Then, a dicing die bond tape 4 in which an ultraviolet irradiation curing adhesive 4b and a thermosetting type resin 4c are laminated on a base film 4a is attached to the back face of the substrate 1. Then, a chip part is formed by cutting the substrate 1 without cutting or dividing the base film 4a. Then, the chip part is irradiated with ultraviolet ray, and the ultraviolet irradiation curing type adhesive 4b is hardened. Then, the chip part is picked-up loaded, and temporarily bonded on a package member by the use of the thermosetting resin 4c as an adhesive. Thereafter, the thermosetting type resin 4c is heated and hardened, and the chip member is bonded and fixed to the package member.

Description

【発明の詳細な説明】 DETAILED DESCRIPTION OF THE INVENTION

【0001】 [0001]

【発明の属する技術分野】本発明は、機能素子の動作検査を終了した後、チップ部品に形成してこれをパッケージ部材に搭載する、半導体装置の製造方法に関する。 The present invention relates to, after completion of the operation test of the functional element, equipped with the forming the chip component package member, a method of manufacturing a semiconductor device.

【0002】 [0002]

【従来の技術】一般に半導体装置を製造するにあたっては、シリコン等の基板(ウエハ)に多数の機能素子を形成し、その後基板の状態でこれら機能素子の動作試験を行っている。 In manufacturing the semiconductor device of the Prior Art Generally, a large number of functional elements formed on a substrate such as silicon (wafer), performs an operation test of these functional elements in the subsequent substrate in the state. また、動作試験を行った後には、この基板を各機能素子毎に分割してチップ部品とし、このチップ部品を所定のパッケージ部材に固定・搭載して電気的な配線を行い、モールド樹脂による封止や中空パッケージでの気密封止等のパッケージを行って製品を完成させている。 Further, after the operation test, the chip component by dividing the substrate for each functional element performs electrical wiring fixed-mounting the chip component to a predetermined package member, sealing by a molding resin and to complete the product carried out the package of hermetic sealing or the like in the stop and the hollow package.

【0003】ところで、基板を各機能素子毎に分割するにあたっては、分割により形成されたチップがバラバラにならないよう、基板の裏面側に予めダイシング用粘着テープを貼合しておき、その状態で該粘着テープを切断分離することなくダイサーによって基板を切断分割し、 Meanwhile, in order to divide the substrate into each functional element, so that the chips formed by the division is not apart, previously pasted in advance dicing adhesive tape on the back surface side of the substrate, said at that state dicer without cutting separating adhesive tape is cut divides the substrate,
チップ部品を形成している。 To form a chip parts. そして、この後必要があればダイシング用粘着テープを延伸してチップ部品間の間隙を拡張し、ダイボンダーの角錐コレットまたは平コレットでチップ部品をピックアップする。 Then, to expand the gap between the chip component by stretching dicing adhesive tape if necessary thereafter, picks up the chip components in a pyramid collet or flat collet die bonder.

【0004】また、このチップ部品をパッケージ部材に固定・搭載して電気的な配線を行う場合、予めディスペンサーによってリードフレームのダイパッド部に導電ペースト、例えば銀ペーストを塗布しておき、そのうえにチップ部品をマウントして仮接着し、銀ペーストを加熱硬化して本接着を行っている。 Further, when performing electrical wiring fixed-mounting the chip component in a package member, a conductive paste on the die pad of the lead frame beforehand by a dispenser, for example, a silver paste leave coated Sonoueni chip components mount temporarily bonded, doing this bonding silver paste heat cured to. しかしながら、このようなディスペンサーによる塗布方式では吐出量の安定性に問題があり、導電性または絶縁性ペーストのはみだしやチップ汚染、接着面積のバラツキ、接着強度のバラツキ等の不都合を招いてしまう。 However, such in accordance with the coating method, dispenser has a problem in stability of discharge amount, protrusion and chip contamination conductive or insulating paste, variation in adhesion area, which leads to problems such as variation in bond strength.

【0005】このような背景から、近年、ダイシングテープとしての機能とダイボンディング材としての機能を兼ね備えたダイシング−ダイボンド用テープが提供され、実用に供されている。 [0005] Against this background, in recent years, dicing combines the function of a function and a die bonding material as the dicing tape - die bonding tape is provided, it has been put to practical use. このダイシング−ダイボンド用テープは、ベースフィルム上に紫外線照射硬化型接着剤と熱硬化型樹脂とがこの順に積層されて構成されたもので、その熱硬化型樹脂側が貼着側として前記基板の裏面に貼合され用いられるようになっている。 Dicing - die bonding tape, in which the ultraviolet radiation-curable adhesive and thermosetting resin is formed by laminating in this order on a base film, the back surface of the substrate as a call-in the heat-curable resin side cemented adapted to be used are lamination on. そして、このようにして貼合されその後基板が切断分割されると、 When thereafter the substrate stuck in this way is cut and divided,
ダイボンディング材として機能する熱硬化型樹脂はベースフィルムおよび紫外線照射硬化型接着剤から分離してチップ部品の裏面にそのまま残り、パッケージ部材とチップ部品との間の接着剤となる。 Thermosetting resins functioning as a die bonding material remain intact on the back surface of the chip component is separated from the base film and an ultraviolet radiation curable adhesive, the adhesive between the package member and the chip component.

【0006】したがって、基板の切断分割(ダイシング)直後に、すでにチップ部品の裏面全体に熱硬化型樹脂からなるダイボンド用の接着層が均一の厚みで確実に存在していることから、このチップ部品をパッケージ部材に固定・搭載する際に導電性または絶縁性ペーストをリードフレームに塗布する必要がなくなり、したがって高精度のディスペンサーなどが必要なくなり、もちろん前述したようなペーストのはみだしやチップ汚染、接着面積のバラツキ、接着強度のバラツキ等もなくなる。 Accordingly, immediately after cutting and dividing the substrate (dicing), already from the adhesive layer for die bonding comprising a thermosetting resin on the entire back surface of the chip component is present reliably with a uniform thickness, the chip component the conductive or insulating paste eliminates the need for coating the lead frame when fixing and mounted on the package member, therefore such high-precision dispenser no longer necessary, of course protrude and chip contamination of the paste as described above, the bonding area no of variation, also variations in adhesion strength. なお、ダイボンド用の接着層を構成する熱硬化型樹脂としては、導電性のものと非導電性のものがあり、それぞれ必要に応じて適宜選択使用されるようになっている。 As the thermosetting resin constituting the adhesive layer for die bonding, are as those of the conductive and non-conductive, and is appropriately selected and used as needed, respectively.

【0007】 [0007]

【発明が解決しようとする課題】しかしながら、前記のようなダイシング−ダイボンド用テープを用いても、基板を切断分割(ダイシング)した際、該ダイシング−ダイボンド用テープのうち少なくとも熱硬化型樹脂からなるダイボンド用の接着層がフルカットされるので、その切削屑がチップ部品表面に残ってしまうことがある。 [SUMMARY OF THE INVENTION However, the dicing as - even with the die bonding tape, when the cutting and dividing a substrate (dicing), the dicing - consisting die bonding at least thermosetting resin of the tape since the adhesive layer for die bonding is fully cut, there is that the cutting chips is left on the chip component surface. すると、ダイボンド用の接着層が導電性の銀含有エポキシ系接着剤からなる場合には、電気的な特性の不良を招いてしまい、結果として歩留、品質が低下してしまう。 Then, when the adhesive layer for die bonding is made of a conductive silver epoxy-based adhesive, which could lead to failure of the electrical characteristics, yield as a result, the quality is degraded. また、ダイボンド用の接着層が非導電性エポキシ系接着剤からなる場合でも、これがAlパッドの表面に残るとワイヤボンド付き不良を引き起こしてしまう。 Further, even when the adhesive layer for die bonding is made of a non-conductive epoxy adhesive, which would cause remains the defect with wire bonded to the surface of the Al pad.

【0008】本発明は前記事情に鑑みてなされたもので、その目的とするところは、基板を切断分割した際に発生するダイボンド用の接着層の切削屑に起因する不都合を解消した、半導体装置の製造方法を提供することにある。 [0008] The present invention has been made in view of the above circumstances, it is an object to eliminate a disadvantage due to the cutting chips of the adhesive layer for die bonding that occurs upon cutting and dividing the substrate, a semiconductor device to provide a method of manufacturing.

【0009】 [0009]

【課題を解決するための手段】本発明の半導体装置の製造方法では、複数の機能素子を表面に形成し、これら機能素子の動作検査を済ませた後の基板の機能素子形成部に透明保護テープを貼合する工程と、前記透明保護テープで前記機能素子を保護しつつ前記基板の裏面研削または裏面研削と裏面エッチングで該基板を所定の厚さにする工程と、ベースフィルム上に紫外線照射硬化型接着剤と熱硬化型樹脂とをこの順に積層してダイシングテープとしての機能とダイボンディング材としての機能を兼ね備えたダイシング−ダイボンド用テープを、その熱硬化型樹脂側を貼着側として前記基板の裏面に貼合する工程と、前記ダイシング−ダイボンド用テープのベースフィルムを切断分離することなく、前記基板を切断して複数の機能素子毎に分 In the method of manufacturing the semiconductor device of the present invention, in order to solve the problems], a plurality of functional elements formed on the surface, the transparent protective tape to the functional element forming portion of the substrate after finished the operation test of these functional elements a step of the substrate to a predetermined thickness and a step of bonding, the back grinding or back surface grinding and backside etching of the substrate while protecting said functional element in the transparent protective tape, ultraviolet radiation curing on a base film the substrate die bonding tape, the thermosetting resin side as sticking side - the type adhesive and thermosetting resin dicing that combines the function of a function and a die bonding material as the dicing tape are laminated in this order a step of laminating the back surface of the dicing - without cutting separating the base film of the tape for die bonding, minute for each of the plurality of functional elements by cutting the substrate し、チップ部品を形成する工程と、 And a step of forming a chip component,
前記チップ部品の少なくとも裏面側に紫外線を照射処理して前記ダイシング−ダイボンド用テープの紫外線照射硬化型接着剤を硬化させる工程と、前記紫外線照射処理後のチップ部品を前記ダイシング−ダイボンド用テープからピックアップし、前記ダイシング−ダイボンド用テープの熱硬化型樹脂を接着剤として所定のパッケージ部材に搭載し仮接着する工程と、前記熱硬化型樹脂を加熱硬化させてチップ部品を前記パッケージ部材に接着固定する工程と、を備えてなることを前記課題の解決手段とした。 Wherein by irradiation treatment with ultraviolet rays to at least the back surface side of the chip component dicing - curing the tape of the ultraviolet radiation curable adhesive for die bonding, the chip component after the ultraviolet irradiation processing the dicing - picked up from the die bonding tape and, the dicing - a step of mounting temporarily bonded to a predetermined package member tapes thermosetting resin for die bonding as an adhesive, the thermosetting resin and cured by heating to form bonded and fixed to the chip component to the package member a step, in that it comprises an was solutions of the problems.

【0010】この半導体装置の製造方法によれば、基板を切断して複数のチップ部品を形成するに先立ち、基板の機能素子形成部に透明保護テープを貼合するので、該基板を切断分割してチップ部品を形成した際にダイボンド用の接着層の切削屑が発生しても、この切削屑がチップ部品の表面に直接付着することがなく、したがってこの切削屑に起因する不都合が防止される。 According to this method of manufacturing a semiconductor device, by cutting the substrate prior to forming a plurality of chip components, since laminating a transparent protective tape to the functional element forming portion of the substrate, and cutting and dividing the substrate shavings of the adhesive layer for die bonding is also generated, without the cutting chips from adhering directly to the surface of the chip component, thus the disadvantage caused by the shavings are prevented at the time of forming the chip component Te .

【0011】 [0011]

【発明の実施の形態】以下、本発明の半導体装置の製造方法をその一実施形態例に基づいて詳しく説明する。 BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, will be described in detail with reference to a method of manufacturing a semiconductor device of the present invention to an exemplary embodiment thereof. この実施形態例では、まず、図1(a)に示すように基板(ウエハ)1の表層部に予め多数の機能素子を設けて素子形成部(機能素子形成部)2を形成し、これら機能素子の動作検査を済ませた後の基板1を用意する。 In this embodiment, first, FIGS. 1 (a) a substrate as shown in (a wafer) element forming portion is provided in advance a number of functional elements in the surface layer of 1 (functional element forming portion) 2 is formed, these functions preparing a substrate 1 after finished the operation test of the device. ここで、機能素子として具体的には、シリコンのバイポーラIC、MOSIC、CCDや化合物半導体(GaAs) Here, specifically as a functional element, silicon bipolar IC, MOSIC, CCD or a compound semiconductor (GaAs)
ICなどが挙げられる。 Such as IC and the like. なお、機能素子の動作検査において不良マーキングとしてはBadインクマーク方式でなくマッピング方式が採用される。 Incidentally, the mapping scheme not Bad ink mark method is adopted as a defective marking in the operation test of the functional element.

【0012】次に、このような構成の基板1の素子形成部2に、図1(b)に示すように保護テープ3を貼合する。 [0012] Then, the element formation part 2 of the substrate 1 having such a structure, laminating the protective tape 3 as shown in FIG. 1 (b). この保護テープ3としては、ダイシングおよびダイボンドオートアライメントを行う上で透明のものが用いられ、またこの例においては紫外線照射硬化型接着剤であり、かつ熱収縮自己剥離型ベースフィルムのものが用いられている。 As the protective tape 3, those transparent in performing dicing and die bonding automatic alignment is used, also a UV radiation curable adhesive in this example, and is used as the heat-shrinkable self-peeling the base film ing. すなわち、この保護テープ3は、例えば厚さ40μm程度のベースフィルム3aに厚さ20μm That is, the thickness 20μm on the protective tape 3, for example, a thickness of about 40μm of the base film 3a
程度の紫外線照射硬化型樹脂からなる接着層3bを形成したものである。 It is obtained by forming an adhesive layer 3b made of the extent of ultraviolet radiation curable resin. ベースフィルム3aとしては、例えばポリオレフィン系やポリプロピレン系などの熱収縮性がありしたがって自己剥離性があるものが用いられ、また接着層3bとしては、アクリル系のものなどが用いられ、糊残りのないタイプが必要である。 The base film 3a, for example, heat-shrinkable, such as polyolefin or polypropylene is there thus is used which is self-releasing, and as the adhesive layer 3b, are used such as acrylic, adhesive residue-free type is required.

【0013】次に、図1(c)に示すように保護フィルム3を貼合した状態のままで、すなわち該保護テープ3 [0013] Next, in the state in which stuck a protective film 3 as shown in FIG. 1 (c), i.e. the protective tape 3
で素子形成部2の機能素子を保護しつつ、前記基板1の裏面研削(バックグラインド)を行い、該基板1を所定の厚さにする。 In while protecting the functional elements of the element forming unit 2 performs back-grinding of the substrate 1 (back grinding), the substrate 1 to a predetermined thickness. このバックグラインドでは、まず#32 In this back-grinding, First # 32
0番手の砥石で粗研削を行い、その後精密研削(例えば#2000番手の砥石)で400μmの厚さにまで研削を行う。 Performs rough grinding at 0 fastest of the grinding wheel performs grinding in subsequent precision grinding (for example, # 2000 fastest grindstone) to a thickness of 400 [mu] m. そして、必要に応じて基板1の裏面にHF−H Then, the back surface of the substrate 1 as required HF-H
NO 3系エッチング液でのシリコンエッチングを施し、 Subjected to silicon etching in NO 3 etchant,
研削で生じた基板1の歪みを取り除いておく。 Keep removing the distortion of the substrate 1 produced in the grinding. なお、シリコン裏面エッチングする場合は、耐酸性の保護テープとすることが必要である。 In the case of silicon backside etch, it is necessary that the acid resistance of the protective tape. また、シリコンエッチング液に長く触れないような方法、例えばスピンエッチングが望ましい。 Further, a method that does not touch long silicon etching solution, for example, spin etching is desirable.

【0014】このようにして裏面研削を行ったら、図2 [0014] After grinding the back surface in this way, as shown in FIG. 2
(a)に示すようにこの研削後の基板1の裏面(研削面)にダイシング−ダイボンド用テープ4を貼合する。 (A) As shown in dicing the back surface of the substrate 1 after the grinding (grinding surface) - laminating a tape 4 for die bonding.
このテープ4は、厚さ90μm程度のベースフィルム4 The tape 4, a thickness of about 90μm base film 4
a上に厚さ10〜30μm程度の紫外線照射硬化型接着剤4bと厚さ10〜30μm程度の熱硬化型樹脂4cとをこの順に積層し、ダイシングテープとしての機能とダイボンディング材としての機能を兼ね備えたもので、その熱硬化型樹脂4c側を貼着側として前記基板1の裏面に貼合されたものである。 The thickness 10~30μm about ultraviolet radiation-curable adhesive 4b and thickness 10~30μm about thermosetting resin 4c laminated in this order on a, the function of the function and the die bonding material as a dicing tape in which he combines, in which stuck to the back surface of the substrate 1 and the thermosetting resin 4c side as sticking side. ベースフィルム4aはポリオレフィン系樹脂等からなり、紫外線照射硬化型接着剤4 The base film 4a is made of a polyolefin-based resin, ultraviolet radiation curable adhesive 4
bは不飽和結合を2個以上有する付加重合性化合物やエポキシ基を有するアルコキシシラン等の光重合性化合物と、光重合開始剤とを配合してなるものであり、熱硬化型樹脂4cはエポキシ樹脂等からなるものである。 b are those obtained by blending a photopolymerizable compound such as alkoxysilane having an addition-polymerizable compound and an epoxy group having 2 or more unsaturated bonds, and a photopolymerization initiator, a thermosetting resin 4c epoxy it is made of a resin or the like.

【0015】次いで、図2(b)に示すようにダイシング−ダイボンド用テープ4のベースフィルム4aを切断分離することなく、前記基板1をフルカットダイシングして複数の機能素子毎に分割し、多数のチップ部品5… [0015] Next, dicing as shown in FIG. 2 (b) - without cutting separating the base film 4a of the die bonding tape 4, the substrate 1 by full-cut dicing is divided for each of the plurality of functional elements, a number of the chip component 5 ...
を形成する。 To form. なお、このフルカットダイシングについては、ベースフィルム4aを30〜40μm程度切り込むように行うことで、基板1の切断残りが生じたり、ベースフィルム4aが切断によって分断(分離)されてしまうといった不都合を回避することができる。 Note that the full-cut dicing, by performing the base film 4a to incise about 30 to 40 .mu.m, cut remainder or resulting substrate 1, avoiding the disadvantage base film 4a from being separated (separation) by cleavage can do.

【0016】このようにして基板1をフルカットダイシングすると、当然基板1の切削屑が生じるものの、基板1の素子形成部2側には予め保護テープ3が貼合されているので、生じた切削屑がチップ部品5に残ってその素子形成部2上に付着してしまうといったことが回避される。 [0016] In this way, the full-cut dicing of the substrate 1, of course although shavings of the substrate 1 occurs, since the element forming portion 2 side of the substrate 1 is stuck in advance protective tape 3, resulting cutting debris is avoided that such adheres thereon element forming portion 2 remains in the chip component 5.

【0017】次いで、ベースフィルム4aの残っている多数のチップ部品5…に対し、特にダイシング−ダイボンド用テープ4と保護フィルム3とに照射するべく紫外線を所定量(例えば−各々200mJ/cm 2程度)で照射し、ダイシング−ダイボンド用テープ4の紫外線照射硬化型接着剤4bおよび保護テープ3の接着層3bを硬化させる。 [0017] Then, for a number of chip components 5 ... remaining of the base film 4a, particularly dicing - die bonding predetermined amount ultraviolet to be irradiated to the tape 4 and the protective film 3 (e.g. - each 200 mJ / cm 2 about irradiated with), dicing - ultraviolet radiation-curable adhesive of the die bonding tape 4 4b and to cure the adhesive layer 3b of the protective tape 3.

【0018】このようにして紫外線照射処理を行ったら、図2(c)に示すようにチップ部品5を前記ダイシング−ダイボンド用テープ4からピックアップし、図3 [0018] After this manner subjected to ultraviolet irradiation treatment, a chip component 5 the dicing, as shown in FIG. 2 (c) - were picked up from the die bonding tape 4, 3
(a)に示すようにモールドパッケージ用のリードフレームにおけるダイパッド部(パッケージ部材)6上に、 Die pad of the lead frame of the mold package as shown in (a) to (package member) 6 on,
あるいは図4(a)に示すように中空パッケージのダイパッド部(パッケージ部材)7上に搭載し仮接着する。 Alternatively the die pad portion of the hollow package is mounted on (package member) 7 is temporarily bonded, as shown in Figure 4 (a).
このとき、この仮接着にあたっては、前記ダイシング− At this time, when the temporary bonding, the dicing -
ダイボンド用テープ4の熱硬化型樹脂4cを接着剤としてチップ部品5とダイパッド部6(あるいはダイパッド部7)との間を接着させるので、従来のごとく銀ペーストをディスペンサーで塗布するといった必要がなくなる。 Since adhering between the thermosetting resin 4c of the die bonding tape 4 and the chip component 5 and the die pad 6 as an adhesive (or a die pad section 7), there is no need such a conventional as silver paste is applied by a dispenser.

【0019】なお、リードフレームや中空パッケージについては、そのダイパッド部6(7)にチップ部品5を搭載するに先立って60〜80℃程度に加熱しておき、 [0019] Note that a lead frame or a hollow package, kept heated at about 60-80 ° C. prior to mounting the chip components 5 on the die pad 6 (7),
前述した熱硬化型樹脂4cによる仮接着を促進しておく。 Keep promoting temporarily bonded by thermosetting resin 4c described above. したがって、ガラス転移温度が低めのタイプを選択することが望ましい。 Therefore, it is desirable that the glass transition temperature to choose a lower type. また、チップ部品5のピックアップについては、図2(c)に示したように平コレット8 As for the pickup of the chip component 5, flat collet 8 as shown in FIG. 2 (c)
を用いて行っている。 It is performed by using the. このように平コレット8を用いると、角錐コレットを用いた場合にはチップ部品5のサイズに応じて専用のコレットが必要となっていたものの、 With such use of the flat collet 8, although in the case of using the pyramid collet was necessary dedicated collet according to the size of the chip component 5,
平コレット8はサイズに関係なく使用することができることから、コレットを専用化する必要がなくなり、このためチップ部品サイズの種類に応じて多数のコレットを用意しておく必要がなくなる。 Flat collet 8 from being able to use regardless of size, it is not necessary to dedicate collet Therefore it is not necessary to be prepared a number of the collet according to the type of the chip component size. また、このピックアップを行う際、チップ部品5にはその素子形成部2を覆った状態に保護テープ3が貼合されているので、素子形成部2が平コレット8に直接当接することがなく、したがって素子形成部2にキズがついたり汚れが付着するといったことが防止される。 Also, the time of performing the pickup, since the chip component 5 is the element forming portion protective tape 3 2 in a state of covering the are stuck, without element forming portion 2 abuts directly the flat collet 8, Thus dirty or scratched in the element forming portion 2 is prevented from such adhered.

【0020】次いで、図3(b)あるいは図4(b)に示すようにチップ部品5上の保護テープ3に100〜1 [0020] Then, in FIG. 3 (b) or a protective tape 3 on the chip component 5 as shown in FIG. 4 (b) 100 to 1
20℃程度の熱風をブローし、該保護テープ3をその熱シュリンク性(自己剥離性)によって自己剥離させる。 Hot air at about 20 ° C. to blow, thereby self-peeling the protective tape 3 by the heat shrinkable (self-releasing).
同時に、自己剥離した保護テープは吸引除去する。 At the same time, the protective tape, which is self-peeling is removed by suction. そして、このようにして保護テープ3を自己剥離させたら、 Then, when this manner is self-peeling the protective tape 3,
チップ部材5をパッケージごと180℃で30〜60分間程度オーブンベークし、チップ部品5とダイパッド部6(7)との間を仮接着している熱硬化型樹脂4cを加熱硬化させ、チップ部品5を前記ダイパッド部(パッケージ部材)6(7)に接着固定する。 The tip member 5 to about 30 to 60 minutes in an oven bake at 180 ° C. per package, cured by heating the temporarily adhered to and thermosetting resin 4c between the chip component 5 and the die pad portion 6 (7), the chip component 5 the bonded and fixed to the die pad (package member) 6 (7). その後、ワイヤーボンド、モールドを行い、さらに従来と同様の工程を経ることによって半導体装置を得る。 Thereafter, wire bonding, the mold, to obtain a semiconductor device by steps similar to those of the more conventional.

【0021】このような半導体装置の製造方法にあっては、基板1をフルカットダイシングするに先立ち、基板1の素子形成部2に保護テープ3を貼合するので、フルカットダイシング時に発生する切削屑がチップ部品の表面に直接付着することがなく、したがってこの切削屑に起因する不都合を防止することができる。 The cutting in the manufacturing method of such a semiconductor device, before the substrate 1 to full-cut dicing, because laminating the protective tape 3 in the element forming portion 2 of the substrate 1, that occurs when the full-cut dicing without debris from adhering directly to the surface of the chip component, thus it is possible to prevent a disadvantage caused by the cutting chips. また、フルカットダイシング後、チップ部品5の表面に保護テープ3 Further, after the full-cut dicing, protected surface of the chip component 5 tape 3
が残るので、これをピックアップする際コレットによるキズの発生や汚れの付着がなく、平コレット8の使用を可能にすることができる。 Since remains, no adhesion of occurrence and dirt scratches by the collet when picking up this may allow the use of flat collet 8. そして、このように平コレット8を使用することにより、チップサイズ毎に交換する必要がある角錐コレットに比べ、約30%ダイボンディングの生産性を向上することができる。 By using such a flat collet 8, compared to the pyramid collet that must be replaced every chip size, it is possible to improve the productivity of about 30% die bonding. また、保護テープ3が熱収縮自己剥離型であることから、ダイボンド時における熱硬化型樹脂4cの加熱の際に該保護テープ3 Further, since the protective tape 3 is a heat shrinkable self-peeling, the protective tape 3 during the heating of the thermosetting resin 4c during die bonding
が自己収縮により自己剥離するようになり、したがって作業性が良くなり生産性が向上する。 There will be self-peeling by autogenous shrinkage, thus the workability is improved productivity is improved.

【0022】なお、前記実施形態例では保護テープ3を熱収縮自己剥離型としたが、本発明はこれに限定されることなくしたがって保護テープが熱収縮自己剥離型でなくてもよく、その場合には、フルカットダイシングし、 [0022] Note that the protective tape 3 in the embodiment was a heat shrink self-peeling, the present invention may not be therefore protective tape heat-shrinkable self-peeling type without being limited to this, if the the, full-cut dicing,
さらにピックアップしてダイパッド部6(7)に仮接着した後、熱硬化型樹脂4cの加熱硬化に先立って保護テープを剥離テープで剥離するようにすればよい。 After temporarily adhered to the die pad 6 (7) is further picked up, it is sufficient to peel the protective tape peeling tape prior to the heat curing of the thermosetting resin 4c. また、 Also,
前記実施形態例では、保護テープ3をUV照射硬化型接着剤としたが、本発明はこれに限定されることなく、粘着型接着剤でもよい。 In the exemplary embodiment, the protective tape 3 has been a UV radiation curable adhesive, but the present invention is not limited thereto and may be a pressure-sensitive adhesive. このときは、糊残りのないような低接着力タイプとすることが必要である。 At this time, it is necessary to low adhesion type, such as no adhesive residue. なお、フルカットダイシング後に保護テープを剥離テープで剥離し、 It should be noted, it was peeled off at a peeling tape the protective tape after the full-cut dicing,
キズのつかない平コレットまたは角錐コレットでピックアップしてもよい。 It may be picked up at the flat collet or pyramid collet not a scratch.

【0023】 [0023]

【発明の効果】以上説明したように本発明の半導体装置の製造方法は、基板を切断して複数のチップ部品を形成するに先立ち、基板の機能素子形成部に保護テープを貼合するようにした方法であるから、該基板を切断分割してチップ部品を形成した際にダイボンド用の接着層の切削屑が発生しても、この切削屑がチップ部品の表面に直接付着することがなく、したがってこの切削屑に起因して特性不良やワイヤボンディング付き不良などが起こるのを確実に防止することができる。 The method of manufacturing a semiconductor device of the present invention as described above, according to the present invention is to cut the substrate prior to forming the plurality of chip parts, such that laminating a protective tape to the functional element forming portion of the substrate because it is the method, even if cutting chips of the adhesive layer for die bonding at the time of forming the chip component by cutting and dividing the substrate occurs, the cutting debris without adhering directly to the surface of the chip component, Therefore it is possible to reliably prevent the like defective characteristics and wire bonding with failure occurs due to the shavings.

【図面の簡単な説明】 BRIEF DESCRIPTION OF THE DRAWINGS

【図1】(a)〜(c)は、本発明の製造方法を工程順に説明するための要部側断面図である。 [1] (a) ~ (c) is a main portion side sectional view for explaining the manufacturing method of the present invention in order of steps.

【図2】(a)〜(c)は、本発明の製造方法を説明するための図であり、図1(c)に続く工程を順に説明するための要部側断面図である。 Figure 2 (a) ~ (c) are diagrams for explaining the manufacturing method of the present invention, it is a main part side sectional view for explaining a process subsequent to the order in Figure 1 (c).

【図3】(a)、(b)は、図2(c)に示した工程に続いて、モールドパッケージに搭載する場合の例を説明するための要部側断面図である。 [3] (a), (b), following the step shown in FIG. 2 (c), a main portion side sectional view for explaining an example of a case of mounting the molded package.

【図4】(a)、(b)は、図2(c)に示した工程に続いて、中空パッケージに搭載する場合の例を説明するための要部側断面図である。 [4] (a), (b), following the step shown in FIG. 2 (c), a main portion side sectional view for explaining an example of a case of mounting the hollow package.

【符号の説明】 DESCRIPTION OF SYMBOLS

1…基板、2…素子形成部(機能素子形成部)、3…保護テープ、4…ダイシング−ダイボンド用テープ、4b 1 ... substrate, 2 ... element forming portion (functional element formation portion) 3 ... protective tape, 4 ... Dicing - die bonding tape, 4b
…紫外線照射硬化型接着剤、4c…熱硬化型樹脂、5… ... ultraviolet radiation curable adhesive, 4c ... thermosetting resin, 5 ...
チップ部品、6,7…ダイパッド部(パッケージ部材)、8…平コレット Chip component, 6,7 ... die pad (package member) 8 ... flat collet

Claims (5)

    【特許請求の範囲】 [The claims]
  1. 【請求項1】 複数の機能素子を表面に形成し、これら機能素子の動作検査を済ませた後の基板の機能素子形成部に透明保護テープを貼合する工程と、 前記透明保護テープで前記機能素子を保護しつつ前記基板の裏面研削または裏面研削と裏面エッチングにより該基板を所定の厚さにする工程と、 ベースフィルム上に紫外線照射硬化型接着剤と熱硬化型樹脂とをこの順に積層してダイシングテープとしての機能とダイボンディング材としての機能を兼ね備えたダイシング−ダイボンド用テープを、その熱硬化型樹脂側を貼着側として前記基板の裏面に貼合する工程と、 前記ダイシング−ダイボンド用テープのベースフィルムを切断分離することなく、前記基板を切断して複数の機能素子毎に分割し、チップ部品を形成する工程と、 前記チッ 1. A plurality of functional elements formed on the surface, a step of laminating a transparent protective tape to the functional element forming portion of the substrate after finished the operation test of these functional elements, the function in the transparent protective tape the back grinding or back surface grinding and backside etching of the substrate while protecting the device and process of the substrate to a predetermined thickness, and a thermosetting resin ultraviolet radiation curable adhesive laminated in this order on a base film dicing combines the function of a function and a die bonding material as the dicing tape Te - die bonding tape, a step of bonding the rear surface of the substrate the thermosetting resin side as sticking side, the dicing - die-bonding a step without cutting separating the base film of the tape, and cutting the substrate is divided into each of the plurality of functional elements, to form a chip component, the chip 部品の少なくとも裏面側に紫外線を照射処理して前記ダイシング−ダイボンド用テープの紫外線照射硬化型接着剤を硬化させる工程と、 前記紫外線照射処理後のチップ部品を前記ダイシング− Wherein by irradiation treatment with ultraviolet rays to at least the back side of the part dicing - curing the tape of the ultraviolet radiation curable adhesive for die bonding, the dicing the chip component after the ultraviolet irradiation treatment -
    ダイボンド用テープからピックアップし、前記ダイシング−ダイボンド用テープの熱硬化型樹脂を接着剤として所定のパッケージ部材に搭載し仮接着する工程と、 前記熱硬化型樹脂を加熱硬化させてチップ部品を前記パッケージ部材に接着固定する工程と、を備えてなることを特徴とする半導体装置の製造方法。 Picked up from the die bonding tape, the dicing - a step of mounting temporarily bonded to a predetermined package member tapes thermosetting resin for die bonding as an adhesive, the package chip components by heat curing the thermosetting resin the method of manufacturing a semiconductor device characterized by comprising comprises the steps of bonding and fixing to the member.
  2. 【請求項2】 前記透明保護テープが紫外線照射硬化型であり、 前記チップ部品に紫外線を照射処理して前記ダイシング−ダイボンド用テープの紫外線照射硬化型接着剤を硬化させる工程において、前記透明保護テープをも紫外線を照射処理してその接着層を硬化させることを特徴とする請求項1記載の半導体装置の製造方法。 Wherein said transparent protective tape is ultraviolet radiation curable, the dicing was irradiation with ultraviolet rays to the chip component - in the step of curing the ultraviolet radiation-curable adhesive of the die bonding tape, said transparent protective tape the method according to claim 1, wherein the even curing the adhesive layer by irradiation with ultraviolet rays.
  3. 【請求項3】 前記透明保護テープが熱収縮自己剥離型であり、 前記熱硬化型樹脂を加熱硬化させる工程に先立ち、あるいはこの加熱硬化工程において、加熱により前記透明保護テープを自己剥離させることを特徴とする請求項1記載の半導体装置の製造方法。 Wherein a said transparent protective tape heat-shrinkable self-peeling, prior to the step of heating and curing the thermosetting resin, or in the heat-hardening step, that is self-peeling the transparent protective tape by heating the method according to claim 1, wherein.
  4. 【請求項4】 前記の透明保護テープに熱風をブローし、自己剥離した透明保護テープ吸引除去することを特徴とする請求項3記載の半導体装置の製造方法。 4. A blowing hot air onto the transparent protective tape, manufacturing method of claim 3 semiconductor device, wherein the transparent protective tape aspirated self peeling.
  5. 【請求項5】 前記紫外線照射処理後のチップ部品を前記ダイシング−ダイボンド用テープからピックアップする際、平コレットを用いて行うことを特徴とする請求項1記載の半導体装置の製造方法。 Wherein said chip component after the ultraviolet irradiation treatment dicing - when picking up the die bonding tape, manufacturing method of a semiconductor device according to claim 1, characterized in that with the flat collet.
JP715698A 1998-01-19 1998-01-19 Manufacture of semiconductor device Pending JPH11204551A (en)

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