JPH09266136A - Chip-shaped solid-state electrolytic capacitor - Google Patents

Chip-shaped solid-state electrolytic capacitor

Info

Publication number
JPH09266136A
JPH09266136A JP7352096A JP7352096A JPH09266136A JP H09266136 A JPH09266136 A JP H09266136A JP 7352096 A JP7352096 A JP 7352096A JP 7352096 A JP7352096 A JP 7352096A JP H09266136 A JPH09266136 A JP H09266136A
Authority
JP
Japan
Prior art keywords
layer
metal layer
lead
cathode
anode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7352096A
Other languages
Japanese (ja)
Inventor
Sumio Nishiyama
澄夫 西山
Nobuo Hasegawa
信男 長谷川
Kenji Uenishi
謙次 上西
Hideto Yamaguchi
秀人 山口
Koji Kamioka
浩二 上岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP7352096A priority Critical patent/JPH09266136A/en
Publication of JPH09266136A publication Critical patent/JPH09266136A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G9/00Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
    • H01G9/004Details
    • H01G9/008Terminals
    • H01G9/012Terminals specially adapted for solid capacitors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a chip-shaped solid-state electrolytic capacitor which is excellent in quality and can be fabricated at a low cost. SOLUTION: Encapsulating resin 15 covers a capacitor element 11 and a cathode lead layer 14 in such a manner that part of the cathode lead layer 14 and an anode lead line 12 are laid in their opposing direction. Formed as stacked on external electrode formation parts of the encapsulating resin 15 including the exposed part of the anode lead line 12 and the exposed part of the cathode lead layer 14 are electroless plated metal layers 16 and 17 and electroplated metal layers 18 and 19 to form base metal layers. Further formed on the base metal layers are solder layers 20 and 21.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明はチップ状固体電解コ
ンデンサに関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip solid electrolytic capacitor.

【0002】[0002]

【従来の技術】近年、電子機器の軽薄短小化と面実装技
術の進展からチップ部品が急増している。チップ状固体
電解コンデンサにおいても小型大容量化が進展する中で
一層の小型化が要求されている。
2. Description of the Related Art In recent years, the number of chip components has been rapidly increasing due to the development of light and thin electronic devices and the development of surface mounting technology. Chip-type solid electrolytic capacitors are also required to be further miniaturized as the size and capacity of the capacitors are progressing.

【0003】以下に従来のチップ状固体電解コンデンサ
の構造について説明する。図2は従来のチップ状固体電
解コンデンサの断面図を示したもので、この図2におい
て、1はコンデンサ素子で、このコンデンサ素子1は陽
極導出線2を具備する多孔質の弁作用金属からなる陽極
体の表面に誘電体酸化皮膜、電解質層、陰極層3を順次
積層形成することにより構成している。そしてこのコン
デンサ素子1に凸状の陰極導出層4を設けてこのコンデ
ンサ素子1および陰極導出層4を前記陽極導出線2が片
側に引き出されるように外装樹脂5で被覆し、その後、
外装樹脂5における陽極導出線2側の表出面5aに対向
する面5bの一部を除去して陰極導出層4の一部を表出
させ、その後、外装樹脂5における陽極導出線2の表出
部と陰極導出層4の表出部を含む外部電極形成部に無電
解メッキにより陽極側金属層6、陰極側金属層7を形成
し、その後、これらの金属層6,7の表面に半田浴への
浸漬または電解メッキにより陽極側半田層8、陰極側半
田層9を形成してチップ状固体電解コンデンサを構成し
ていた。
The structure of a conventional chip-shaped solid electrolytic capacitor will be described below. FIG. 2 is a sectional view of a conventional chip solid electrolytic capacitor. In FIG. 2, reference numeral 1 is a capacitor element, and this capacitor element 1 is made of a porous valve metal having an anode lead wire 2. A dielectric oxide film, an electrolyte layer, and a cathode layer 3 are sequentially laminated on the surface of the anode body. Then, the capacitor element 1 is provided with a convex cathode lead-out layer 4, and the capacitor element 1 and the cathode lead-out layer 4 are covered with an exterior resin 5 so that the anode lead-out wire 2 is drawn out to one side.
A part of the surface 5b of the exterior resin 5 facing the exposed surface 5a on the side of the anode lead wire 2 is removed to expose a part of the cathode lead layer 4, and then the anode lead wire 2 in the exterior resin 5 is exposed. Part and the external electrode forming part including the exposed part of the cathode lead-out layer 4, the anode side metal layer 6 and the cathode side metal layer 7 are formed by electroless plating, and then a solder bath is formed on the surfaces of these metal layers 6 and 7. Then, the anode-side solder layer 8 and the cathode-side solder layer 9 were formed by dipping in or electrolytic plating to form a chip solid electrolytic capacitor.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、このよ
うに構成されたチップ状固体電解コンデンサにおいて
は、外部電極を形成する陽極側金属層6、陰極側金属層
7を無電解メッキのみで形成しているもので、この無電
解メッキは機械的な強度、実装の際の耐熱性、耐環境性
を確保するために一般的には数ミクロンの厚さが必要と
なる。この場合、無電解メッキは電解メッキと比較して
材料費が高価であること、また品質面では膜厚のコント
ロールが困難であること、ポーラスな皮膜が形成される
ことなどコスト面および品質面で課題を有していた。
However, in the chip-shaped solid electrolytic capacitor having such a structure, the anode side metal layer 6 and the cathode side metal layer 7 forming the external electrodes are formed only by electroless plating. This electroless plating generally requires a thickness of several microns in order to secure mechanical strength, heat resistance during mounting, and environmental resistance. In this case, in electroless plating, the material cost is higher than that of electrolytic plating, it is difficult to control the film thickness in terms of quality, and a porous film is formed. Had challenges.

【0005】本発明は上記従来の課題を解決するもの
で、品質的に優れたチップ状固体電解コンデンサをコス
ト的にも安価に提供することを目的とするものである。
The present invention solves the above-mentioned conventional problems, and an object of the present invention is to provide a chip solid electrolytic capacitor excellent in quality at low cost.

【0006】[0006]

【課題を解決するための手段】上記目的を達成するため
に本発明のチップ状固体電解コンデンサは、陽極導出線
を具備し、かつ弁作用金属からなる陽極体の表面に誘電
体酸化皮膜、電解質層、陰極層を順次積層形成すること
により構成したコンデンサ素子と、このコンデンサ素子
の陽極導出線の引き出し面と対向する面に設けられた陰
極導出層と、この陰極導出層の一部と前記陽極導出線が
相対向する方向に表出するように前記コンデンサ素子と
陰極導出層を被覆する外装樹脂とを備え、前記外装樹脂
における陽極導出線の表出部と陰極導出層の表出部を含
む外部電極形成部に無電解メッキ金属層、電解メッキ金
属層を積層して形成したベース金属層を設け、さらにこ
のベース金属層の表面に半田層を設けたもので、この構
成によれば、品質的に優れたチップ状固体電解コンデン
サをコスト的にも安価に提供することができるものであ
る。
In order to achieve the above object, a chip solid electrolytic capacitor of the present invention is provided with an anode lead wire and has a dielectric oxide film and an electrolyte on the surface of an anode body made of a valve metal. Layer, a cathode layer, and a capacitor element formed by sequentially laminating the layer, a cathode lead-out layer provided on a surface of the capacitor element facing the lead-out surface of the anode lead-out line, a part of the cathode lead-out layer and the anode. The capacitor element and the exterior resin covering the cathode lead layer are provided so that the lead wires are exposed in opposite directions, and the exposed portion of the anode lead wire and the exposed portion of the cathode lead layer in the exterior resin are included. A base metal layer formed by laminating an electroless plating metal layer and an electroplating metal layer is provided on the external electrode forming portion, and a solder layer is further provided on the surface of this base metal layer. It is capable of providing excellent chip solid electrolytic capacitor inexpensive in cost to.

【0007】[0007]

【発明の実施の形態】本発明の請求項1に記載の発明
は、陽極導出線を具備し、かつ弁作用金属からなる陽極
体の表面に誘電体酸化皮膜、電解質層、陰極層を順次積
層形成することにより構成したコンデンサ素子と、この
コンデンサ素子の陽極導出線の引き出し面と対向する面
に設けられた陰極導出層と、この陰極導出層の一部と前
記陽極導出線が相対向する方向に表出するように前記コ
ンデンサ素子と陰極導出層を被覆する外装樹脂とを備
え、前記外装樹脂における陽極導出線の表出部と陰極導
出層の表出部を含む外部電極形成部に無電解メッキ金属
層、電解メッキ金属層を積層して形成したベース金属層
を設け、さらにこのベース金属層の表面に半田層を設け
たもので、この構成によれば、外装樹脂における陽極導
出線の表出部と陰極導出層の表出部を含む外部電極形成
部に設けられる無電解メッキ金属層は、続いて実施され
る電解メッキによる金属層を形成するための下地金属層
として用いることができるため、その膜厚は、従来のよ
うに無電解メッキのみでベース金属層を形成する場合と
比較して格段に薄くすることが可能となる。この無電解
メッキにより金属層を設ける場合、一定量の無電解メッ
キ溶液でのコンデンサの処理可能量は製品1個当たりに
析出する金属量に反比例するため、無電解メッキによる
金属層の薄膜化は高価な無電解メッキの材料削減につな
がり、そしてこれはチップ状固体電解コンデンサのコス
トダウンに直結するものとなる。さらに電解メッキによ
る金属層は緻密で、かつ膜厚を電気量により容易に制御
することが可能であるため、金属層の高品質化が実現で
きるものである。
BEST MODE FOR CARRYING OUT THE INVENTION In the invention described in claim 1 of the present invention, a dielectric oxide film, an electrolyte layer and a cathode layer are sequentially laminated on the surface of an anode body having an anode lead wire and made of a valve metal. A capacitor element formed by forming the same, a cathode lead-out layer provided on a surface facing the lead-out surface of the anode lead-out wire of the capacitor element, and a direction in which a part of the cathode lead-out layer and the anode lead-out wire face each other. To the external electrode forming portion including the exposed portion of the anode lead-out wire and the exposed portion of the cathode lead-out layer in the exterior resin. A base metal layer formed by laminating a plated metal layer and an electroplated metal layer is provided, and a solder layer is further provided on the surface of this base metal layer. Output and cathode conduction The electroless plating metal layer provided in the external electrode forming portion including the exposed portion of the layer can be used as a base metal layer for forming a metal layer by electrolytic plating that is subsequently performed, so that the film thickness is In comparison with the conventional case where the base metal layer is formed only by electroless plating, the thickness can be significantly reduced. When a metal layer is provided by this electroless plating, the processable amount of a capacitor with a certain amount of electroless plating solution is inversely proportional to the amount of metal deposited per product. This leads to a reduction in the cost of expensive electroless plating, and this directly leads to a cost reduction of the chip solid electrolytic capacitor. Furthermore, since the metal layer formed by electrolytic plating is dense and the film thickness can be easily controlled by the amount of electricity, high quality of the metal layer can be realized.

【0008】請求項2に記載の発明は、ベース金属層を
形成する無電解メッキ金属層、電解メッキ金属層をそれ
ぞれニッケルと銅のいずれか一方、もしくは両方で構成
したものである。
According to a second aspect of the present invention, the electroless plating metal layer and the electrolytic plating metal layer forming the base metal layer are made of nickel, copper, or both, respectively.

【0009】以下、本発明の一実施の形態について添付
図面を参照しながら説明する。図1は本発明の一実施の
形態におけるチップ状固体電解コンデンサの断面図を示
したもので、この図1において、11はコンデンサ素子
で、このコンデンサ素子11は弁作用金属であるタンタ
ル金属粉末をタンタル金属線からなる陽極導出線12を
埋設した状態で成形焼結した多孔質の陽極体の表面に、
一般的な方法で誘電体酸化皮膜、電解質層、カーボン層
を順次形成し、その後、銀ペーストよりなる陰極層13
を形成することにより構成している。14は陰極導出層
であり、この陰極導出層14は凸状に加工された銀リベ
ットをコンデンサ素子11の陰極層13における陽極導
出線12の引き出し面と対向する対向面13aに導電性
接着剤22で装着することにより構成している。
An embodiment of the present invention will be described below with reference to the accompanying drawings. FIG. 1 shows a cross-sectional view of a chip solid electrolytic capacitor according to an embodiment of the present invention. In FIG. 1, 11 is a capacitor element, and this capacitor element 11 is a tantalum metal powder which is a valve metal. On the surface of the porous anode body formed and sintered with the anode lead wire 12 made of a tantalum metal wire embedded,
A dielectric oxide film, an electrolyte layer and a carbon layer are sequentially formed by a general method, and then a cathode layer 13 made of silver paste.
Is formed by forming. Reference numeral 14 denotes a cathode lead-out layer, and this cathode lead-out layer 14 has a conductive adhesive 22 on the facing surface 13a of the capacitor element 11 facing the lead-out surface of the anode lead-out wire 12 of the silver rivet. It is configured by mounting with.

【0010】続いて、陽極導出線12が片側に引き出さ
れるようにコンデンサ素子11および陰極導出層14を
含めてトランスファーモールドにより製品寸法より長め
に外装樹脂15で被覆し、その後、外装樹脂15におけ
る陽極導出線12の陽極導出面15aと対向する面の一
部を除去して陰極導出面15bに陰極導出層14の一部
を表出させる。
Next, the capacitor element 11 and the cathode lead-out layer 14 are covered by the transfer mold so that the anode lead-out wire 12 is drawn out to one side by transfer molding so as to be longer than the product size, and then the anode in the outer cover resin 15 is covered. A part of the surface of the lead wire 12 facing the anode lead surface 15a is removed to expose a part of the cathode lead layer 14 on the cathode lead surface 15b.

【0011】その後、陽極導出線12、陰極導出面15
bおよび外装樹脂15の全表面にブラスト処理を施すこ
とにより、それぞれの表面を物理的に粗面化する。そし
て陽極導出線12を所定寸法に切断し、その後、pH1
0〜12のアルカリ溶液で脱脂後、さらに化学エッチン
グ処理を施し、その後、無電解メッキの前処理となるパ
ラジウムの触媒付与を行い、次に外装樹脂15における
陽極導出線12の表出部と陰極導出層14の表出部を含
む外部電極形成部に選択的に厚さ約0.4ミクロンの無
電解ニッケルメッキ金属層16,17を析出させ、その
後、この無電解ニッケルメッキ金属層16,17上に電
解メッキ浴にてニッケルメッキ金属層の全体の厚さが約
4ミクロンになるように電解メッキにより電解ニッケル
メッキ金属層18,19を析出させて外部電極を構成す
るベース金属層を形成する。その後、電解ニッケルメッ
キ金属層18,19の表面上に良好な半田付性を確保す
るために厚さ約6ミクロンの半田層20,21を電解メ
ッキにより形成し、図1に示すチップ状固体電解コンデ
ンサを完成させた。
After that, the anode lead wire 12 and the cathode lead surface 15
By subjecting b and the entire surface of the exterior resin 15 to blasting, the respective surfaces are physically roughened. Then, the anode lead wire 12 is cut into a predetermined size, and then pH 1
After degreasing with an alkaline solution of 0 to 12, chemical etching is further performed, and then a catalyst of palladium, which is a pretreatment for electroless plating, is applied, and then the exposed portion of the anode lead wire 12 and the cathode in the exterior resin 15 are treated. Electroless nickel-plated metal layers 16 and 17 having a thickness of about 0.4 μm are selectively deposited on the external electrode formation portion including the exposed portion of the lead-out layer 14, and then the electroless nickel-plated metal layers 16 and 17 are deposited. The electrolytic nickel plating metal layers 18 and 19 are deposited by electrolytic plating so that the total thickness of the nickel plating metal layer is about 4 μm to form a base metal layer forming an external electrode. . Thereafter, solder layers 20 and 21 having a thickness of about 6 μm are formed on the surfaces of the electrolytic nickel-plated metal layers 18 and 19 by electrolytic plating to ensure good solderability, and the chip-shaped solid electrolytic layer shown in FIG. Completed the capacitor.

【0012】上記した本発明の一実施の形態における構
成に基づいて、サイズ2012、定格6V10μFのチ
ップ状固体電解コンデンサを製造するとともに、比較例
として外部電極を構成するベース金属層を無電解メッキ
のみで4ミクロンの厚さに形成した以外は本発明の一実
施の形態と全く同じ構成にした従来のチップ状固体電解
コンデンサを製造し、これらの製造工程での無電解ニッ
ケルメッキ溶液でのコンデンサの処理能力、完成品の歩
留まり、電気特性について比較し、その比較結果を(表
1)に示す。
Based on the structure of the above-described embodiment of the present invention, a chip-shaped solid electrolytic capacitor having a size of 2012 and a rating of 6V and 10 μF is manufactured, and as a comparative example, a base metal layer forming an external electrode is formed only by electroless plating. A conventional chip-shaped solid electrolytic capacitor having exactly the same structure as that of the embodiment of the present invention except that it is formed to have a thickness of 4 μm is manufactured. The throughput, the yield of finished products, and the electrical characteristics were compared, and the comparison results are shown in (Table 1).

【0013】[0013]

【表1】 [Table 1]

【0014】(表1)から明らかなように本発明の一実
施の形態におけるチップ状固体電解コンデンサは、従来
例と比べて電気特性、不良率においては全く遜色なく、
かつ無電解ニッケルメッキ溶液でのコンデンサ処理能力
は格段に向上させることができるため、無電解ニッケル
メッキの課題である材料コストを格段に低減させること
ができる。さらに本発明の一実施の形態におけるチップ
状固体電解コンデンサの外部電極を構成するベース金属
層は、無電解メッキにより薄く析出した金属層上に電気
量により厚さがコントロールできる電解メッキにより析
出した金属層が積層されるため、ベース金属層の厚さの
バラツキを低減させることができるとともに、無電解メ
ッキにより析出した金属層の特質である多孔性も改善す
ることができ、これにより、品質的にも向上するもので
ある。
As is clear from Table 1, the chip solid electrolytic capacitor according to one embodiment of the present invention is comparable in electrical characteristics and defective rate to the conventional example.
Moreover, since the capacity of the capacitor to be treated with the electroless nickel plating solution can be remarkably improved, the material cost, which is a problem of the electroless nickel plating, can be remarkably reduced. Further, the base metal layer forming the external electrode of the chip solid electrolytic capacitor in one embodiment of the present invention is a metal deposited by electrolytic plating whose thickness can be controlled by the amount of electricity on the metal layer thinly deposited by electroless plating. Since the layers are laminated, it is possible to reduce the variation in the thickness of the base metal layer and also improve the porosity which is a characteristic of the metal layer deposited by the electroless plating. Will also improve.

【0015】なお、上記本発明の一実施の形態において
は、無電解メッキ金属層16,17と、電解メッキ金属
層18,19をニッケルで構成したものについて説明し
たが、このニッケルに限定されるものではなく、その他
の材料、例えば銅、あるいはニッケルと銅の組み合わせ
で構成しても同様の効果が得られるものである。
In the embodiment of the present invention described above, the electroless plated metal layers 16 and 17 and the electrolytic plated metal layers 18 and 19 are made of nickel, but the present invention is not limited to this. The same effect can be obtained by using other materials such as copper or a combination of nickel and copper.

【0016】[0016]

【発明の効果】以上のように本発明のチップ状固体電解
コンデンサは、陽極導出線を具備し、かつ弁作用金属か
らなる陽極体の表面に誘電体酸化皮膜、電解質層、陰極
層を順次積層形成することにより構成したコンデンサ素
子と、このコンデンサ素子の陽極導出線の引き出し面と
対向する面に設けられた陰極導出層と、この陰極導出層
の一部と前記陽極導出線が相対向する方向に表出するよ
うに前記コンデンサ素子と陰極導出層を被覆する外装樹
脂とを備え、前記外装樹脂における陽極導出線の表出部
と陰極導出層の表出部を含む外部電極形成部に無電解メ
ッキ金属層、電解メッキ金属層を積層して形成したベー
ス金属層を設け、さらにこのベース金属層の表面に半田
層を設けたもので、この構成によれば、外装樹脂におけ
る陽極導出線の表出部と陰極導出層の表出部を含む外部
電極形成部に設けられる無電解メッキ金属層は、続いて
実施される電解メッキによる金属層を形成するための下
地金属層として用いることができるため、その膜厚は、
従来のように無電解メッキのみでベース金属層を形成す
る場合と比較して格段に薄くすることが可能となる。こ
の無電解メッキにより金属層を設ける場合、一定量の無
電解メッキ溶液でのコンデンサの処理可能量は製品1個
当たりに析出する金属量に反比例するため、無電解メッ
キによる金属層の薄膜化は高価な無電解メッキの材料削
減につながり、そしてこれはチップ状固体電解コンデン
サのコストダウンに直結するものとなる。さらに電解メ
ッキによる金属層は緻密で、かつ膜厚を電気量により容
易に制御することが可能であるため、金属層の高品質化
が実現できるものである。
As described above, the chip solid electrolytic capacitor of the present invention is provided with the anode lead wire and the dielectric oxide film, the electrolyte layer and the cathode layer are sequentially laminated on the surface of the anode body made of the valve metal. A capacitor element formed by forming the same, a cathode lead-out layer provided on a surface facing the lead-out surface of the anode lead-out wire of the capacitor element, and a direction in which a part of the cathode lead-out layer and the anode lead-out wire face each other. To the external electrode forming portion including the exposed portion of the anode lead-out wire and the exposed portion of the cathode lead-out layer in the exterior resin. A base metal layer formed by laminating a plated metal layer and an electroplated metal layer is provided, and a solder layer is further provided on the surface of this base metal layer. Part and the electroless plating metal layer provided in the external electrode forming part including the exposed part of the cathode derivation layer, since it can be used as a base metal layer for forming a metal layer by electrolytic plating to be carried out subsequently, The film thickness is
The thickness can be significantly reduced as compared with the conventional case where the base metal layer is formed only by electroless plating. When a metal layer is provided by this electroless plating, the processable amount of a capacitor with a certain amount of electroless plating solution is inversely proportional to the amount of metal deposited per product. This leads to a reduction in the cost of expensive electroless plating, and this directly leads to a cost reduction of the chip solid electrolytic capacitor. Furthermore, since the metal layer formed by electrolytic plating is dense and the film thickness can be easily controlled by the amount of electricity, high quality of the metal layer can be realized.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施の形態におけるチップ状固体電
解コンデンサの断面図
FIG. 1 is a cross-sectional view of a chip solid electrolytic capacitor according to an embodiment of the present invention.

【図2】従来のチップ状固体電解コンデンサの断面図FIG. 2 is a sectional view of a conventional chip solid electrolytic capacitor.

【符号の説明】[Explanation of symbols]

11 コンデンサ素子 12 陽極導出線 13 陰極層 14 陰極導出層 15 外装樹脂 15a 陽極導出面 15b 陰極導出面 16,17 無電解メッキ金属層 18,19 電解メッキ金属層 20,21 半田層 11 Capacitor Element 12 Anode Lead Wire 13 Cathode Layer 14 Cathode Lead Layer 15 Exterior Resin 15a Anode Lead Surface 15b Cathode Lead Surface 16,17 Electroless Plating Metal Layer 18,19 Electroplating Metal Layer 20,21 Solder Layer

───────────────────────────────────────────────────── フロントページの続き (72)発明者 山口 秀人 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 (72)発明者 上岡 浩二 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Hideto Yamaguchi, 1006 Kadoma, Kadoma City, Osaka Prefecture, Matsushita Electric Industrial Co., Ltd. (72) Koji Ueoka, 1006, Kadoma, Kadoma City, Osaka Matsushita Electric Industrial Co., Ltd.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 陽極導出線を具備し、かつ弁作用金属か
らなる陽極体の表面に誘電体酸化皮膜、電解質層、陰極
層を順次積層形成することにより構成したコンデンサ素
子と、このコンデンサ素子の陽極導出線の引き出し面と
対向する面に設けられた陰極導出層と、この陰極導出層
の一部と前記陽極導出線が相対向する方向に表出するよ
うに前記コンデンサ素子と陰極導出層を被覆する外装樹
脂とを備え、前記外装樹脂における陽極導出線の表出部
と陰極導出層の表出部を含む外部電極形成部に無電解メ
ッキ金属層、電解メッキ金属層を積層して形成したベー
ス金属層を設け、さらにこのベース金属層の表面に半田
層を設けたチップ状固体電解コンデンサ。
1. A capacitor element which comprises an anode lead wire and which is formed by sequentially laminating a dielectric oxide film, an electrolyte layer and a cathode layer on the surface of an anode body made of a valve metal, and a capacitor element of this capacitor element. The cathode lead-out layer provided on the surface facing the lead-out surface of the anode lead-out line, and the capacitor element and the cathode lead-out layer so that a part of this cathode lead-out layer and the anode lead-out line are exposed in the opposite direction. The external resin is formed by laminating an electroless plating metal layer and an electroplating metal layer on the external electrode forming portion including the external resin covering portion and the exposed portion of the anode lead wire and the exposed portion of the cathode lead layer in the external resin. A chip solid electrolytic capacitor provided with a base metal layer and a solder layer on the surface of the base metal layer.
【請求項2】 ベース金属層を形成する無電解メッキ金
属層、電解メッキ金属層をそれぞれニッケルと銅のいず
れか一方、もしくは両方で構成した請求項1記載のチッ
プ状固体電解コンデンサ。
2. The chip-shaped solid electrolytic capacitor according to claim 1, wherein the electroless plated metal layer and the electrolytic plated metal layer forming the base metal layer are made of either one or both of nickel and copper, respectively.
JP7352096A 1996-03-28 1996-03-28 Chip-shaped solid-state electrolytic capacitor Pending JPH09266136A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7352096A JPH09266136A (en) 1996-03-28 1996-03-28 Chip-shaped solid-state electrolytic capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7352096A JPH09266136A (en) 1996-03-28 1996-03-28 Chip-shaped solid-state electrolytic capacitor

Publications (1)

Publication Number Publication Date
JPH09266136A true JPH09266136A (en) 1997-10-07

Family

ID=13520609

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7352096A Pending JPH09266136A (en) 1996-03-28 1996-03-28 Chip-shaped solid-state electrolytic capacitor

Country Status (1)

Country Link
JP (1) JPH09266136A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1160809A2 (en) * 2000-05-26 2001-12-05 Matsushita Electric Industrial Co., Ltd. Solid electrolytic capacitor
US20230253162A1 (en) * 2022-02-09 2023-08-10 Yu-Peng Chung Packaging Structures for Electronic elements and Solid Electrolytic Capacitor Elements and Methods thereof

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1160809A2 (en) * 2000-05-26 2001-12-05 Matsushita Electric Industrial Co., Ltd. Solid electrolytic capacitor
EP1160809A3 (en) * 2000-05-26 2003-12-03 Matsushita Electric Industrial Co., Ltd. Solid electrolytic capacitor
US20230253162A1 (en) * 2022-02-09 2023-08-10 Yu-Peng Chung Packaging Structures for Electronic elements and Solid Electrolytic Capacitor Elements and Methods thereof
US12057274B2 (en) * 2022-02-09 2024-08-06 Yu-Peng Chung Packaging structures for electronic elements and solid electrolytic capacitor elements and methods thereof

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