JPH09251282A - Driving device for display device, liquid crystal display device and drive method for liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress the number of drive voltages even when the number of display gradation are increased. SOLUTION: First, second voltage selection means 3, 4 select one voltage from plural systems of voltages V1, V2,..., Vn respectively. Respective selected voltages are held by first and second capacity elements 5, 6. Then, for instance, the first capacity element 5 and the second capacity element 6 are connected in parallel by shifting a switch 7, and an obtained superimposed voltage is outputted to a display device 3 as the voltage for a multi-level display. At this time, since the first, second capacity elements 5, 6 are provided with capacitance different from each other, the different superimposed voltages are obtained in the case applying Vl to the first capacity element 5 and Vm to the second capacity element 6 and in the case applying the Vm to the first capacity element 5 and the Vl to the second capacity element 6.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving device for a display device used in a liquid crystal display device for multi-gradation display, a liquid crystal display device and a driving method thereof.

[0002]

2. Description of the Related Art Liquid crystal display devices have come to be used in various fields by taking advantage of their features of light weight and low power consumption. Among them, liquid crystal display devices capable of multi-gradation display are televisions or personal computers. It is attracting attention as a display for computers and the like.

For example, an active matrix type liquid crystal display device in which a switching element such as a thin film transistor is provided in each pixel is capable of displaying without crosstalk between adjacent electrodes even when displaying with a large number of scanning lines. ,
In recent years, it has been attracting attention.

In such an active matrix type liquid crystal display device, there are an analog system and a digital system as a system for supplying a liquid crystal drive voltage to each signal electrode. In the analog system, an analog image signal is input, and a parallel image signal for one horizontal line is obtained by sequentially sampling and holding the analog image signal. In the digital system, a digital image signal is input and the digital image signal is processed to obtain a parallel image signal for one horizontal line.

FIG. 5 shows a signal line driving circuit of an active matrix type liquid crystal display device capable of displaying a multi-gradation digital image signal.

A signal line drive circuit 51 shown in the figure is mainly a serial-parallel conversion circuit 5 having a shift register and a latch.
It is composed of 2, n decoders 53 and n voltage selection circuits 54.

The serial / parallel conversion circuit 52 is supplied with an m-bit multi-gradation digital image signal DS, a shift clock signal CPH, and a horizontal start signal STH.
The multi-gradation digital image signal DS is supplied to each decoder 5 by the shift clock signal CPH and the horizontal start signal STH.
The data is serial-parallel converted so as to be simultaneously output to 3 and becomes m-bit display data.

In each voltage selection circuit 54, as shown in FIG. 6, liquid crystal drive voltages V1, V2, ... , V 2 ^m are supplied. The polarity is inverted because it is necessary to drive the liquid crystal composition in order to prevent deterioration of the liquid crystal composition.

Each m-bit display data is sent to each decoder 53.
Are controlled by the liquid crystal drive voltages V1, V2, ..., V2.
Select one voltage out of ^m . The selected liquid crystal drive voltage is supplied to each signal line. FIG. 7 shows another conventional example.

The signal line drive circuit 71 shown in the figure is mainly a serial / parallel conversion circuit 7 having a shift register and a latch.
2, n upper m / 2 bit decoders 73, n lower m / 2 bit decoders 74, n first voltage selection circuits 75, n second voltage selection circuits 76, n holds It is composed of a capacitor 77, n switches 78, and n current buffers 79.

The serial-parallel conversion circuit 72 includes an m-bit multi-gradation digital image signal DS and a shift clock signal CP.
H and the horizontal start signal STH are input. In the multi-gradation digital signal DS, the upper m / 2-bit data is sent to the upper m / 2-bit decoder 73 and the lower m / 2-bit data is sent to the lower m / 2-bit decoder by the shift clock signal CPH and the horizontal start signal STH. It is serial-parallel converted so as to be output to 74.

The first voltage selection circuit 75 has 2 ^{m / 2} switches, and one of the switches is turned on according to the output of the upper m / 2 bit decoder 73. 2 ^{m / 2} types of main voltage Vk1 to V at each end of each switch
k2 ^{m / 2} is applied to each, and the other ends are commonly connected and connected to the common terminal of the hold capacitor 77.

The second voltage selection circuit 76 is also 2 ^{m / 2}
This switch has one switch, and one of the switches is turned on according to the output of the lower m / 2-bit decoder 74. 2 ^{m / 2} types of sub voltage Vc1 at each end of each switch
.About.Vc2 ^{m / 2} is applied, and the other ends are commonly connected and connected to the charging side terminal of the hold capacitor 77.

The common terminal of the hold capacitor 77 is provided with a switch 78 for controlling whether or not the common terminal is connected to the ground potential, and the control signal S controls ON / OFF. The control signal S also activates the upper m / 2 bit decoder 73 and the lower m / 2 bit decoder 74. When the switch 78 is on, the lower m / 2 bit decoder 74 is activated and the switch When 78 is off, the upper m / 2 bit decoder 73 is activated.

The hold voltage of the hold capacitor 77 is output to the signal line via the current buffer 79 under the control of the output control signal OE. FIG. 8 shows the timing of the control signal of each switch.

By the way, in the signal line drive circuit shown in FIG. 5, 2 ^{m / 2} is applied to the m-bit digital image signal DS.
Liquid crystal drive voltages V1, V2, ..., V of different levels
You need to enter (2 ^m ). Further, in the signal line drive circuit shown in FIG. 7, the m-bit digital image signal DS
2 ^{m / 2} +2 ^{m / 2} types, that is, 2 ^{(m / 2) +1} types of liquid crystal driving voltages Vk1 to Vk2 ^{m / 2} and Vc1 to Vc2 having different levels.
You need to enter ^{m / 2} .

[0017]

In the conventional signal line driving circuit in the active matrix type liquid crystal display device for displaying with the multi-gradation digital image signal as described above, the liquid crystal driving voltage is increased as the number of display gradations is increased. There is a problem that the number increases. When the number of liquid crystal drive voltages increases, problems such as an increase in the number of control lines and switches for switching the liquid crystal drive voltages also occur, and integration is alienated and cost is increased. In short, the conventional circuit of this type has a problem that the configuration becomes very complicated to output a large number of types of voltages.

The present invention has been made to solve the above problems, and is capable of driving a display device with a simple structure even when the number of display gray scales is increased, and a liquid crystal display device. An object of the present invention is to provide a device and a driving method thereof.

An object of the present invention is to provide a driving device for a display device, a liquid crystal display device and a driving method thereof, which can suppress the number of driving voltages even when the number of display gradations increases.

It is an object of the present invention to provide a display device drive device, a liquid crystal display device and a drive method thereof, which can achieve high integration and cost reduction even when the number of display gray scales increases.

[0021]

In order to solve the above-mentioned problems, the present invention according to claim 1 is a device for driving a display device which performs multi-gradation display by different voltages. A supply means, a first voltage selection means and a second voltage selection means for selecting one voltage from the voltages of the plurality of systems, and a first capacity different from each other for holding each voltage selected by each voltage selection means. And a means for outputting to the display device a second capacitive element, and a superimposed voltage obtained by connecting the first capacitive element and the second capacitive element in parallel as a voltage for the multi-gradation display. It is equipped with.

That is, as shown in FIG. 1, the driving device 1 of the present invention drives the display device 2 which performs multi-gradation display with different voltages. The first and second voltage selecting means 3 and 4 have a plurality of voltages from V1, V2, ..., Vn to 1
Select each voltage. Each selected voltage is held in the first and second capacitive elements 5 and 6. Then, for example, by switching the switch 7, the first capacitive element 5 and the second capacitive element 5
The capacitive element 6 is connected in parallel, and the obtained superimposed voltage is output to the display device 2 as a voltage for multi-gradation display.

Here, the first and second capacitive elements 5 and 6
Have different capacitances from each other, the first capacitive element 5
In the case of applying Vl to the second capacitive element 6 and Vm to the second capacitive element 6
Different superimposed voltages are obtained when Vm is applied to the capacitive element 5 and Vl is applied to the second capacitive element 6. The present invention utilizes this principle. That is, the present invention is intended to obtain a doubled type of superposed voltage from the voltages V1, V2, ..., Vn of a plurality of systems, whereby the number of driving voltages is increased even when the number of display gray scales is increased. I try to keep it down.

The drive device of the present invention is not limited to an active matrix type liquid crystal display device, but other display devices, such as a simple matrix type liquid crystal display device and a plasma display, as long as it is a display device which performs multi-gradation display with different voltages. Of course, it is also applicable.

According to a second aspect of the present invention, in a liquid crystal display device for applying a voltage according to a multi-tone digital signal to a liquid crystal layer to perform multi-tone display, a voltage supply means for supplying a plurality of systems of voltage is provided. A first voltage for selecting one of the voltages of the plurality of systems according to the multi-gradation digital signal
And a first voltage selecting means having a different capacitance from each other and holding each voltage selected by each of the voltage selecting means.
And a second capacitance element, the first capacitance element and the second capacitance element.
And a voltage applying means for applying to the liquid crystal layer a voltage according to a superimposed voltage obtained by connecting the capacitive element in parallel.

According to a third aspect of the present invention, in the liquid crystal display device according to the second aspect, the applying means includes a switch for connecting the first capacitive element and the second capacitive element in parallel. And a buffer circuit that current-amplifies the superimposed voltage obtained by the parallel connection and applies the amplified voltage to the liquid crystal layer.

According to a fourth aspect of the present invention, in a method for driving a liquid crystal display device for performing multi-gradation display by applying a voltage according to the multi-gradation digital signal to the liquid crystal layer, the multi-gradation digital signal is applied. Accordingly, selecting two types of voltages from voltages of a plurality of systems, holding the selected voltages in the first and second capacitive elements having different capacities, and the first and second voltages After holding the voltage with the capacitive element of, the step of connecting the first capacitive element and the second capacitive element in parallel, and applying a voltage according to the superimposed voltage obtained by the parallel connection to the liquid crystal layer. And a step of performing.

When the present invention is applied to an active matrix type liquid crystal display device capable of displaying a multi-gradation digital image signal, the input multi-gradation digital signal is serial-parallel converted line by line to form pixel display data. A serial-parallel conversion circuit, a plurality of first and second decoders for decoding pixel display data, and first and second voltage selection circuits for selecting one of the liquid crystal drive voltages according to the output of the decoder. , The capacity ratio for holding the output of each voltage selection circuit for a certain period is 1
= N (n> 1), the first and second hold capacitors, a switch that short-circuits the output of the first voltage selection circuit and the output of the second voltage selection circuit, and the first and second voltage selection circuits A buffer circuit for current-amplifying the output of the above and outputting it to the liquid crystal display section. Thereby, the first
The number of gray scales is generated without increasing the number of liquid crystal driving voltages input to the driving circuit by generating an intermediate voltage between the liquid crystal driving voltage selected by the voltage selecting circuit and the liquid crystal driving voltage selected by the second voltage selecting circuit. Can be increased. More specifically,
Shown below.

[0029]

FIG. 2 shows the structure of an active matrix type liquid crystal display device to which the present invention is applied. As shown in FIG. 2, signal lines Xi and scanning lines Yi are formed in a matrix on the first glass substrate 10. The pixel electrode 11 and the TFT are provided near each intersection of the signal line Xi and the scanning line Yi.
And 12 are formed. The drain electrode of the TFT 12 is connected to the pixel electrode 11, the source electrode is connected to the signal line Xi, and the gate electrode is connected to the scanning line Yi. The counter electrode 14 is formed on the second glass substrate 13 arranged so as to face the first glass substrate 10, and the liquid crystal layer (not shown) is provided between the first glass substrate 10 and the second glass substrate 13. (Omitted) is sandwiched. The drain electrode of the TFT 12 is connected to the common auxiliary capacitance electrode 17 via the auxiliary capacitance (Cs).

The signal line Xi is connected to the signal line drive circuit 19. The signal line drive circuit 19 applies a display signal to each signal line Xi. The voltage amplitude of the display signal is the amplitude of the output of the signal line drive circuit 19. The scanning line Yi is connected to the scanning line driving circuit 20. Scan line drive circuit 2
0 applies a scanning signal to the scanning line Yi. Counter electrode 14
Are connected to the counter electrode drive circuit 21. The counter electrode drive circuit 21 applies a counter electrode potential to the counter electrode 14. The signal line drive circuit 19, the scanning line drive circuit 20, and the counter electrode drive circuit 21 are connected to the control circuit 22.
The control circuit 22 controls driving of each circuit.

FIG. 3 is a diagram showing the configuration of the signal line drive circuit 19. As shown in FIG. 3, this signal line drive circuit 19
Is a serial-parallel conversion circuit 30, which mainly includes a shift register and a latch, n first decoders 31, n second decoders 32, n first voltage selection circuits 33, n.
Second voltage selection circuits 34, n first hold capacitors 35, n second hold capacitors 36,
It is composed of n switches 37 and n current buffers 38.

The m / bit multi-tone digital image signal DS, the shift clock signal CPH, and the horizontal start signal STH are input from the control circuit 22 to the serial / parallel conversion circuit 30. In the serial-parallel conversion circuit 30, the multi-gradation digital signal DS is serial-parallel converted by the shift clock signal CPH and the horizontal start signal STH so as to be simultaneously output to the first decoder 31 and the second decoder 32.
It becomes bit display data. Each first decoder 31, second
This is different from the conventional example shown in FIG. 7 in that m-bit display data is output to the decoder 32.

In the first voltage selection circuit 33 and the second voltage selection circuit 34, as shown in FIG. 6, the polarity is inverted with respect to the reference voltage Vsc every integer multiple of the frame cycle or every integer multiple of the line cycle. Liquid crystal drive voltages V1, V2, ..., V (2
^{m / 2} ) is supplied. The m-bit display data is the first
Of the liquid crystal drive voltage V by being decoded by the decoder 31 of FIG.
One voltage is selected from among 1, V2 ... V (2 ^{m / 2} ). The selected liquid crystal drive voltage is applied to the first hold capacitor 3
5 is written. Further, the m-bit display data is decoded by the second decoder 32, the switches in the second voltage selection circuit 34 are turned on / off, and the liquid crystal drive voltages V1, V2 ... V (2 ^{m / 2} ) are generated. Select one of these voltages.
The selected liquid crystal drive voltage is written in the second hold capacitor 36.

The capacitance ratio between the first hold capacitor 35 and the second hold capacitor 36 is 1: n (n> 1).
And First decoder 31 and second decoder 32
Turns off the switches in the first voltage selection circuit 33 and the switches in the second voltage selection circuit 34 after the liquid crystal drive voltage is written in the first hold capacitor 35 and the second hold capacitor 36 for a certain period. To do.

After that, the switch 37 is turned on by the control signal S sent from the control circuit 22, and the output of the first voltage selection circuit 33 and the output of the second voltage selection circuit 34 are short-circuited. That is, the first hold capacitor 35
And the second hold capacitor 36 are connected in parallel, and the superimposed voltage is output to the current buffer 38. Current buffer 3
8 current-amplifies this superimposed voltage and outputs it to the signal line Xi.

The current buffer 38 has a circuit configuration having a high input impedance, and its output is controlled by the control signal OE sent from the control circuit 22.

FIG. 4 shows the timing of the control signal of each switch.

First, the outputs of the first decoder 31 and the second decoder 32 are turned on, and this on state continues during the writing period, during which the predetermined voltage is applied to the first hold capacitor 35 and the second hold capacitor 36. Is applied. After that, the first decoder 31 and the second decoder 32
Is turned off, and after a short period of time, the control signal S
Is turned on, and the first hold capacitor 35 and the second hold capacitor 36 are connected in parallel. After this,
After the period for averaging the charges of the first hold capacitor 35 and the second hold capacitor 36 has passed, the control signal OE is turned on for a predetermined period of time.
And the second hold capacitor 36 are connected in parallel, and the superimposed voltage is output to the current buffer 38. After the control signal OE turns off, the control signal S turns off.

If the liquid crystal drive voltage V1 is written in the first hold capacitor 35, the charge Q1 becomes Q1 = C1.multidot.V1. At the same time, if the liquid crystal drive voltage V2 is written in the second hold capacitor 36, the charge Q2 becomes Q2 = C2.V2.

After that, the switches in the first voltage selection circuit 33 and the switches in the second voltage selection circuit 34 are turned off,
When the switch 37 is turned on, the electric charge Q0 at that time is: Q0 = Q1 + Q2 = C1.V1 + C2.V2 = (C1 + C2) * V0 where V0 is the first hold capacitor 35 and the second
Is the output voltage as the superimposed voltage held in the hold capacitor 36. In addition, the first hold capacitor 3
5 and the second hold capacitor 36 have a capacitance ratio of 1: n
Therefore, the output voltage V0 is: V0 = (C1 * V1 + C2 * V2) / (C1 + C2) = (C1 * V1 + n * C1 * V2) / (C1 + n * C1) = (V1 + n * V2) / (1 + n), and the output voltage V0 becomes an intermediate voltage between V1 and V2.

If the liquid crystal drive voltage V2 is written in the first hold capacitor 35 and the liquid crystal working voltage V2 is written in the second hold capacitor 36, the output voltage V0 'is V0' = (C1. V2 + C2.V1) / (C1 + C2) = (C1.V2 + n.C1.V1) / (C1 + n.C1) = (V2 + n.V1) / (1 + n), and the output voltage V0 'is V1' and V2 '. It becomes an intermediate voltage.

Since the capacitance ratios of C1 and C2 are different, the output voltage V0 and the output voltage V0 'have different values.

Therefore, in the liquid crystal display device of this example, since it is sufficient to supply 2 ^{m / 2} kinds of liquid crystal drive voltages to the signal line drive circuit 19 for m-bit display, the number of liquid crystal drive voltages is the same as in the conventional case. Compared to that, it can be reduced by more than half, and the number of switches for switching the liquid crystal drive voltage can be reduced. Therefore, in the liquid crystal display device of this example, the circuits related to driving can be highly integrated and the cost can be reduced.

The present invention is not limited to the above-described examples, and can be variously modified and implemented within the scope of the technical idea.

[0045]

As described in detail above, according to the present invention,
Two types of voltages are selected from the voltages of a plurality of systems, held in the first and second capacitive elements having different capacities, and the superimposed voltage obtained by connecting these in parallel is used as a voltage for multi-gradation display. Therefore, the number of drive voltages can be suppressed even when the number of display gradations increases. As a result, the configuration can be simplified, and high integration and cost reduction can be achieved.

[Brief description of drawings]

FIG. 1 is a diagram for explaining the principle of the present invention.

FIG. 2 is a diagram showing a configuration of an active matrix type liquid crystal display device to which the present invention is applied.

FIG. 3 is a diagram showing a configuration of a signal line drive circuit shown in FIG.

FIG. 4 is a diagram showing timings of control signals of the respective switches shown in FIG.

FIG. 5 is a diagram showing a signal line driving circuit of a conventional active matrix type liquid crystal display device capable of displaying with a multi-tone digital image signal.

FIG. 6 is a waveform diagram of a liquid crystal drive voltage.

FIG. 7 is a diagram showing another signal line drive circuit of the conventional active matrix type liquid crystal display device capable of displaying with a multi-tone digital image signal.

FIG. 8 is a diagram showing the timing of control signals of the switches shown in FIG.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Drive device 2 Display device 3 1st voltage selection means 4 2nd voltage selection means 5 1st capacitive element 6 2nd capacitive element 7 Switch V1, V2, ..., Vn Multiple system voltage

Claims (4)

[Claims] 1. A device for driving a display device which performs multi-gradation display with different voltages, wherein voltage supply means for supplying voltages of a plurality of systems, and first and second selecting one voltage from the voltages of the plurality of systems, respectively. Second voltage selecting means, first and second capacitive elements having different capacities and holding respective voltages selected by the voltage selecting means, the first capacitive element and the second capacitive element A driving device for a display device, comprising: means for outputting a superimposed voltage obtained by connecting elements in parallel to the display device as a voltage for the multi-gradation display. 2. A liquid crystal display device for applying a voltage according to a multi-gradation digital signal to a liquid crystal layer to perform multi-gradation display, voltage supply means for supplying voltages of a plurality of systems, and the multi-gradation digital signal. First and second voltage selecting means for selecting one voltage from the voltages of the plurality of systems, respectively, and first and second capacitors having different capacities and holding each voltage selected by the voltage selecting means. A second capacitance element; and an applying unit that applies a voltage according to a superimposed voltage obtained by connecting the first capacitance element and the second capacitance element in parallel to the liquid crystal layer. Liquid crystal display device. 3. The liquid crystal display device according to claim 2, wherein the applying unit is obtained by connecting the switch for connecting the first capacitive element and the second capacitive element in parallel, and the switch for connecting in parallel. A liquid crystal display device, comprising: a buffer circuit that current-amplifies the superimposed voltage and applies the amplified voltage to the liquid crystal layer. 4. A method of driving a liquid crystal display device for performing multi-gradation display by applying a voltage according to a multi-gradation digital signal to a liquid crystal layer, comprising: A step of selecting two kinds of voltages; a step of holding each of the selected voltages in first and second capacitive elements having different capacities; a step of holding the voltages in the first and second capacitive elements After that, the method includes the steps of connecting the first capacitive element and the second capacitive element in parallel, and applying a voltage according to the superimposed voltage obtained by the parallel connection to the liquid crystal layer. A method for driving a liquid crystal display device, comprising: