JPH09246470A - Protecting device of leak current between pins - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a protecting device of leak current between pins by arranging a leak current protecting circuit that is reduced with the potential difference between a leak current protecting pin and a high impedance output pin and that can prevent the malfunction of a high impedance output circuit. SOLUTION: Input is performed through a high impedance line from the high impedance output part 11 of a high impedance output circuit 3 to the high impedance input part 9 of the protecting circuit 2 of the leak current between the pins. Output is performed with low impedance from the low impedance output part 10 of the protecting circuit 2 of the leak current between the pins to the leak current protecting pin 5 with the reduced potential difference between the voltage at the low impedance output part 10 and the voltage at a high impedance output pin 4 that is V1-V2. Therefore, the leak current between the pins is decreased by reducing the potential difference between the pins so that the malfunction of the high impedance output circuit by the leak current is prevented without increasing the pitches between the pins and without the necessity of the sealing by resin.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a leak current between pins for preventing a circuit that outputs a high impedance line from malfunctioning due to a leak current generated between the pin and a leak current protection pin. It relates to a protective device.

[0002]

2. Description of the Related Art A conventional inter-pin leakage current protection device will be described below. 6 and 7 show a conventional inter-pin leakage current protection device. In FIG. 6, 1 is an IC package, 3 is a high impedance output circuit, 4 is a high impedance output pin of the high impedance output circuit 3, 5
Is a leak current protection pin adjacent to the high-impedance output pin 4, and 21 is an interval between the pins.

The operation of the inter-pin leakage current protection device configured as described above will be described below. First, if the potential difference V between the pins is constant, the leak current I generated between the pins is determined by the impedance R between the pins from the relationship of I = V / R. FIG. 6 shows a pin-to-pin leak protection device having a pin-to-pin interval 21 so that the high-impedance output circuit 3 does not malfunction due to the pin-to-pin leak current. As a factor that determines the space 21 between the pins,
Since the parasitic capacitance of the internal circuits and peripheral circuits of the IC and the potential of the leakage current protection pin 5 on one side or both sides adjacent to the high impedance output pin 4 are arbitrary potentials from the power supply voltage to the ground, the potential difference V between the pins is Maximum value V in operation
When changing from max to the minimum value Vmin V = Vmax
Therefore, the high impedance output circuit 3 does not malfunction, the pin peripheral circuit deteriorates over time, and the leak current increases due to accumulated dust and dust.

In FIG. 7, 22 is a resin that physically covers the leakage current protection pin 5 and the high impedance output pin 4 from above the pins. By physically covering the pins from above with a resin and electrically insulating them from each other, it is possible to prevent malfunction of the high impedance output circuit 3 due to a change in the distance between the pins due to an external force and a leak current caused by a foreign substance.

In each of the conventional examples, the impedance R is increased to suppress the leak current and prevent the high impedance output circuit 3 from malfunctioning.

[0006]

However, in the above-mentioned conventional configuration of FIG. 6, it is necessary to provide a sufficient pin interval 21 to prevent malfunction of the high impedance output circuit 3 due to an increase in leak current. The package size must be increased as much as the distance 21 between the two is larger, and the larger the package size, the more disadvantageous in cost.

When the resin sealing shown in FIG. 7 is performed, a resin coating step and a drying step are required at the minimum after the assembling step. Labor costs, resin material costs, resin sealing process time, etc. are required, which is disadvantageous in terms of cost. This invention solves the above-mentioned conventional problems,
An object of the present invention is to provide a pin-to-pin leakage current protection device capable of preventing malfunction due to a leakage current of a high impedance output circuit without increasing the pin interval or requiring resin sealing.

[0008]

An inter-pin leakage current protection device according to claim 1 is a high impedance output circuit having a high impedance output pin, and a leakage current protection pin adjacent to the high impedance output pin and having a low impedance. And a leakage current protection circuit in which the potential difference between the leakage current protection pin and the high impedance output pin is reduced.

According to the inter-pin leakage current protection device of the first aspect, the potential difference between the high impedance output pin and the adjacent low impedance leakage current protection pin is reduced by the leakage current protection circuit. The leak current generated can be reduced. Therefore, it is possible to prevent malfunction due to the leak current of the high impedance output circuit without increasing the pin interval and without requiring resin sealing.

According to a second aspect of the present invention, there is provided the inter-pin leakage current protection device according to the first aspect, wherein the leakage current protection pins are a pair of high impedance output pins adjacent to each other on both sides. According to the inter-pin leakage current protection device of the second aspect, there is the same effect as the first aspect.

According to a third aspect of the present invention, there is provided an inter-pin leakage current protection device according to the first or second aspect, in which the leakage current protection circuit has a base connected to the high impedance output pin and an emitter connected to the leakage current protection pin. It has an NPN transistor and a current source connected to the emitter of the NPN transistor. According to the inter-pin leakage current protection device of the third aspect, the same effect as that of the first or second aspect is provided.

According to a fourth aspect of the present invention, there is provided an inter-pin leakage current protection device according to the first or second aspect, in which the leakage current protection circuit has a base connected to the high impedance output pin and a first current source connected to the emitter. It has an NPN transistor and a PNP transistor whose base is connected to the emitter of this NPN transistor and whose second current source and leakage current protection pin are connected to the emitter.

According to the inter-pin leakage current protection device of the fourth aspect, in addition to the effect of the first or second aspect, the potential difference between the pins becomes smaller than that of the third aspect. According to a fifth aspect of the present invention, there is provided an inter-pin leakage current protection device according to the first or second aspect, wherein the leakage current protection circuit is a buffer having an input connected to a high impedance output pin and a low impedance output connected to the leakage current protection pin. It is a circuit.

According to the inter-pin leakage current protection device of the fifth aspect, the same effect as that of the first or second aspect can be obtained.

[0015]

BEST MODE FOR CARRYING OUT THE INVENTION A first embodiment of the present invention will be described with reference to FIG. FIG. 1 shows the first of the present invention.
2 is a configuration diagram of the inter-pin leakage current protection device in the embodiment. FIG. In FIG. 1, 1 is an IC package, 2 is an inter-pin leakage current protection circuit, 3 is a high impedance output circuit, 4 is a high impedance output pin, 5 is a leakage current protection pin, and 6 is an inter-pin leakage of impedance between pins. Resistors R ₁ and 9 are high impedance input sections, 10 is a low impedance output section, and 11 is a high impedance output section.

This inter-pin leakage current protection device has a high impedance output circuit 3 and a leakage current protection circuit 2. The high impedance output circuit 3 has a high impedance output pin 4. The leakage current protection circuit 2
A low-impedance leak current protection pin 5 is provided adjacent to the high-impedance output pin 4 to reduce the potential difference between the leak current protection pin 5 and the high-impedance output pin 4. In the first embodiment, the package 1 includes the high impedance output circuit 3 and the inter-pin leakage current protection circuit 3, and the high impedance output pin 4 is laid out so as to project to the end of the package 1, and the leakage current protection pin 5 is provided. Is adjacent to the high impedance output pin 4 and protrudes.

The operation of the inter-pin leakage current protection device of the first embodiment configured as described above will be described below. Input from the high impedance output section 11 of the high impedance output circuit 3 to the high impedance input section 9 of the inter-pin leak protection circuit 2 by a high impedance line, and from the low impedance output section 10 of the inter-pin leak protection circuit 2 to the leak current protection pin 5 To the high impedance output pin 4 and to reduce the potential difference V1-V2 from the high impedance output pin 4.

As described above, according to the first embodiment,
High-impedance output pin 4 and leakage current protection pin.
Leakage current I generated between₁Is I₁= (V2
-V1) / R₁And the potential difference V2-V1 between the pins becomes
Leakage resistance between pins R ₁Is determined by This thing
From the high impedance output circuit 3 to the IC package
Adjacent to the high impedance output pin 4 at the end of
Leakage current I between the leakage current protection pin 5 and₁Flow
Depending on the magnitude of pin-to-pin leakage current,
The impedance output circuit 3 malfunctions,
Leakage can be reduced by reducing the potential difference V2-V1 between pins.
Style I₁Can be made smaller, which allows the interior of the IC to
Circuit and peripheral circuit parasitic capacitance, and pin peripheral circuit
Current due to aging deterioration and accumulated dust and dust
Of the high impedance output circuit 3 caused by the increase of
It is possible to prevent malfunction. In addition, with a pin due to external force
Leakage current I due to changes in pin spacing and foreign matter₁From ha
(A) To prevent malfunction of the impedance output circuit 3
it can.

This embodiment is suitable when the high impedance output pin 4 is laid out at the end of the package 1. According to the first embodiment, the leakage current protection circuit 2 allows the high impedance output pin 4
Since the potential difference between the pin and the low-impedance leak current protection pin 5 adjacent thereto is reduced, the leak current generated between the pins can be reduced. Therefore, it is possible to prevent malfunction due to the leak current of the high impedance output circuit without increasing the pin interval and without requiring resin sealing.

FIG. 2 shows an inter-pin leakage current protection device according to the second embodiment of the present invention. In FIG. 2, 1
Is an IC package, 3 is a high impedance output circuit, 11 is a high impedance output section, 13 is a high impedance output pin, 2 is a pin-to-pin leakage current protection circuit,
9 is a high impedance input section, 10 is a low impedance output section, 12 is a first leakage current protection pin, 14 is a second leakage current protection pin, 7 is a first inter-pin leakage resistance R ₂ , and 8 is a second. Is the inter-pin leakage resistance R ₃ .

This inter-pin leakage current protection device is the one in which the leakage current protection pins 12 and 14 are adjacent to each other on both sides of the high impedance output pin 13 in the first embodiment. Input from the high-impedance output circuit 3 to the inter-pin leak protection circuit 2 via a high-impedance line, output from the inter-pin leak protection circuit 2 to the leak current protection pins 12 and 14 with low impedance, and a potential difference from the high-impedance output pin 13. V2-V3 and the potential difference V2-V4 are output so as to be small.

When the leakage current I ₂ flows from the high impedance output circuit 3 which causes a malfunction depending on the magnitude of the inter-pin leakage current to the high impedance output pin 13 to the leakage current protection pins 12 and 14 adjacent on both sides thereof. Then, the potential difference between the pins V2-V3 and V2
By reducing −V4, the leak current I ₂ = {(V ₂ −
V ₃ ) / R ₂ } + {(V ₂ −V ₄ ) / R ₃ } can be reduced, and due to parasitic capacitance of internal circuits and peripheral circuits, and deterioration of pin peripheral circuits over time and accumulated dust and dust. It is possible to prevent malfunction of the high impedance output circuit that occurs due to the increase of the leakage current. Further, it is possible to prevent malfunction of the high impedance output circuit 3 due to a change in the distance between the pins due to an external force and a leak current due to a foreign substance. Other effects are the same as those of the first embodiment.

FIG. 3 shows an inter-pin leakage current protection device according to the third embodiment of the present invention. In FIG. 3, 2
3 is a clamp circuit, 11 is a high impedance output section,
4 is a high impedance output pin, 2 is a leak current protection circuit, 9 is a high impedance input part, 10 is a low impedance output part, 5 is a leak current protection pin, 6 is a pin-to-pin leak resistance R ₁ , 15 is an NPN transistor, 16 Is a current source, Vcc is a power supply voltage, and GND is a ground.

This inter-pin leakage current protection device uses the high impedance output circuit 3 as the clamp circuit 23 in the first embodiment. Further, the leakage current protection circuit 2 has an NPN transistor 15 whose base is connected to the high impedance output pin 4 and whose emitter is connected to the leakage current protection pin 5, and a current source 16 which is connected to the emitter of this NPN transistor 15. Is. N
The collector of the PN transistor 15 is connected to the power supply voltage Vcc, and the current source 16 is connected to the ground GND.

According to this inter-pin leakage current protection device,
Input from the high-impedance output circuit 3 to the inter-pin leakage protection circuit 2 via a high-impedance line, output from the leakage current protection circuit 2 to the leakage current protection pin 5 with low impedance, and have a potential difference with the high-impedance output pin 4 as an NPN transistor. The voltage is output so as to be 15 base-emitter voltage Vbe.

Malfunction depending on the magnitude of leakage current between pins
The leakage current that causes the
B Output from the impedance output pin 4
Current I to the current protection pin 5₁And then this
Potential difference between pins V_Two-V₁= Vbe, leak current
I₁Is I₁= Vbe / R₁Becomes On the other hand, clamp ON
Clamp current flowing during the period is Ion, clamp OFF
The period of₁, The OFF period of the clamp circuit 23 is set to T_Two
Then, the charge Q during the charging period₁Is Q₁= (Ion-I₁) × T₁ And the charge Q during the discharge period_TwoIs Q_Two= I₁× T_Twoso
Given, so Q₁> Q _TwoClamp circuit 23 malfunctions
Leakage current I₁Is I₁<{T₁/ (T₁+ T_Two)} × Ion must be satisfied. Therefore I₁= Vbe / R₁Than R₁> {Vbe / Ion} × {(T₁+ T_Two) / T₁} By setting Ion that satisfies
Path and peripheral circuit parasitic capacitance, and pin peripheral circuit
Leakage current due to aging and accumulated dust and dust
High impedance output circuit malfunction due to increase
It can prevent cropping. In addition, the pin and the pin due to external force
Changes due to changes in the interval between
It is possible to prevent malfunction of the impedance output circuit.

FIG. 4 shows an inter-pin leakage current protection device according to a fourth embodiment of the present invention. In FIG. 4, 23 is a clamp circuit, 11 is a high impedance output section, 4 is a high impedance output pin, 2 is a leakage current protection circuit, and 9 is
Is a high impedance input unit, 10 is a low impedance output unit, 5 is a leakage current protection pin, 6 is a pin-to-pin leakage resistance R ₁ , 17 is an NPN transistor, 18 is a first current source, 19 is a PNP transistor, and 20 is a second 2 current sources.

This inter-pin leakage current protection device uses the clamp circuit 23 as the high impedance output circuit in the first embodiment. In addition, the leakage current protection circuit 2
Is an NPN transistor 17 whose base is connected to the high impedance output pin 4 and whose emitter is connected to the first current source 18, and a second current source 20 whose base is connected to the emitter of this NPN transistor 17 and the leakage current protection pin 5 Is connected to the emitter of the PNP transistor 19. The collector of the NPN transistor 17 and the current source 20 are connected to the power supply voltage Vcc, and the collectors of the current source 18 and the PNP transistor 19 are ground GND.
It is connected to the.

This inter-pin leakage current protection device inputs from the high impedance output circuit 3 to the inter-pin leakage protection circuit 2 by a high impedance line, and outputs from the inter-pin leakage protection circuit 2 to the leakage current protection pin 5 with low impedance. , And the base-emitter voltage of the NPN transistor 17 is Vbe ₁ and the base-emitter voltage of the PNP transistor 19 is Vbe ₂ , the potential difference from the high impedance output pin 4 is Vbe ₂ -Vbe _1. . As a result, the potential difference between the pins becomes smaller than that in the third embodiment.

In this embodiment, when a leak current flows from the clamp circuit 23, which causes a malfunction depending on the magnitude of the leak current between the pins, to the high impedance output pin 4, the leak current I flows to the adjacent leak current protection pin 5. _{If 1} flows, the potential difference between the pins V ₂ −V ₁
= Vbe ₂ -Vbe _1, and the leak current I ₁ is I ₁ =
_{(Vbe 2 -Vbe 1) / R} 1 become. When the clamp current flowing during the clamp ON period is Ion, the clamp OFF period is T ₁ , and the clamp circuit 23 OFF period is T ₂ , the charge Q ₁ during the charging period is Q ₁ = (Ion−I ₁ ) ×
Given by T ₁ , the charge Q ₂ during the discharge period is Q ₂ = I ₁ × T
_Since it is given by ₂ , the leak current I ₁ must satisfy I ₁ <{T ₁ / (T ₁ + T ₂ )} × Ion so that the clamp circuit 23 does not malfunction when Q ₁ > Q _2. . Therefore, I ₁ = (Vbe ₂ −Vbe
From _{1) / R 1, R 1} > {(Vbe 2 -Vbe 1) / Ion} × {(T 1
By setting Ion to satisfy + T ₂ ) / T ₁ }, it occurs due to the parasitic capacitance of the internal circuit and peripheral circuits of the IC, the deterioration of pin peripheral circuits over time, and the increase of leakage current due to accumulated dust and dust. A malfunction of the high impedance output circuit 3 can be prevented. Further, it is possible to prevent malfunction of the high impedance output circuit due to a change in the distance between the pins due to an external force and a leak current due to foreign matter.

FIG. 5 shows an inter-pin leakage current protection device according to the fifth embodiment of the present invention. In FIG. 5, 3
Is a high impedance output circuit, 11 is a high impedance output unit, 4 is a high impedance output pin, 24 is a buffer circuit, 9 is a high impedance input unit, 10 is a low impedance output unit, 5 is a leakage current protection pin,
Reference numeral 6 is an inter-pin leak resistance R ₁ .

In this inter-pin leakage current protection device, in the first embodiment, the leakage current protection circuit 2 is connected to the high impedance output pin 4 at the input and to the leakage current protection pin 5 at the low impedance output section 10. Buffer circuit. The high impedance output circuit 3 inputs to the buffer circuit 24, which is the leak protection circuit 2, by a high impedance line, and outputs from the buffer circuit 24 to the leak current protection pin 5 so as to have a low impedance.

According to this embodiment, by connecting the leakage current protection pin 5 adjacent to the high impedance output pin 4 connected to the high impedance output circuit 3 to the output of the buffer circuit 24, The leakage current protection pin 5 can be set to low impedance, and the potential difference between the high impedance output pin 4 and the leakage current protection pin 5 can be reduced, and the parasitic capacitance of the internal circuit and peripheral circuits of the IC and the aging of the pin peripheral circuit can be reduced. It is possible to prevent malfunction of the high impedance output circuit 3 caused by an increase in leak current due to deterioration or accumulated dust and dust. In addition, it is possible to prevent the malfunction of the high impedance output circuit 3 from the change in the distance between the pins due to an external force and the leakage current I1 due to the foreign matter.

The leakage current protection pins 5 of the third, fourth, and fifth embodiments may be arranged in pairs on both sides of the high impedance output pin.

[0035]

According to the inter-pin leakage current protection device of the first aspect, the leakage current protection circuit reduces the potential difference between the high impedance output pin and the adjacent low impedance leakage current protection pin. It is possible to reduce the leak current generated during the period. Therefore, it is possible to prevent malfunction due to the leak current of the high impedance output circuit without increasing the pin interval and without requiring resin sealing.

According to the inter-pin leakage current protection device of the second aspect, the same effect as that of the first aspect can be obtained. According to the inter-pin leakage current protection device of the third aspect, the same effect as that of the first or second aspect is provided. According to the inter-pin leakage current protection device of the fourth aspect, in addition to the effect of the first or second aspect, the potential difference between the pins becomes smaller than that of the third aspect.

According to the inter-pin leakage current protection device of the fifth aspect, the same effect as that of the first or second aspect can be obtained.

[Brief description of drawings]

FIG. 1 is an explanatory diagram of an inter-pin leakage current protection device according to a first embodiment of this invention.

FIG. 2 is an explanatory diagram of an inter-pin leakage current protection device according to a second embodiment.

FIG. 3 is a circuit diagram of an inter-pin leakage current protection device according to a third embodiment.

FIG. 4 is a circuit diagram of an inter-pin leakage current protection device according to a fourth embodiment.

FIG. 5 is a circuit diagram of an inter-pin leakage current protection device according to a fifth embodiment.

FIG. 6 is an explanatory diagram of a conventional inter-pin leakage current protection device.

FIG. 7 is an explanatory diagram of another conventional inter-pin leakage current protection device.

[Explanation of symbols]

 1 Package 2 Leakage Current Protection Circuit 3 High Impedance Output Circuit 4 High Impedance Output Pin 5 Leakage Current Protection Pin 6 Leakage Resistance 7 Leakage Resistance 8 Leakage Resistance 12 Leakage Current Protection Pin 13 High Impedance Output Pin 14 Leakage Current Protection Pin 15 NPN Transistor 16 Current source 17 NPN transistor 18 Current source 19 PNP transistor 20 Current source 23 Clamp circuit 24 Buffer circuit

Claims (5)

[Claims] 1. A high-impedance output circuit having a high-impedance output pin, and a low-impedance leak current protection pin which is adjacent to the high-impedance output pin and has a potential difference between the leak current protection pin and the high-impedance output pin. An inter-pin leakage current protection device having a reduced leakage current protection circuit. 2. The inter-pin leakage current protection device according to claim 1, wherein the leakage current protection pin comprises a pair of high impedance output pins adjacent to each other on both sides. 3. The leakage current protection circuit includes an NPN transistor having a base connected to a high impedance output pin and an emitter connected to the leakage current protection pin, and the NP transistor.
3. The inter-pin leakage current protection device according to claim 1, further comprising a current source connected to the emitter of the N-transistor. 4. The leakage current protection circuit includes an NPN transistor having a base connected to a high impedance output pin and a first current source connected to an emitter, and a second current source having a base connected to the emitter of the NPN transistor. 3. The inter-pin leakage current protection device according to claim 1, further comprising a PNP transistor in which a leakage current protection pin is connected to an emitter. 5. The inter-pin leakage current protection according to claim 1, wherein the leakage current protection circuit is a buffer circuit having an input connected to the high impedance output pin and a low impedance output connected to the leakage current protection pin. apparatus.