JPH09246420A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable easy manufacturing and miniaturization, by leading out an electrode of a semiconductor element provided on a board through a hole formed on the back side of the board, and forming an electrode pad on the back side of the board. SOLUTION: In an optical semiconductor chip 1, a semiconductor laser LD as a light-emitting device and a photodiode. PD as a light-receiving device are formed on the upper surface of a board, and a hole extending to an electrode 6p of optical elements, such as, the semiconductor laser LD and the photodiode PD, that is, a via-hole 7 is formed. A conductive layer connected to the electrode 6p is formed inside of the via-hole 7, and this conductive layer is led out to the back side of the optical semiconductor chip 1. An electrode pad 8 connected to the conductive layer is formed on the back side of the optical semiconductor chip 1. Thus, easy manufacturing is enabled and miniaturization may be realized.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device suitable for application to, for example, an optical device having a light emitting element or a light receiving element, and a manufacturing method thereof.

[0002]

2. Description of the Related Art Conventionally, a semiconductor device has been applied to, for example, an optical device that emits light or receives light, and an optical pickup or an optical IC formed with elements such as a semiconductor laser and a semiconductor light receiving element.
It is used for various purposes such as. An example of such a semiconductor device (optical device) is shown in FIGS.

The optical device shown in FIG. 9 is an optical device based on a so-called laser coupler.
B shows an enlarged view of the light receiving element. This optical device 65 is a semiconductor laser LD mounted on a silicon substrate 51 in which a photodiode PD _M for output control monitoring is formed.
As a light source, these components and the micro prism 60 are arranged on a substrate, that is, for example, a silicon substrate 50 to form a laser coupler. Then, under the micro prism 60, two four-division photodiodes PD _{1 to} P are provided.
D ₄ , PD _{5 to} PD ₈ are arranged. The photodiodes PD _{1 to} PD ₈ are formed on the surface of the silicon substrate 50 by diffusion or the like.

This four-division photodiode is shown in FIG. 9B.
As shown in the enlarged view, the photodiode PD₁, P
D_TwoAnd photodiode PD_Three, PD_FourIs symmetric,
When the focus and tracking are correct, the light intensity is P
D₁+ PD_Four= PD_Two+ PD _ThreeArranged to be
Have been. PD_Five~ PD₈The same applies to.

In this laser coupler, a semiconductor laser LD
The emitted light L _F from the micro prism 60 is, for example, 45.
The light is reflected by the inclined surface of the half mirror at an angle of .degree. The return light L _R reflected by the disk enters the micro prism 60 from the half mirror slope of the micro prism 60, is first received by the four-division photodiodes PD _{1 to} PD ₄ and is reflected, and this is reflected by the micro prism 6.
After being reflected by the 0 upper surface, the other four-divided photodiodes PD _{5 to} PD ₈ also receive the light.

On the other hand, the optical device of FIG. 10 is an optical device using a hologram element, and this optical device 70 uses a semiconductor laser LD mounted on a heat sink 71 as a light source for these components and output control monitors. The photodiode PD _M and the photodiode PD which is a light receiving element
And are arranged to cover them and the optical element package 7
2 is formed, and a hologram element 75 having a hologram pattern 74 formed on the upper surface thereof is arranged and formed on the optical element package 72 with a grating (diffraction grating) 73 interposed therebetween. Further, a connection terminal 76 for electrically connecting to the outside is provided at the bottom of the optical device 70.

Then, the light L emitted from the semiconductor laser LD
_F goes through the grating 73 and the hologram pattern 74 in the vertical direction in the figure, and is irradiated onto the irradiated portion, for example, the disk. The return light L _R reflected by the disk is diffracted by the hologram pattern 74 on the upper surface of the hologram element 75 and enters the light receiving element PD through an optical path different from that of the emitted light L _F, and the return light L _{R is} received at this light receiving element PD.
Is received, and various signals are detected thereby.

[0008]

However, in the above-mentioned optical devices 65 and 70, for each optical component,
It is necessary to perform precise alignment while illuminating the laser.

In general, an optical device using an optical semiconductor chip is often assembled by disposing a large number of optical components individually. Therefore, it is difficult to introduce a wafer batch process or the like suitable for mass production, which is used for manufacturing semiconductor devices. Also, it is difficult to secure stable alignment accuracy in individual assembly.

Further, in a normal semiconductor device, wiring is formed on the surface of the semiconductor chip and drawn out from the surface as it is, but a semiconductor device having a form such as an optical device in which optical parts and the like are arranged on the surface of the semiconductor chip. In this case, since the transparent optical component covers the surface of the semiconductor element on the surface of the optical semiconductor chip, the wiring cannot be drawn out by the usual method.

Even in a normal semiconductor device, if wirings and electrode pads are formed on a semiconductor chip, it is necessary to secure a space corresponding to the wiring and electrode pads on the surface, which causes restrictions in design of elements and miniaturization of the semiconductor device. It can be difficult.

In order to solve the above-mentioned problems, the present invention provides a semiconductor device which can be easily manufactured and can be miniaturized, and a manufacturing method thereof.

[0013]

According to the present invention, there is provided a semiconductor device comprising:
A hole is formed in the back surface of the substrate on which the semiconductor element is formed, the electrode of the semiconductor element is led out through the hole, and the electrode pad is formed on the back surface of the substrate.

According to the method of manufacturing a semiconductor device of the present invention, an electrode is formed on the upper surface of an element formation substrate, a hole is opened from the rear surface side of the substrate, and a conductive layer electrically connected to the electrode on the upper surface through the hole is formed on the rear surface of the substrate. Form.

Further, in the method for manufacturing a semiconductor device of the present invention, another substrate is bonded onto a wafer of an element forming substrate having an electrode formed on the upper surface, a hole is opened from the rear surface of the wafer, and an electrode on the upper surface is formed through this hole. An electrically connected conductive layer is formed on the backside of the wafer.

According to the present invention described above, the electrode pad is provided on the conventional upper surface by electrically connecting the electrode on the upper surface and the electrode pad on the back surface with the hole formed by making a hole from the rear surface of the substrate. Compared to the case, there is more room in the top surface layout, which increases the degree of freedom in designing semiconductor elements and
It is possible to reduce the size of the entire semiconductor device.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION A semiconductor device of the present invention has a structure in which a semiconductor element is formed on a substrate, electrodes of the semiconductor element are led out through holes formed on the back surface of the substrate, and electrode pads are formed on the back surface of the substrate. .

According to the present invention, in the above semiconductor device, the semiconductor element is an optical element.

The method of manufacturing a semiconductor device according to the present invention comprises a step of forming an electrode on the upper surface of an element forming substrate, a step of forming a hole from the back surface side of the substrate, and a conductive step electrically connected to the electrode on the upper surface of the substrate through the hole. Forming a layer on the back surface of the substrate.

According to the present invention, in the above method of manufacturing a semiconductor device, the substrate is formed of a conductive substrate.

According to the present invention, in the above method of manufacturing a semiconductor device, the substrate is formed of an insulating substrate.

The method of manufacturing a semiconductor device of the present invention comprises a step of bonding another substrate on a wafer of an element forming substrate having an electrode formed on the upper surface, a step of forming a hole from the back surface of the wafer,
Forming a conductive layer electrically connected to the upper electrode through the hole on the back surface of the wafer.

According to the present invention, in the method of manufacturing a semiconductor device, the back surface of the wafer is lapped before the step of forming a hole from the back surface of the wafer after the step of bonding another substrate onto the wafer of the element forming substrate. There is a step to do.

Embodiments of the present invention will be described below with reference to the drawings. The semiconductor device of this embodiment is formed by combining a semiconductor chip and a transparent component, and is manufactured by a wafer batch process using a semiconductor wafer and a transparent wafer, instead of an individual assembly process. As a wiring technique, so-called via hole wiring formed through the substrate is used.

FIG. 1A is a structural view (perspective view) of an embodiment of the semiconductor device of the present invention, and FIG. 1B is a sectional view thereof. The semiconductor device of this embodiment, the optical device 10 in this example.
The optical semiconductor chip 1 is used as a semiconductor chip, and the transparent optical component 2 and the optical semiconductor chip 1 are simply bonded together.

The optical semiconductor chip 1 has a semiconductor laser LD as a light emitting element and a photodiode PD as a light receiving element formed on the upper surface of a substrate 3. In the example of this figure, the photodiode PD has two photodiodes PD (PD _{1 to} PD ₃ ,
PD _{4 to} PD ₆ ) are formed. Further, the transparent optical component 2 made of glass or the like having the hologram pattern 4 formed on the upper surface thereof is arranged on the optical semiconductor chip 1, and these are joined by the joining layer 5 made of resin or solder.

The emitted light L _F generated by the laser light generated from the semiconductor laser LD is reflected by the inclined surface formed facing the semiconductor laser LD, passes through the hologram pattern 4 on the upper surface of the transparent optical component 2 and The light is emitted in the middle vertical direction and is irradiated onto an irradiated portion, for example, an optical recording medium such as a disk. The return light L _R reflected by the irradiated portion is diffracted by the hologram pattern 4 on the upper surface of the transparent optical component 2, and passes through the optical path different from that of the emitted light L _F, and thus the two photodiodes P _R.
The light is incident on D and the return light L _R is received by the photodiode PD, and various signals are detected by this.

In an ordinary semiconductor device, wiring is formed on the surface of the semiconductor chip and is drawn out from the surface as it is. However, in the case of the optical device 10 of the form shown in FIG. 1, the transparent optical component 2 is the optical semiconductor chip. Since the surface of the semiconductor element on one surface, that is, the surface of the optical element such as the semiconductor laser LD and the photodiode PD is covered, the wiring cannot be drawn out by an ordinary method.

Therefore, in the optical device 10 of this embodiment, the electrode pad 8 is formed on the back surface of the optical semiconductor chip 1 opposite to the transparent optical component 2 by using the so-called via hole wiring technique.
Is formed. That is, as shown in the enlarged schematic view of FIG. 2, a hole, that is, a via hole 7 is formed in the optical semiconductor chip 1 so as to communicate with the electrode 6p of the optical element such as the semiconductor laser LD or the photodiode PD on the upper surface thereof. Then, a conductive layer connected to the electrode 6p is formed in the via hole 7, the conductive layer is led out to the back surface of the optical semiconductor chip, and an electrode pad 8 connected to the conductive layer is formed on the back surface of the optical semiconductor chip 1. To do.

Each photodiode PD divided into three parts
Also for (PD _{1 to} PD ₃ , PD _{4 to} PD ₆ ), electrodes and terminals thereof are formed in the same manner as PD ₁ , though not shown,
These are connected to the corresponding electrode pads on the back surface of the semiconductor chip 1.

The electrodes formed on the upper surface of the optical semiconductor chip 1 are the semiconductor laser LD and the photodiode P.
The p-side electrode 6p corresponding to one conductivity type of D, for example, p-type, but the other conductivity type electrode, for example, the n-type electrode, is, for example, as shown in an enlarged view in FIG. N-side electrode 6n is formed in the recess 9 formed by etching from the upper surface to the back surface of the other conductivity type, for example, the n-side semiconductor layer, and the via hole 7 is formed toward this.
Can be formed and similarly connected to the electrode pad 8 on the back surface of the semiconductor chip 1.

According to this optical device 10, since the electrode pad 8 occupying a considerable area on the chip is drawn out to the back surface of the semiconductor chip 1 by the via hole wiring, the semiconductor chip 1 can be further miniaturized. Further, since the optical device 10 is mounted on the wiring board by so-called flip chip bonding, wire bonding is unnecessary, and the transparent optical component 2 itself serves as a package, so that the semiconductor chip 1 is protected. No package is required.

Further, the wiring can be drawn out as it is in the form of FIG. 1, and the optical semiconductor chip 1 and the transparent optical component 2 can be drawn out.
By making the bonding areas of the same, the optical device can be directly manufactured by the wafer batch process described later.

Next, an example of a specific manufacturing process for drawing a via hole wiring will be described. First, a case where the substrate is a conductive substrate is shown in FIGS. 4A to 5G. As shown in FIG. 4A, a growth layer 1 formed by crystal growth of a semiconductor in which a semiconductor laser LD and a photodiode PD are formed on a conductive substrate 11.
2. An optical semiconductor chip is provided in which an insulating layer 13 for surface protection and a conductor layer 14 which is one of the electrodes of the semiconductor laser LD and the photodiode PD are laminated. The conductor layer 14 on the surface of the conductive substrate 11 is the contact portion 1 at the left end in the figure.
5 is connected to the growth layer 12.

First, as shown in FIG. 4B, the conductive substrate 1
An insulating layer 16 serving as an insulating protective film and an etching mask is formed on the back surface of 1. Next, as shown in FIG. 4C, the insulating layer 16 at a place where a via hole will be formed later is removed by patterning.

Next, as shown in FIG. 4D, a via hole 7 reaching the insulating layer 13 under the conductor layer 14 is formed in the conductive substrate 11 by RIE (reactive ion etching) using the insulating layer 16 as a mask. Next, as shown in FIG. 5E, the insulating coating film 17 is formed on the via hole 7 by a vapor deposition method or the like.
It is formed over the entire inner surface and the back surface side of the conductive substrate 11.

Next, as shown in FIG. 5F, the insulating coating film 17 on the upper portion 7 a of the via hole 7 and the insulating layer 16 under the conductor layer 14 are etched off by RIE or the like to expose the conductor layer 14 to the via hole 7. Let At this time, a part of the insulating layer 16 on the back surface of the conductive substrate 11 and the insulating coating film 17 are also etched off. Further, in the RIE in this step, an RIE device different from the RIE device used in FIG. 4D is used.

Next, as shown in FIG. 5G, the second conductor layer 18 is continuously formed on the back surface side of the conductive substrate 11, the inner wall surface of the via hole 7 and the surface of the conductor layer 14 facing the via hole 7 by oblique vapor deposition. To form. Next, the second conductor layer 18 deposited on the back surface of the conductive substrate 11 is patterned to form the electrode pads 8 (see FIG. 2) by the second conductor layer 18 on the back surface of the conductive substrate 11. By forming the second conductor layer 18, it is possible to electrically connect the electrode on the front surface, that is, the conductor layer 14 connected to the growth layer 12 of the optical element at the contact portion 15, and the electrode pad on the back surface. it can. At this time, the second conductor layer 18 is reliably formed on the inner wall surface of the via hole 7 by performing oblique vapor deposition.

Next, FIGS. 6A to 7G show the manufacturing method when the substrate is an insulating substrate. In this case, as shown in FIG. 6A, the growth layer 1 where the via holes are to be previously formed is formed.
2 and part of the insulating substrate 21 are etched off, and then the insulating layer 13 and the conductor layer 14 on the surface are formed. Other configurations are the same as those in FIG. 4A.

First, as shown in FIG. 6B, the insulating substrate 21
A resist 22 is formed on the entire back surface of the. Next, FIG.
As shown in C, the resist 22 at a place where a via hole will be formed later is removed by patterning.

Next, as shown in FIG. 6D, the resist 22 is used.
With the mask as a mask, a via hole 7 reaching the insulating layer 13 under the conductor layer 14 is formed in the insulating substrate 21 by RIE (reactive ion etching). Next, as shown in FIG. 7E, the resist 22 on the back surface of the insulating substrate 21 is removed.

Next, as shown in FIG. 7F, the insulating layer 1 under the conductor layer 14 on the upper portion 7a of the via hole 7 is formed by RIE or the like.
3 is etched off to expose the conductor layer 14 in the via hole 7. Further, in the RIE in this step, an RIE device different from the RIE device used in FIG. 6D is used.

Next, as shown in FIG. 7G, a continuous second conductor layer 18 is formed on the back surface side of the insulating substrate 21, the inner wall surface of the via hole 7 and the surface of the conductor layer 14 facing the via hole 7 by oblique vapor deposition. Form. Next, the insulating substrate 21
The second conductor layer 18 vapor-deposited on the back surface of the is patterned to form the electrode pad 8 (see FIG. 2) by the second conductor layer 18 on the back surface of the insulating substrate 21. This second conductor layer 1
8 is formed, it is possible to electrically connect the conductor layer 14 on the front surface, which is connected to the growth layer 12 of the optical element at the contact portion 15, and the electrode pad on the back surface.

In addition to this, various methods can be considered as a method of forming a via hole, a method of forming a conductor layer, and the like. For example, in the above process, the via holes 7 can be formed in the substrates 11 and 21 by, for example, wet etching instead of RIE.

Further, in FIGS. 5G and 7G, the second conductor layer 18 is simply drawn out on the back surface by oblique vapor deposition, but it is also possible to fill the via hole by using a plating technique or the like. In this case, a conductive metal layer having good thermal conductivity is formed on the entire inner wall of the via hole 7, which is advantageous for heat dissipation.

Next, as an example of a method of manufacturing the optical device 10 of this embodiment, a method using a full wafer process using the above-mentioned via hole wiring drawing technique will be described with reference to FIGS. 8A to 8D.
Shown in First, as shown in FIG. 8A, a semiconductor wafer 31 on which a large number of devices each having a semiconductor element such as a light emitting element and a light receiving element are formed in advance, and a transparent wafer 30 to be a transparent optical component are prepared. In the figure, 31a indicates one device. Examples of transparent wafers include glass, quartz,
Sapphire or the like is used.

Next, as shown in FIG. 8B, the transparent wafer 30 and the semiconductor wafer 31 are separated by, for example, UV curing resin.
Bonding layer 5 of resin such as thermosetting resin or solder (see FIG. 1)
To form a laminated body 32.

At this time, in the processing step of forming the shape of the transparent optical component 2, the transparent wafer 30 is processed into the shape of the transparent optical component in advance, and then the above-mentioned bonding step of the laminated body 32 is performed, or the laminated body 32 is processed. Any method of processing the transparent wafer 30 after the bonding step to form the transparent optical component 2 can be adopted. In addition, the transparent wafer 3
The step of forming the hologram pattern or the reflection film on the layer 0 may be performed before or after the step of joining the laminate 32 described above. At this time, pattern formation can be performed through the transparent wafer 30 while aligning with the semiconductor elements of the semiconductor wafer 31.

Next, the back surface of the semiconductor wafer 31 is lapped to reduce the thickness of the semiconductor wafer 31. After lapping the back surface, the via hole 7 is formed inside the semiconductor wafer 31, and the electrode pad 8 is formed on the back surface. And
As shown in FIG. 8C, the laminate 32 is vertically and horizontally cut, and each unit device 31a (the transparent optical component 2 and the optical semiconductor chip 1 is cut).
To obtain an optical device 10) having a fixed lens.

Next, as shown in FIG. 8D, this unit device 31a is mounted by so-called flip chip bonding on the wiring board 33 which also functions as a heat sink.

Although not shown, a plurality of unit devices 31a
After mounting a set of chips on a wiring board, it is also possible to cut this into individual unit devices. By manufacturing the optical device 10 in this manner, the following various advantages are obtained.

Wafer-to-wafer alignment can be performed (parallel alignment and alignment are easy. Ordinary mask alignment method can be used), or optical elements (hologram etc.) are formed after the wafers are bonded to each other. Or
Since such a process is possible, highly accurate optical element alignment can be easily realized, which is advantageous in yield and cost, and is suitable for mass production.

Since the semiconductor wafer 31 and the transparent wafer 30 are bonded together, the transparent wafer 30 serves as a support, and the semiconductor wafer 31 can be easily lapped so as to be thin. As a result, it is advantageous for heat dissipation of the semiconductor element such as the semiconductor laser LD formed on the surface of the semiconductor chip 1,
Further, it is also convenient for forming the via hole 7 because the etching thickness for opening the hole can be reduced.

Further, by using a material having a high thermal conductivity for the transparent optical component 2, the heat sink effect can be enhanced.

Since the chip 31a finally separated by dicing or the like is basically mounted and used by flip chip bonding, neither package nor wire bonding is required, which is advantageous in cost.

In this case, since the electrode pad 8 that normally occupies a considerable area on the semiconductor chip is formed on the back surface of the semiconductor chip 1, the semiconductor chip 1 itself can be made smaller.

In the above-mentioned embodiment, the via hole 7 is formed inside the semiconductor chip 1. However, for example, the via hole 7 is formed on the transparent optical component 2 side to form the transparent optical component 2.
It is possible to adopt a structure in which the electrode is drawn out on the surface of the. Also in this case, the effect of the present invention can be obtained as in the above-described embodiment.

In the above example, the optical semiconductor chip 1 including the semiconductor laser LD and the photodiode PD is applied, but the so-called CLC (which has the other semiconductor laser and the photodiode and is arranged near the confocal position of the converging means). An optical semiconductor chip having a confocal laser coupler configuration can also be used.

The semiconductor device and the manufacturing method thereof according to the present invention are
The invention is not limited to the above-mentioned optical device, but can be applied to other semiconductor devices and the like, and various other configurations can be taken without departing from the scope of the present invention.

[0060]

According to the above-described semiconductor device of the present invention, the semiconductor chip can be miniaturized by using the via hole to draw out the electrode pad on the back surface of the semiconductor chip.

Further, by introducing a wiring technique using via holes, a full wafer batch process suitable for mass production can be applied. By applying this full wafer batch process, it becomes advantageous in terms of yield and cost.

According to the manufacturing method of the present invention, since the wafers can be aligned with each other, the highly accurate alignment can be easily performed. Since the semiconductor device can be formed after the wafers are bonded to each other, when the semiconductor device is applied to the optical device, highly accurate optical device alignment can be easily realized.

Further, according to the present invention, since the semiconductor wafer and the other substrate are bonded together, the lapping thickness of the back surface of the semiconductor wafer can be made thinner than before, and a laser or the like formed on the front surface of the semiconductor chip can be used. The heat sink effect of the semiconductor element can be enhanced.

Finally, the chip separated by dicing or the like has a basic structure in which it is mounted by flip chip bonding and used. Therefore, neither package nor wire bonding is required, which is advantageous in terms of cost.

[Brief description of drawings]

FIG. 1A is a schematic configuration diagram (perspective view) of an embodiment of a semiconductor device of the present invention. B is a cross-sectional view of FIG. 1A.

FIG. 2 is an enlarged view of the semiconductor device of FIG.

FIG. 3 is an enlarged view of the semiconductor device of FIG.

4A to 4D are manufacturing process diagrams of an example of the manufacturing process of the semiconductor device of the present invention.

5A to 5G are manufacturing process diagrams of an example of a manufacturing process of the semiconductor device of the present invention.

6A to 6D are manufacturing process diagrams of an example of the manufacturing process of the semiconductor device of the present invention.

7A to 7G are manufacturing process diagrams of an example of a manufacturing process of the semiconductor device of the present invention.

8A to 8D are manufacturing process diagrams of an example of a manufacturing process of the semiconductor device of the present invention.

FIG. 9 is a schematic configuration diagram of an example of a conventional optical device.

FIG. 10 is a schematic configuration diagram of another example of a conventional optical device.

[Explanation of symbols]

1 optical semiconductor chip, 2 transparent optical components, 3 substrate, 4
Hologram pattern, 5 bonding layers, 6n n-side electrode,
6pp side electrode, 7 via hole, 8 electrode pad, 9
Recesses, 10 Optical device, 11 Conductive substrate, 12 Growth layer, 13, 16 Insulating layer, 14 Conductor layer, 15 Contact part, 17 Insulation coating layer, 18 Second conductor layer, 21
Insulating substrate, 22 resist, 30 transparent wafer, 31
Semiconductor wafer, 31a unit device, 32 laminated body, 33 wiring board, 50, 51 silicon substrate, 60
Micro prism, 65, 70 Optical device, 71 Heat sink, 72 Optical element package, 73 Grating, 74 Hologram pattern, 75 Hologram element, LD semiconductor laser, PD photodiode,
PD _M output control monitor photodiode

Claims (7)

[Claims] 1. A semiconductor device comprising a semiconductor element formed on a substrate, electrodes of the semiconductor element being led out through holes formed in the back surface of the substrate, and electrode pads being formed on the back surface of the substrate. 2. The semiconductor device according to claim 1, wherein the semiconductor element is an optical element. 3. A step of forming an electrode on the upper surface of the element forming substrate, a step of forming a hole from the back surface side of the substrate, and a conductive layer electrically connected to the electrode on the upper surface of the substrate through the hole. And a step of forming on the back surface. 4. The method of manufacturing a semiconductor device according to claim 3, wherein the substrate is a conductive substrate. 5. The method for manufacturing a semiconductor device according to claim 3, wherein the substrate is an insulating substrate. 6. A step of adhering another substrate onto a wafer of an element formation substrate having an electrode formed on the upper surface, a step of forming a hole from the back surface of the wafer, and an electrode electrically connected to the upper surface through the hole. And a step of forming a connected conductive layer on the back surface of the wafer. 7. A step of lapping the back surface of the wafer after the step of bonding another substrate onto the wafer of the element forming substrate and prior to the step of forming a hole from the back surface of the wafer. The method of manufacturing a semiconductor device according to claim 6.