JPH09237090A - Sound effect adding device using dsp - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a sound effect adding device which can increase a speed of switching a program at the time of adding plural sound effect and reduction of discrete parts. SOLUTION: This device has an instruction RAM storing a main routine including a program controlling input/output of a musical sound signal and plural sound effect selecting adding routine (fn) being capable of selecting which is operated by being transferred by a main CPU 10 at the time of necessity and being accessed from the main routine. The main routine has such a function that it distributes an input signal to the plural selected sound effect adding routine (fn) (callfn), while collects effect adding signals outputted from these sound effect adding routine (fn) and makes it an output signal. Also wiring change of input/output signals for adding plural sound effect is performed without changing the main routine at the time of distributing input signals and collecting effect adding signals by changing coefficient data transferred from the main CPU 10 and stored in DSP1a and 1b.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a sound effect adding device using a DSP capable of adding a plurality of sound effects.

[0002]

2. Description of the Related Art A sound effect adding apparatus using a so-called DSP (digital signal processor) is disclosed in Japanese Patent Laid-Open No.
As shown in No. 8-50595, some DSPs add a plurality of acoustic effects in a time division manner.

[0003]

However, in the above configuration,
From the main arithmetic circuit such as CPU to DSP for each added sound effect
On the other hand, there is a problem that the transfer speed is inevitably slow because the program corresponding to it is transferred and the serial transfer is performed by handshake.
In addition, if the transfer speed is too slow in consideration of the control of other components in the system, the number of sound effects that can be added is limited, and the musical expression is limited based on such a technical limit. There was also the problem of being lost. Further, in the above configuration, since a plurality of acoustic effects are added by time division processing, when the acoustic effects are changed, preprocessing such as clearing the data storage unit is performed,
At that time, the output of the musical tone signal may be interrupted or a strange musical tone signal may be output. In order to avoid this, in JP-A-1-198796, a circuit that bypasses the DSP is provided and a crossfade circuit is additionally provided, and the output of the bypass circuit and the output of the DSP are crossfaded,
When the sound effect is changed, the output of the musical tone signal is not interrupted and the strange musical tone signal is not output. However, this requires a discrete component called a cross-fade circuit, which causes a problem that the device cannot be downsized and man-hours at the time of production cannot be reduced.

The present invention was devised to solve the above-mentioned problems of the prior art, and a sound effect adding device capable of speeding up program switching when adding a plurality of sound effects and reducing discrete parts. Is intended to be provided.

[0005]

SUMMARY OF THE INVENTION Therefore, the present invention provides a sound effect adding apparatus which operates under the control of a main arithmetic circuit and which can simultaneously select and process a plurality of sound effects by one DSP.
Instructions for storing a main routine including a program for controlling the input / output of musical tone signals, and a plurality of selectable sound effect adding routines which are transferred by the main arithmetic circuit and are operated by being accessed from the main routine when necessary A storage unit is provided in the DSP, and the main routine distributes an input signal to a plurality of selected sound effect addition routines and collects effect addition signals output from these sound effect addition routines. By changing the coefficient data transferred from the main arithmetic circuit and stored in the DSP, the main routine is changed when the input signal is distributed and the effect addition signal is collected. The basic feature is to change the connection of input / output signals to add a plurality of sound effects.

In this configuration, since a plurality of acoustic effects can be added and changed by the distribution of the input signal to the plurality of acoustic effect adding routines by the main routine and the connection change by simply changing the coefficient data, When the main routine is stored in the command storage unit and an arbitrary sound effect addition routine is selected and stored in the command storage unit, the addition or modification of the target sound effect is performed by the combination of the sound effect addition routines by the main routine. It becomes possible to eliminate the need for pre-processing such as clearing the memory of the instruction storage unit, and to add / change the sound effect.
It is sufficient to change and output only the coefficient data in the SP, and it is not necessary to transfer a new program.

In the above structure, the coefficient data is changed by changing the distribution coefficient data of the input signal to each acoustic effect addition routine and / or the collection coefficient data from each acoustic effect addition routine.

Further, when the connection is changed by changing the coefficient data, an envelope value calculated in the DSP is used as the coefficient data, and if the coefficient data is gradually changed to a target value, a crossfade circuit or the like can be obtained. It is possible to crossfade without using.

[0009]

FIG. 1 is a block diagram of an electronic musical instrument having an embodiment of a sound effect adding apparatus according to the present invention. In the figure, 100 is a panel operator
6 shows a panel operation display block, in which the contents operated by the user (player) on the panel of the electronic musical instrument are taken in, and at the same time, the state of the electronic musical instrument at that time (for example, as shown in FIG. 3) based on a command from the master CPU 10 described later. The effect connection status is displayed. Key switch block 101
Receives the on / off information of the key switch together with the key velocity and sends it to the master CPU 10. The MIDI input / output block 102 outputs the contents processed by the master CPU 10 (various kinds of information such as key-on / off, tone color number change, effect change, etc.), and sends the MIDI input information to the master CPU 10. FD input / output block 10
Reference numeral 3 stores or reads out various information (performance information, panel registration information, effect information, etc.) possessed by the master CPU 10 in an external storage medium such as a flexible disk. RAM 104 is a master CPU
At the same time as the 10 working RAMs, it is also a storage area for automatic performance patterns and automatic accompaniment patterns. ROM
Reference numeral 105 stores the program of the master CPU 10 and at the same time stores the program of the DSP described later (of course, the program of the DSP can be read from an external storage medium and stored in the RAM 104). . On the other hand, the coefficient data used for various effect programs of the DSP are also stored in the ROM 105. The ROM 105 can be replaced with a flash memory or the like. In the configuration of the embodiment, the master CPU 10 constitutes the main arithmetic circuit of the present invention that controls all the electronic musical instruments, and the panel initialization after the power is turned on, the RAM 10
4 and initial setting of DSPs 1a and 1b (initial loader) described later. When the tone color is changed on the panel, the corresponding parameter is set to the tone generator circuit 1 described later.
If the key is turned on and off, the state of the corresponding CH of the tone generator circuit 106 is updated based on the assignment result. In addition, a new effect is selected in the panel or Fig. 3
When a new effect chain as shown in is selected,
Corresponding program stored in ROM 105 (however, in the case of connection change as described later, only coefficient data)
And coefficient data are transferred to the DSPs 1a and 1b. The tone generator circuit 106, under the control of the master CPU 10, is capable of simultaneously producing 32 DCO (digital controlled oscillator) sounds, and there is no particular limitation on the waveform generation method. Pronunciation is performed by the sign synthesis method. The 32 sounds created here are multiplied by independent mixin grades for each of the four output sequences, and then 32 DCO is added to each sequence, and O is added.
It is output from UT1 to OUT4. This OUT1-OU
The output of T4 is a serial stereo output, which is a CDF generally used for CDs (compact discs).
It conforms to the format. Therefore, these outputs OUT1
..- OUT4 is the same as the input format of the DAC (digital-analog converter) 107 as long as it is mixed without going through the DSPs 1a and 1b.
It can be directly connected to C107.

The DSPs 1a and 1b are the same general-purpose DSPs.
External RAM (for example, 1 Mbit DRAM x 2)
Under control, various sound effects are added to the tone signal. These DSPs 1a and 1b have two inputs and two outputs, and each is a stereo signal. Of these, DSP1
Sout1 of b is not connected to the external output. The internal configuration of these DSPs is as shown in FIG. 2 as an example, and the program transferred from the master CPU 10 and stored in the instruction RAM 2a corresponding to the internal instruction storage unit and the coefficient data stored in the coefficient RAM 2b. Based on the above, for the tone signal stored in the data RAM 2c,
A plurality of effect addition programs are time-divisionally processed within one sample time (about 44.1 KHz). That is, the instruction RAM 2a
The program stored in is decoded by the decoder and
The control in the SP is performed, the tone signal input from the tone generator circuit 106 is stored in the data RAM 2c, and the coefficient data transferred from the master CPU 10 is stored in the coefficient RAM 2b as described above. Then, the coefficient data is sequentially stored in the C register 3a and the data of the tone signal is sequentially stored in the D register 3b by the control command, and the product of both registers is obtained by the multiplier 4 and temporarily stored in the P register 5.
The multiplication value is added by the adder 6 together with the previous addition value stored in the Y register 7 and returned via the gate 8, and Y
Stored in register 7, these are repeated as many times as necessary. The signals for which the multiplication / addition processing has been completed are output from the selector 9 only in the upper 24 bits (the lower 2 bits only in the case of double precision).
4bit is also used) is stored in the data RAM 2c,
Whether another acoustic effect addition process is performed again on the stored signal, or another acoustic effect addition process is performed on another musical tone signal separately from the stored signal, and further, SIO
1, SIO1 and Sout2 of SIO2. The tone signals are input to the DSPs 1a and 1b using SIO1 and 2, and the effect added signals are output from the DSP using SIO1 and 2. However, as described above, Sout1 of the DSP 1b is not connected to the external output. In addition, these DSPs 1a to 1b
The + in the circle on the output stage side of means an adder, and since the L / R time-division serial signal actually comes in the CDF format, the serial-
After parallel conversion and addition are performed, parallel-serial conversion is performed and a serial signal is output again.

The DAC 107 is a general-purpose digital-analog converter, and its output signal is output from a speaker through an amplifier.

FIG. 3 shows outputs OUT1 to OUT1 of the tone generator circuit 106.
4 through the two DSPs 1a-1b to the DAC 107
It shows the connection route to reach. F1 and f in the figure
Reference numeral 2 indicates two acoustic effect addition routines (processing) processed by the DSP 1a, and f3 and f4 indicate two acoustic effect addition routines processed by the DSP 1b. There are five types of connection patterns M1 to M5.

In the connection pattern of M1 among them, for example, a tremolo effect is applied to the musical tone signal output from OUT1 of the sound source circuit 106 at f1, the musical tone signal from the same OUT2 is added to this, and a chorus effect is applied at f2. At the same time, the tone signal outputted from OUT3 is added to the signal outputted therefrom, the delay effect is applied to it at f3, and the tone signal outputted from OUT4 is further added,
The reverb effect is applied at f4 and output. To change these connections, as shown in FIG. 4, which will be described later, the coefficient data of the main flow in each DSP is changed (for example, 0H ← → 7F).
FFH). Also DSP1a and DSP
Whether 1b and 1b are connected in series or in parallel depends on the DSP.
It is determined by whether the output of 1a is set to Sout1 or Sout2, and eventually it depends on the coefficient data change in the DSP. Since this coefficient data is formed by a 16-bit binary number and is treated as a two's complement, its possible values are as shown in Table 1 below. As shown in the table, the maximum value is 7FFFH, and when multiplication is performed using that value, 32767/32768 is internally set in the DSP.
That is, the value is multiplied by 0.999996948. Since this value is approximately 1, 7FFF is used in this embodiment.
H is a through.

[0014]

[Table 1]

In the connection pattern of M2, the tone generator circuit 1
The tone signal output from OUT1 of 06 is subjected to the acoustic effect f1 and the tone signal output from OUT2 thereof is applied to the acoustic effect f2, and the signals to which these acoustic effects are added are added and then output. O for the signal
Tone effect f is added by adding the tone signals output from UT3.
3 is added, the tone signals output from OUT4 are added, and the sound effect f4 is applied and output.

In the wiring pattern of M3, the tone generator circuit 106
Sound effect f1 to the tone signal output from OUT1 of
In addition, the musical sound signal output from the same OUT2 is multiplied by the acoustic effect f2, the signals to which these acoustic effects are added are added, and the signal output from the OUT2 is output.
The musical tone signals output from No. 3 are added and the acoustic effect f3 is applied, and the musical tone signal output from OUT4 is applied with the acoustic effect f4. Finally, these signals are added and output.

In the M4 connection pattern, the tone generator circuit 106
Sound effect f1 to the tone signal output from OUT1 of
, The musical tone signal output from OUT2 is added to it, and the acoustic effect f2 is further multiplied, and the musical tone signal output from OUT3 is multiplied by acoustic effect f3, and the musical tone signal output from OUT4 is further added. Then, the sound effect f4 is applied, and finally the signals to which the sound effects f2 and f4 are added are added and output.

In the connection pattern of M5, the tone generator circuit 106
Sound effect f1 to the tone signal output from OUT1 of
, The sound signal output from OUT2 is multiplied by the sound effect f2, the signals to which these sound effects are added are added, and the sound signal output from OUT3 is applied the sound effect f3. After the acoustic effect f4 is applied to the musical tone signal output from the OUT4, the added value of the acoustic effects f1 and f2 and the added value of the acoustic effects f3 and f4 are further added and output.

FIG. 4 is a signal flow of a main routine, which will be described later, of each DSP. These DSPs obtain two inputs (Sin1, Sin2) and add two effects (f1
And f2, or f3 and f4), two outputs (Sout1
~ Sout2). As shown in this flow, each DSP is generalized so that all of the connection patterns of M1 to M5 in FIG. 3 can be performed only by adjusting coefficient data (shown by Δ in the right-pointing arrow). Used (in M1 to M5, f1 and f2 in DSP1a, D
This is performed by adjusting coefficient data in each of f3 and f4 in SP1b). The connection pattern in each DSP shown in FIG. 3 has two effect functions (f1 and f).
2, f3 and f4) are either connected in series or in parallel.

When the signals are connected in series, the signal input from Sin1 and added with the predetermined effect at f1 is the coefficient C.
By setting 11 to 7FFFH, it is possible to pass through. By setting the coefficients C41 and C51 to 0H and the coefficient C21 to 7FFFH, the current flows to the input side of f2. Here, the signal input from Sin2 by setting the coefficient C22 to 7FFFH is added by the adder, and the acoustic effect is further added at f2. Next, coefficient C31 and coefficient C42 or coefficient C5
If 2 is 7FFFH, Sout1 or Sout2
The signal is output from (however, coefficient C52 or coefficient C42
Is changed to 0H).

On the other hand, when the wires are connected in parallel, the coefficient C22
Is 7FFFH and the coefficient C21 is 0H, the effects of f1 and f2 are applied to the signals separately input from Sin1 and Sin2, and the coefficients C11, C31, C51, C52 (C1
1, C31, C41, C42) is set to 7FFFH and the coefficients C41, C42 (C51, C52) are set to 0H, so that a signal is output from Sout2 (Sout1).

Of course, each sound effect processing can be passed through, but in that case, the coefficient C11 is 0H and C12 is 7FFFH in the processing on the f1 side, and the coefficient C31 is 0H and C32 is 7FFFH in the processing on the f2 side. It becomes possible by At this time, between the coefficients C11 and C12,
By gently increasing and decreasing the coefficient data complementarily between the coefficients C31 and C32, it is possible to crossfade the signal subjected to the acoustic effect process and the signal not subjected to the process ( Similarly, when changing from the through state to the state of outputting a musical tone signal to which a new acoustic effect is added, the above crossfade can be performed).

Further, the coefficients C11, C12, C31, C32
If you want to crossfade with the master CPU1
0 has sent the value directly to the coefficients C11, C12, C31, C32 many times, but as the processing capability of the DSP increases, the coefficient value is cross-faded by the operation of the DSP itself as follows. Is also possible. In that case, the master CPU 10 sends to the DSP, as a coefficient, a value indicating how much the above coefficients should be added (or subtracted) for the crossfade operation. For example, if the master CPU 10 has C'11 = 0001H (+1), C '
When the coefficient data 12 = FFFFH (-1) is transmitted, the DSP causes C11 ← C'11 + C11, C12 ← C '.
The calculation of 12 + C12 is repeatedly calculated until max (7FFFH) or min (000H), and the calculation result is returned to the coefficient RAM 2b. Further coefficient C2
Between C1 and C22, between C41 and C42, C51 and C52
If there is an alternative between the two, it is advisable to execute the crossfade. Note that t1 to t6 in FIG. 4 represent temporary registers in which the DSP temporarily stores the calculation result.

FIG. 5 is a flow chart showing the main flow of each DSP. Polling 110
Is the WS (word select) sent by the tone generator circuit 106.
The rising edge of the signal is detected to detect the start of one cycle of the tone signal.

The Rch input 120 is the Sin in FIG.
The signals from 1 and Sin2 are transferred to registers in1 and in
2 is taken in as in1R + 1, in2R + 1 and R
The ch output 130 is Sout1 and Sout in FIG.
The signal data of ot1R-1 and ot2R-1 are output from the temporary registers ot1 and ot2 on the output side to 2.

The f1 through 140 allows the flow of the sound effect adding routine f1 to pass through normally (performs the effect adding process), or happens to transfer the effect program (for example, the tremolo effect to the distortion effect program by switching the panel). Therefore, it is checked whether or not the sound effect adding routine f1 is to be passed. Since the instruction RAM 2a and the data RAM 2c are pre-processed during the transfer of the effect program due to the change of the acoustic effect,
This is because if the processing of the sound effect addition routine f1 is performed, there is a risk that the processing will run away or generate a large amount of noise. The information indicating whether or not to pass through may be performed by the master CPU 10 by changing the value of an address in the coefficient RAM 2b, or a signal may be directly sent from the master CPU 10 to a general-purpose input port (not shown) of each DSP. You can send it.

In the normal case where f1 through is not performed, callf
1 (141), from here, the sound effect addition routine f1
Call. The sound effect adding routine f1 is stored in the latter half of the instruction RAM 2a as shown in a map of the instruction RAM of the DSP of FIG. 7 described later. As shown in FIG. 4, the signal data flow after the processing of the sound effect adding routine f1 is, as shown in FIG. 4, for the right input, the right signal data t1R stored in the temporary register t1 is multiplied by the data of the coefficient C12. The right signal data t2R stored at t2 is multiplied by the data of the coefficient C11, both values are added and stored as the right signal data t3R of the temporary register t3 (t3R ← t1R ×
C12 + t2R × C11). The same applies to the left input (t3L ← t1L × C12 + t2L × C11). On the other hand, the signal data t3 stored in the temporary register t3
R and t3L are further multiplied by the data of the coefficient C21, and the signal data in2 stored in the register in2.
Multiply R and in2L by the data of the coefficient C22, add both values, and add the two values to the signal data t of the temporary register t4.
Store as 4R and t4L (t4R ← t3R × C2
1 + in2R × C22, t4L ← t3L × C21 + in
2L x C22).

Further, in the case of f1 through, in order to apply the weight by the same number of steps as f1 before passing through the sound effect adding routine f1, delay1 corresponding to delay1
Proceed to 42. Here, for example, a loop instruction built in the DSP is used to perform a loop for a required number of steps (the number of steps of f1 written in the coefficient RAM 2b is loaded and delayed by that number). Since the DSP used here is general purpose in this loop, redundant functions are omitted, and the input and output of the R signal and L signal are at the same port, and the time chart showing the DSP input / output timing of FIG. 6 is shown. As shown, this is due to the fact that it must be performed within a predetermined time (corresponding to the serial data R0, L0 processing time) from the rising (or falling) of the WS signal.

The following f2 through 150 and callf2 (1
51) and the delay 152 corresponding to f2 are the same as those of f1, so the detailed parts are omitted. However, the flow of the signal data after the processing of the sound effect adding routine f2 is the signal data t4R, t4 stored in the temporary register t4.
4L is multiplied by the coefficient C32, the signal data t5R and t5L stored in the temporary register t5 are multiplied by the coefficient C31, both values are added, and the result is added to the temporary register t6.
And store as signal data t6R, t6L (t6R
R ← t4R × C32 + t5R × C31, t6L ← t4L
XC32 + t5LxC31).

The signal data t3R, t6R, t3L, t6L stored in the temporary registers t3 and t6 are further multiplied by predetermined coefficient data and stored in the temporary registers ot1 and ot2 on the output side. Of these, the portion that finally becomes the Sout1 side output is the signal data t3R, t3L stored in the temporary register t3.
Is multiplied by a coefficient C41, the signal data t6R, t6L stored in the temporary register t6 is multiplied by a coefficient C42, both values are added, and the result is stored in the temporary register ot1 on the output side as the signal data ot1R, ot1L. Yes (ot1R ← t3R × C41 + t6R × C42, ot
1L ← t3L × C41 + t6L × C42). See you Sou
The signal to be output on the t2 side is obtained by multiplying the signal data t3R and t3L stored in the temporary register t3 by a coefficient C51, and the signal data t stored in the temporary register t6.
6R, t6L are multiplied by a coefficient C52, and both values are added,
It is stored in the temporary register ot2 on the output side as signal data ot2R and ot2L (ot2R ← t3
R × C51 + t6R × C52, ot2L ← t3L × C5
1 + t6L × C52).

Next, Lch input 160 is performed, and the signals from Sin1 and Sin2 in FIG.
1 and in2 are taken in as in1L + 1 and in2L + 1, and the Lch output 170 is Sout in FIG.
1, to Sout2, output side temporary register ot1
And ot2 output signal data of ot1L-1 and ot2L-1.

Finally, the value of the data RAM pointer (DRP) is incremented by 1 and the process returns to the start. This is because even if the same data RAM address is specified in the program based on the next sampling, the address of +1 is actually automatically accessed. As a result, the last time (in1R / L +
1, the input data stored in in2R / L + 1) will be read out this time (in1R / L, in2R / L), and the output data stored this time (ot1R / L, ot2R / L) will be read next time. It will be read as (ot1R / L-1, ot2R / L-1) at the sampling time.

The DSP program shown in FIG. 5 completes the preprocessing during one sampling time (44.1 KHz), enters the polling state, and waits for the next rise of the WS signal. This series of programs performs pipeline processing as shown in Table 2 below using three successive sampling times. That is, in T-1 time, in1R + 1 ← Sin1, in2R + 1 ← Sin2
Processing and in1L + 1 ← Sin1, in2L + 1 ← S
Perform in2 processing. F1 through at the next T time? , C
allf1, delay equivalent to f1, (t3R ← t1R ×
C12 + t2R × C11, t3L ← t1L × C12 + t
2L × C11), (t4R ← t3R × C21 + in2R
× C22, t4L ← t3L × C21 + in2L × C2
2), f2 through? , Callf2, f2 equivalent dela
y, (t6R ← t4R × C32 + t5R × C31, t6
L ← t4L × C32 + t5L × C31), (ot1R ←
t3R × C41 + t6R × C42, ot1L ← t3L ×
C41 + t6L × C42), (ot2R ← t3R × C5
1 + t6R × C52, ot2L ← t3L × C51 + t6
Each process of L × C52) is performed. Furthermore, at T + 1 hour, So
ut1 ← ot1R-1, Sout2 ← ot2R-1, and Sout1 ← ot1L-1, Sout2 ← ot2
The process of L-1 is performed.

[0034]

[Table 2]

The mapping of the instruction RAM of the DSP shown in FIG. 7 will be described. The first half of the instruction RAM 2a is a program [Rch input / output (in1R + 1 ← Sin1, in2R + 1 ← Sin for controlling input / output of a musical tone signal.
2, Sout1 ← ot1R-1, Sout2 ← ot2R
-1), for Lch input / output (in1L + 1 ← Sin1, i
n2L + 1 ← Sin2, Sout1 ← ot1L-1, S
out2 ← ot2L-1)] including the
Further, in the latter half thereof, selectable sound effect addition routines f1 and f2 (transferred when the master CPU 10 switches the effect function) stored by being accessed by the main routine are stored. Furthermore, the main routine distributes the input signal (L & R input signal) to the selected acoustic effect addition routine f1 or f2 (callf1 to callf2), and the effect addition signal output from these acoustic effect addition routines f1 and f2. Collect (t3R ← t1R × C12 + t2R × C1
1, t3L ← t1L × C12 + t2L × C11, t4R
← t3R × C21 + in2R × C22, t4L ← t3L
× C21 + in2L × C22, t6R ← t4R × C32
+ T5R × C31, t6L ← t4L × C32 + t5L ×
C31, ot1R ← t3R × C41 + t6R × C42,
ot1L ← t3L × C41 + t6L × C42, ot2R
← t3R × C51 + t6R × C52, ot2L ← t3L
XC51 + t6LxC52), and it has a function as an output signal (L & R output signal). In addition, in the main routine, as described above, by branching through f1 and f2 through, at the time of these through, delay corresponding to f1, f
It includes an instruction for performing a 2 equivalent delay process.

The electronic musical instrument of this embodiment is used as follows. First, by turning on the switch of the electronic musical instrument, the master CPU 10 sets the panel initial setting / RAM.
Initial settings of 104 and DSP are performed. Then, necessary information is input from the FD input / output block 103 to the RAM 10
Read to 4. Master CP by the player's panel operation
U10 is from RAM 104 and / or ROM 105
Main routine and sound effect addition routine
And to the instruction RAM 2a of the DSP 1b. At this time, depending on the type of the sound effect selected on the panel, the sound effect adding routine is sent as a corresponding one. At the same time, coefficient data corresponding to the selected acoustic effect type is also transferred to the coefficient RAM 2b in the DSP.
At this time, the connection patterns M1 to M5 in both DSPs and between the DSPs have already been determined by the panel operation.

Next, by the player's operation, the key switch ON / OFF information of the key switch block 101 is sent to the master CPU 10 together with the key velocity, and the MID is transmitted.
From the I / O block 102 or RAM 104 / R
The OM 105 sends performance information to the master CPU 10, and based on the performance information, the master CPU 10 sends the corresponding tone color parameter and key ON / OFF assignment result to the tone generator circuit 106, and the OUT of the tone generator circuit 106.
The pronunciation data is output from 1 to OUT4.

The sound data is sent to the data RAM 2c via the SIOs 1 and 2 of the DSPs, and as a result, the sound effect adding process based on any of the connection patterns M1 to M5 is performed (effect is applied). . The sound effect adding routine fn at this time is mapped in the latter half of the instruction RAM 2a, and is called and executed by the main routine. Also, the connection pattern M1
The way to connect M5 to M5 is determined by the coefficient data as described above. Therefore, the connection pattern can be changed only by changing the coefficient data (however, only changing the coefficient data is equivalent to the type of the sound effect adding routine). It cannot be changed. In that case, it depends on the transfer of the master CPU 10.)
Then, the musical tone signal to which the desired acoustic effect is added is the DAC.
It is output by 107 and is output from the speaker via the amplifier.

When a new effect is selected on the panel, the master CPU 10 determines the RAM 104 / ROM 10
From 5 to the corresponding program and coefficient data, DS
Transfer to P1a and 1b. Further, at that time, the sound effect adding routine fn is made to pass through. As described above, at the time of this through and at the time of changing from the through state to the state of outputting the tone signal to which the new sound effect is added, as described above, Between the coefficients C11 and C12 in the DSP, the coefficients C31 and C
By performing complementary increase / decrease of the coefficient data with 32, it is possible to crossfade the signal subjected to the acoustic effect process and the signal not subjected to the process.

That is, the master CPU 10 changes C11 and C31 of the DSP1a and DSP1b from 7FFFH to 0H.
Crossfade C12 and C32 from 0H to 7FFFH. As a result, no effect is added to both the sound effect adding routines f1 and f2, and the routine goes through. Master CPU 10
Jumps to DSP1a and DSP1b (f1 and f2
Through). This command transmission method may be performed by rewriting one of the coefficient RAMs, as described above, or by sending a signal to the general-purpose input ports of the DSP 1a and DSP 1b. The DSP will not access the f1 and f2 program areas of the instruction RAM 2a while receiving this signal. The master CPU 10 is the DSP 1
Only the program of the effect addition routine necessary for rewriting a and 1b is transferred. During this transfer, DSP1a and DSP1a
In b, the tone signal serially sent from the tone generator circuit 106 is output for each sampling without adding a sound effect. After that, the master CPU 10 commands the DSPs 1a and 1b to cancel (stop) the jump (f1 through f2 through). Upon canceling this jump, the DSP returns to the normal processing flow, and the sound effect adding routines f1 and f
The second program will also be accessed. But still C
Since 11 and C31 are 0H and C12 and C32 are 7FFFH, the tone signal is exactly the same as that in the through mode. Further, the master CPU 10 transfers the coefficient data of the new sound effect adding routine to the DSPs 1a and 1b. This period is required until each DSP puts a calculation corresponding to the new coefficient data on its orbit. Generally, considering the time for rewriting external RAM data, 1 msec to 50 mse
c is required. The time is proportional to the capacity of the external RAM. When the new sound effect adding routine is normally processed based on the new coefficient data, the master CPU 10 sets C11 and C31 of the DSPs 1a and 1b to 0H → 7FFFH and C12 and C32 to 7FFFH → 0.
Crossfade to H. This makes it possible to add new acoustic effects.

In the above example, C11 and C31 and C1
2 and C32 were always cross-faded in a pair, but if only the sound effect adding routine f1 is transferred, the effect can be left added to the f2 side.
There is no need to crossfade 31 and C32. When transferring a program as described above, the master CP
Although the processing of U10 is somewhat complicated, the master CPU 10 only has to send the coefficient data when transferring the coefficient data.

[0042]

According to the apparatus having the configuration of the present invention described in detail above, a plurality of acoustic effects can be obtained by distributing the input signal to the plurality of acoustic effect adding routines by the main routine and changing the connection by simply changing the coefficient data. Since the main routine is once stored in the command storage unit and any sound effect addition routine is selected and stored in the command storage unit, the sound effect addition routine by the main routine is added. With the combination of, it is possible to add / change the desired sound effect, and it is not necessary to perform pre-processing such as clearing the memory of the instruction storage unit. Also, addition / change of the sound effect can be done only by coefficient data in the DSP. It is sufficient to change and output, and there is no need to transfer a new program. Therefore, it is possible to speed up the program switching when adding a plurality of sound effects and reduce the number of discrete parts.

[Brief description of drawings]

FIG. 1 is a block diagram of an electronic musical instrument having a configuration of an embodiment of a sound effect adding device according to the present invention.

FIG. 2 is a block diagram showing an internal configuration of a DSP.

FIG. 3 is a connection diagram of an effect function fn of a DSP part.

FIG. 4 is an explanatory diagram showing a signal flow of a main routine in each DSP.

FIG. 5 is a flowchart showing a main flow of each DSP.

FIG. 6 is a time chart showing DSP input / output timing.

FIG. 7 is an explanatory diagram showing a mapping state of a DSP instruction RAM.

[Explanation of symbols]

 1a, 1b DSP 2a Instruction RAM 2b Coefficient RAM 2c Data RAM 3a C register 3b D register 4 Multiplier 5 P register 6 Adder 7 Y register 8 Gate 9 Selector 10 Master CPU 106 Sound source circuit

Claims (2)

[Claims] 1. A D which operates under the control of a main arithmetic circuit.
In a sound effect adding apparatus capable of simultaneously selecting and processing a plurality of sound effects by an SP, a main routine including a program for controlling input / output of a musical sound signal, and a main operation circuit that transfers the sound signal when necessary and is accessed from the main routine. An instruction storage unit for storing a plurality of selectable sound effect addition routines operated by the above,
The main routine has a function of distributing an input signal to a plurality of selected sound effect adding routines, collecting the effect adding signals output from these sound effect adding routines, and making the output signals. By changing the coefficient data transferred from the main arithmetic circuit and stored in the DSP, it is possible to input a plurality of acoustic effects without changing the main routine when distributing the input signal and collecting the effect-added signal. A sound effect adding device using a DSP, characterized in that connection of an output signal is changed. 2. The sound effect adding apparatus using the DSP according to claim 1, wherein when the connection is changed by changing the coefficient data, an envelope value calculated in the DSP is used as the coefficient data, and the coefficient is calculated. The sound effect adding apparatus using a DSP according to claim 1, wherein the data is gradually changed to a target value and cross-faded.