JPH09232901A - Distortion compensation circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a small sized and efficient distortion compensation circuit by providing a parallel connection circuit composed of a diode used to generate an amplitude distortion biased toward a nonlinearity strengthened region by adding a forward voltage of nearly a built-in voltage and a capacitor to add phase distortion. SOLUTION: In a parallel connection circuit composed of a diode 2 used to generate an amplitude distortion biased toward a nonlinearity strengthened region by adding a forward voltage of nearly a built-in voltage and a capacitor 3 to add phase distortion, the gain of a distortion compensation circuit 1 and an input power characteristics of a passing phase are adjusted by changing properly either a bias voltage of the diode 2 or a capacitance of the capacitor 3 as a parameter. That is, the parameter is adjusted so that the fluctuation of an amplifier is cancelled with fluctuation in the parallel circuit of the diode 2 and the capacitor 3 of the circuit 1. In this case, since the effect of the bias voltage of the diode 2 and the capacitance of the capacitor 3 onto the characteristic differ, the combination of them copes with various amplifiers of various characteristics.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a distortion compensating circuit which is provided before or after an output stage of a high frequency signal used in a transmitter, a semiconductor laser or the like and which compensates for amplitude nonlinearity and phase nonlinearity.

[0002]

2. Description of the Related Art Ideally, the input and output phase characteristics of an amplifier used in a transmitter or a semiconductor laser are desired to have no change in gain and pass phase depending on the power or frequency of the input signal. However, since an actual amplifier has the characteristics that the gain decreases and the phase advances as the input power increases, amplitude distortion and phase distortion occur. In order to improve the non-linearity of such an amplifier, negative feedback is applied. This negative feedback is effective at low frequencies. However, because of the phase rotation in the return path,
It is difficult to apply negative feedback at high frequencies. Therefore, at high frequencies, the non-linearity is improved by providing a distortion compensation circuit having an input / output characteristic that cancels the non-linearity of the amplifier in the front stage (or the rear stage) of the amplifier. Even in the semiconductor laser, the non-linearity is improved by providing a distortion compensation circuit having an input / output characteristic that cancels the non-linearity in the preceding stage of the semiconductor laser.

As a conventional example 1, ELECTRONICS LETTERS Vo
l.28 No.20 1992 pp1875-1876, ■ COMPARISON OF DIRECT
AND EXTERNAL MODULATION FOR CATV LIGHTWAVE TRANSM
ISSION AT 1.5um WAVE LENGTH ■. FIG. 27 shows a schematic diagram of a distortion compensation circuit used in Conventional Example 1. FIG.
In FIG. 7, 100 is a duplexer, 101 is a delay line, and 102
Is a coupler, 103 and 104 are attenuators, 105 is an inductor, 106 and 107 are resistors, 108 and 109 are diodes, 110 and 111 are capacitors, 112 is a distortion compensation circuit, and 113 is distortion for canceling non-linearity. It is a predistorter. Predistorter 113
Are diodes 108, 109, resistors 106, 107,
It is composed of an inductor 105 and capacitors 110 and 111.

Input power having a predetermined magnitude is obtained by the demultiplexer 1
00 to delay line 101 and level adjusting attenuator 10
3 to the predistorter 113. A bias of 0.3 V or less is applied to the diodes 108 and 109, and they are used in a region having strong nonlinearity. The signal distorted by the predistorter 113 is combined with the signal from the delay line by the coupler 102. Then, the level is adjusted by the attenuator 104. In this way, the distortion obtained by the predistorter 113 cancels out the third-order distortion generated in the modulator connected in the subsequent stage, so that a linear characteristic can be obtained.

As a conventional example 2, Japanese Patent Laid-Open No. 4-267574
The device described in the publication is given. FIG. 28 shows a schematic diagram of the circuit described in Japanese Patent Application Laid-Open No. 4-267574. FIG.
In the figure, 114 is a pre-distortion generating circuit, and 115 is an amplifier. A predistortion generating circuit 114 having an inverse input / output characteristic that cancels the nonlinearity of the amplifier 115 is inserted in the signal path (basic signal path) to the amplifier 115. This circuit has a series type circuit configuration. This circuit has the advantages of simple configuration and few adjustment points.

FIG. 29 shows a schematic diagram of the predistortion generating circuit of FIG. In FIG. 29, 116 is a FET and 117 is a resistor. In the predistortion generation circuit 114 shown in FIG. 29, DC
The element that supplies the bias is not drawn, but F
The ET 116 is biased in the squared region with a sufficient drain bias current added to operate with a saturated drain current. This pre-distortion generation circuit can cancel the distortion generated in the amplifier at the subsequent stage and can obtain a linear characteristic.

As a conventional example 3, Japanese Patent Application Laid-Open No. 3-179807
The device described in the publication is given. FIG. 30 shows a schematic diagram of a circuit described in Japanese Patent Application Laid-Open No. 3-179807. 118
Is a filter. In this circuit, a signal to the amplifier 115 is divided into two paths by a distributor 100, a predistorter 113 is provided on one line and a delay line 101 is provided on the other line, and these are combined by a coupler 102. This circuit has a parallel type circuit configuration. With this circuit, the distortion generated in the amplifier 115 connected in the subsequent stage can be canceled and a linear output can be obtained.

As the conventional example 4, the apparatus described in Japanese Patent Laid-Open No. 6-260847 is cited. FIG. 31 shows Japanese Patent Laid-Open No. 6-2608.
The circuit described in Japanese Patent No. 47 is shown. In FIG. 31, 11
Reference numerals 9 and 120 are diodes, 121 and 122 are inductors, 123 and 124 are capacitors, and 125 and 126 are attenuators. This circuit divides two signals whose phases are mutually inverted by a distributor 100 into two paths and generates distortion in one path (a diode which is a non-linear element given a predetermined bias). 119 and an attenuator 125) are provided with means (a diode 120 and an attenuator 126, which are nonlinear elements to which a predetermined bias is applied) for generating distortion in the other path, and the distortion generated by these is combined by the coupler 102. To do. Distortion is generated by this circuit, the distortion generated by the nonlinear element connected in the subsequent stage can be canceled, and linear characteristics can be obtained. This circuit has an advantage that the configuration is simple as compared with the conventional examples 2 and 3.

[0009]

The conventional distortion compensating circuits described above have the following problems, respectively. The distortion compensating circuit of the first conventional example requires a delay line and the like, which increases the circuit scale and is difficult to form on the same semiconductor substrate. Therefore, it is not suitable for IC.
Also, the phase compensation must be strictly performed in the delay line 101, but it is difficult to adjust because the time delay occurs in the distortion generation path 113. Further, the distortion compensating circuit of the first conventional example requires two circuit blocks having the same configuration, which makes the structure complicated. Further, since the circuit of Conventional Example 1 does not consider the phase distortion due to AM-PM conversion, a large amount of distortion compensation cannot be expected.

The phase distortion due to AM-PM conversion is as follows. An amplifier will be described as an example. It is desirable that the amplifier does not change the passing phase even when the input power increases and has a constant value. However, since many amplifiers have a characteristic that the phase advances as the input power increases, amplifying a signal whose amplitude changes causes the phase of the signal to change, resulting in a state where phase modulation is applied. The distortion generated at this time is called phase distortion due to AM-PM conversion.

Since the distortion compensating circuit of the second conventional example uses an active circuit, there is a fear of oscillation. Furthermore, since the phase distortion due to AM-PM conversion is not taken into consideration, a large amount of distortion compensation cannot be expected.

The distortion compensating circuit of the conventional example 3 requires a delay line and the like, and the scale of the circuit becomes large, and it is difficult to make it monolithic. Also, the phase compensation must be strictly performed with the delay line, but it is difficult to adjust because the time delay occurs in the distortion generation path. Furthermore, since the phase distortion due to AM-PM conversion is not taken into consideration, a large amount of distortion compensation cannot be expected.

The distortion compensating circuit of the prior art 4 is not suitable for miniaturization because it requires a phase inversion branch circuit such as a transformer or a hybrid, and requires two circuit blocks having the same configuration. Moreover, since the phase distortion due to AM-PM conversion is not taken into consideration, a large amount of distortion compensation cannot be expected.

The present invention has been made in order to solve the above problems, and a distortion compensating circuit that is simple and has a simple structure without a delay line, is suitable for an IC, and is small in size and highly efficient is obtained. The purpose is to

[0015]

A distortion compensating circuit according to a first aspect of the present invention comprises a diode biased in a non-linear operation region to generate amplitude distortion, and a capacitor connected in parallel to the diode to generate phase distortion. It has the characteristics that the gain increases as the input power increases and the phase lags.

In the distortion compensating circuit according to a second aspect of the present invention, the capacitor is replaced with the junction capacitance of the diode.

In the distortion compensating circuit according to a third aspect of the invention, the capacitor is replaced with an impedance circuit including at least one of a resistor, an inductor and a capacitor.

A distortion compensating circuit according to a fourth aspect of the present invention includes an impedance circuit which is connected in series with a parallel circuit of the diode and the capacitor and includes at least one of a resistor, an inductor and a capacitor. It is a thing.

The distortion compensating circuit according to a fifth aspect of the invention controls the bias voltage applied to the diode based on the temperature of the junction of the diode.

According to a sixth aspect of the distortion compensating circuit, an isolator is provided on at least one of the input side and the output side of the distortion compensating circuit.

A distortion compensating circuit according to a seventh aspect of the present invention comprises a plurality of the distortion compensating circuits, and these distortion compensating circuits are arranged in series.

A distortion compensating circuit according to an eighth aspect comprises a plurality of the distortion compensating circuits, and these distortion compensating circuits are arranged in parallel.

[0023]

BEST MODE FOR CARRYING OUT THE INVENTION

Embodiment 1 FIG. 1 shows the configuration (equivalent circuit) of a distortion compensation circuit according to Embodiment 1 of the present invention. In the figure, 2 is a diode and 3 is a capacitor, and the diode 2 and the capacitor 3 are connected in parallel with each other. Reference numeral 4 is an input matching circuit, and 5 is an output matching circuit. The input matching circuit 4 and the output matching circuit 5 are known ones composed of lumped constants or distributed constants (for example, 4 of "Electronics Pocketbook" 3rd edition (Ohm)).
-27, 28).

The input matching circuit 4, the parallel circuit of the diode 2 and the capacitor 3, and the output matching circuit 5 are connected in series in this order. The anode of the diode 2 is connected to the input matching circuit 4, and the cathode of the diode 2 is connected to the output matching circuit 5. Distortion compensation circuit 1
Is composed of these diode 2, capacitor 3, input matching circuit 4 and output matching circuit 5.

A forward voltage of about the built-in voltage is applied to the diode 2. The built-in voltage is as follows. In the IV characteristic of the diode, when a forward voltage is applied to the diode, almost no current flows at about V = 0 [V], but when the forward voltage is gradually increased, a certain voltage is set as a boundary. The current suddenly starts to flow. The voltage at which current suddenly flows out is defined as the built-in voltage. The built-in voltage is also called a threshold voltage or a threshold voltage.

In the distortion compensating circuit 1 of the first embodiment, when an amplifier is connected to the input side of FIG. 1 and a signal is input to the input matching circuit 4, the distortion is canceled from the output matching circuit 5. The signal is output. On the other hand, when an amplifier is connected to the output side of FIG. 1, a signal added with a component that cancels distortion is output.

Next, the operation will be described. FIG. 2 is a simulation result of the gain and pass phase characteristics with respect to the input power of the parallel circuit of the diode 2 and the capacitor 3 of the distortion compensation circuit 1. This simulation result extracts the large signal model parameter of the silicon Schottky diode and uses the harmonic balance method to obtain the frequency 1.
It is the result of having analyzed at 9 GHz. The value of the capacitor 3 was 1 pF, the input / output impedance was 50Ω, and the forward voltage Vd applied to the diode 2 was 0.35 [V]. From Fig. 2, it can be seen that the gain increases and the phase lags as the input power increases.

FIG. 3 is a characteristic diagram similar to FIG. FIG.
Is a simulation result of the gain and pass phase characteristics with respect to the input power with the forward voltage applied to the diode 2 as a parameter. FIG. 3 shows that when the forward voltage applied to the diode is increased, the increase amount of the gain based on the gain at the time of the minute signal is decreased, and when it is decreased, the increase amount of the gain is increased. It can be seen that this is particularly remarkable for low input power of 0 dB or less. FIG. 3 also shows that increasing the forward voltage applied to the diode reduces the phase delay and decreasing it increases the phase delay. It can be seen that this is particularly remarkable for the input power of 0 dB or more. From the above, by changing the forward voltage applied to the diode 2, the distortion compensation circuit 1 of FIG.
It can be seen that the gain and pass phase versus input power characteristics of can be adjusted.

FIG. 4 is a characteristic diagram similar to FIG. FIG.
3 is a simulation result of gain and pass phase characteristics with respect to input power, with the capacitance value of the capacitor 3 connected in parallel with the diode 2 as a parameter. FIG.
Increasing the capacitance of the capacitor 3 decreases the gain increase,
It is shown that the decrease amount increases the gain increase amount. It can be seen that this is particularly remarkable for low input power of 0 dB or less. Further, FIG. 4 shows that the phase characteristics do not change much even if the capacitance of the capacitor 3 is increased or decreased. From the above, it can be seen that by changing the capacitance value of the capacitor 3, the gain vs. input power characteristic of the distortion compensating circuit 1 in FIG. 1 can be adjusted without changing the phase characteristic.

To summarize the above, by appropriately changing both or either of the forward voltage applied to the diode and the capacitance value of the capacitor 3 connected in parallel with the diode 2 as a parameter, The gain and the pass phase of the distortion compensation circuit 1 with respect to the input power characteristics can be adjusted. Conversely, when adjusting the input power characteristics of the gain and the passing phase, these parameters of the parallel circuit of the diode 2 and the capacitor 3 may be adjusted.

Based on the above, in order to make the input power characteristics of the gain and the passing phase ideal, FIG.
How to set the parameters of the distortion compensation circuit 1 will be described.

An amplifier will be described as an example. The ideal input / output phase characteristic of an amplifier is a characteristic in which the gain is constant up to the saturation power even if the input power increases, regardless of the frequency, and the pass phase does not change. However, many amplifiers have characteristics that the gain decreases and the phase advances as the input power increases. Therefore, amplitude distortion and phase distortion occur. Therefore, in order to suppress the occurrence of these distortions, the distortion-compensated amplifier and the distortion compensation circuit 1 of FIG. 1 having the opposite input / output phase characteristic are used in combination. As a result, changes in gain and phase can be reduced to near saturation power, and characteristics close to linear can be obtained.

The input power characteristics of the gain and pass phase of the amplifier to be compensated are obtained by measurement or simulation. Then, with reference to the characteristic diagrams of FIGS. 2 to 4, the fluctuation of the gain and the passing phase of the amplifier is suppressed, that is, the fluctuation of the amplifier and the parallel circuit of the diode 2 and the capacitor 3 of the distortion compensation circuit 1 are suppressed. The aforementioned parameters are adjusted so that the fluctuations cancel each other out. This can easily be done with the graphs of FIGS.
At this time, the bias voltage of the diode 2 and the capacitor 3
Since the influence of the capacitance on the characteristics is different, the combination of these can be applied to amplifiers with various characteristics.

The amplifier has been described above as an example, but the same applies to other devices to which this device is applied.

As described above, although the distortion can be compensated by the parallel circuit of the diode 2 and the capacitor 3, there are cases where the distortion cannot be completely compensated. In such a case, the input matching circuit 4 and the output matching circuit 5 compensate.

5 and 6 show examples of simulation results of the gain and pass phase characteristics of the matching circuit 1 when the impedance on the input side of the diode 2 is changed by the input matching circuit 4. The value of the capacitor 3 is 1
pF, forward voltage Vd = 0.35V, and output impedance 50Ω.

FIG. 5 shows an input power of -40 dBm to 0 dB.
It is a plot of the increase amount of the gain when increasing up to m on the Smith chart. The line in FIG. 5 shows the contour line of the gain increase amount. Moreover, in FIG. 6, the input power is -4.
The delay amount of the passing phase amount when changing from 0 dBm to 0 dBm is plotted on the Smith chart. The line in FIG. 6 shows the contour line of the phase delay amount.

In FIG. 5, the top of the contour line is at the lower left. Since the central impedance of FIG. 5 is 50Ω,
When increasing the gain increase amount, the impedance may be changed toward the lower left, and when decreasing the gain, the impedance may be changed toward the upper right.

Further, in FIG. 6, the top of the contour line is at the center, that is, at the position of impedance 50Ω. Therefore, in this case, although the phase can be advanced, it cannot be delayed.

As described above, it is understood from FIGS. 5 and 6 that the gain and pass phase of the distortion compensation circuit 1 of FIG. 1 can be adjusted by changing the input impedance.

FIG. 6 shows an example of simulation results of the gain and pass phase characteristics of the matching circuit 1 when the output matching circuit 5 changes the impedance on the output side of the diode 2. The value of the capacitor 3 is 1 pF,
Forward voltage Vd = 0.35V, input impedance 50
Ω.

FIG. 7 shows the input power from -40 dBm to 0 dB.
It is a plot of the gain when increasing to m on a Smith chart. Further, in FIG. 8, the input power is -40d.
It is a plot of the passing phase amount on the Smith chart when changing from Bm to 0 dBm.

Also in this case, similarly, by changing the output impedance from FIG. 7 and FIG.
It can be seen that the gain and pass phase of the distortion compensation circuit 1 can be adjusted.

Based on the above, how to set the parameters of the distortion compensating circuit 1 in FIG. 1 in order to make the gain and pass phase versus frequency characteristics ideal will be described.

An amplifier will be described as an example. The ideal input / output phase characteristic of the amplifier is a linear characteristic in which the gain is constant up to the saturation power even when the input power increases, and the pass phase does not change regardless of the frequency. However, since many amplifiers have frequency characteristics, the input / output phase characteristics are different near the center frequency and at the edge of the band, and distortion characteristics are different. Therefore, in order to suppress the generation of these distortions, an amplifier that compensates for distortion and the distortion compensation circuit 1 of FIG. 1 having an inverse frequency characteristic are used in combination to obtain a characteristic that is almost linear.

The gain and pass phase versus frequency characteristics of the amplifier to be compensated are obtained by measurement or simulation. Then, with reference to the characteristic diagrams of FIGS. 5 to 8, the variation of the gain and the passing phase of the amplifier is suppressed, that is, the variation of the amplifier and the variation of the input matching circuit 4 and the output matching circuit 5 are mutually different. The characteristic impedance is adjusted so as to cancel each other out. This can be easily done with the graphs of FIGS.

The amplifier has been described above as an example, but the same applies to other devices to which this device is applied.

An example of the actual distortion compensation result by the distortion compensation circuit 1 of FIG. 1 will be shown. FIG. 9 is a diagram showing a measurement system. In the figure, circulators 31a and 31b are attached to the input side and the output side of the distortion compensation circuit 1, respectively.
This is to improve the reflection characteristics. The circulators 31a and 31b have non-reflective ends 32a and 32, respectively.
b is attached. The attenuator 33 appropriately attenuates the output of the distortion compensation circuit 1 received via the circulator 31b. The power amplifier 34 includes an attenuator 33.
The output of is amplified appropriately.

FIG. 1 is a characteristic diagram measured by the measurement system of FIG.
0 is shown. As can be seen from the figure, the output power is 13 dBm.
It can be seen that the maximum adjacent channel leakage power is improved by 5 dB.

As described above, the distortion compensating circuit according to the first embodiment performs distortion compensation on the input power characteristic by the parallel circuit of the diode and the capacitor, so that the gain and phase versus input power characteristics are improved. . An ideal linear amplification characteristic can be obtained by using this distortion compensation circuit.

Embodiment 2 The distortion compensation circuit according to the second embodiment will be described. FIG. 11 in which parts corresponding to those in FIG. 1 are assigned the same reference numerals is an equivalent circuit showing the configuration of this distortion compensation circuit 1b. The circuit of FIG. 11 is the same as the circuit of FIG.
Is removed. The diode 2 has a parasitic capacitance. Generally, this parasitic capacitance is not preferable for the operation of the diode, but in the second embodiment, this parasitic capacitance is positively used as an element for performing phase compensation with respect to power characteristics. The second embodiment is characterized in that distortion compensation is performed based on the characteristics including the parasitic capacitance of the diode.

The basic operation is similar to that of the first embodiment. The diode 2 performs distortion compensation on the input power characteristic. The specific parameter settings necessary for that are also the same, so only the differences will be described.

FIG. 12 is a simulation result of the gain and pass phase characteristics with respect to the input power. In the simulation, a large signal model parameter of the silicon Schottky diode was extracted, and analysis was performed at a frequency of 1.9 GHz using the harmonic balance method. The input / output impedance was set to 50Ω, and the forward voltage Vd applied to the diode 2 was set to 0.35 [V]. It can be seen from FIG. 12 that the gain is increased and the phase is delayed as the input power is increased. The alternate long and short dash line in FIG. 12 is the graph in FIG. 2 as a comparison target.

FIG. 13 shows the simulation results of the gain and pass phase characteristics with respect to the input power when the forward voltage applied to the diode 2 is used as a parameter. From FIG. 13, by changing the forward voltage applied to the diode, as shown in FIG.
It can be seen that the gain and pass phase of the distortion compensation circuit 1b can be adjusted.

14 and 1 show examples of simulation results of gain and pass phase characteristics when the input impedance of the diode 2 is changed by the input matching circuit 4.
It is shown in FIG. FIG. 14 shows an input power of -40 dBm to 0 dBm.
This is a plot on the Smith chart of the gain increased up to. Further, FIG. 15 is a plot of the amount of passing phase when the input power changes from −40 dBm to 0 dBm on a Smith chart. 14 and 15, it can be seen that the gain and pass phase of the distortion compensation circuit 1b of FIG. 11 can be adjusted by changing the input impedance.

16 and 1 show examples of simulation results of gain and pass phase characteristics when the output side impedance of the diode 2 is changed by the output matching circuit 5.
FIG. The forward voltage Vd was 0.35 V and the input impedance was 50Ω. FIG. 16 is a plot of the gain increased from the input power of −40 dBm to 0 dBm on the Smith chart. In addition, FIG. 17 shows input power -40
It is a plot of the amount of passing phase varying from dBm to 0 dBm on a Smith chart. From FIGS. 16 and 17, it can be seen that the gain and pass phase of the distortion compensation circuit 1b of FIG. 11 can be adjusted by changing the output impedance.

Third Embodiment A distortion compensation circuit according to the third embodiment will be described. FIG. 18 in which parts corresponding to those in FIG. 1 are assigned the same reference numerals is an equivalent circuit showing the configuration of this distortion compensation circuit 1c. In the figure, 10 and 11 are resistors. Reference numeral 12 is an impedance circuit connected in parallel with the diode 2. Impedance circuit 12
Is composed of a capacitor 3 and resistors 11 and 12. The impedance circuit 12 is connected in parallel with the diode 2.

Next, the operation will be described. This distortion compensating circuit 1c is different from the distortion compensating circuit of the first embodiment in that a resistor 10 is connected in parallel with a capacitor 3 and an impedance circuit 12 in which a resistor 11 is connected in series is connected to a diode 2.
The difference is that they are connected in parallel. Therefore, like the distortion compensating circuit 1, distortion can be applied to an external signal,
As the input power increases, the gain increases and the phase is delayed.

FIG. 19 shows the simulation results of the gain and the pass phase characteristic with respect to the input power when the size of the resistor 11 is used as a parameter. The input / output impedance is 50Ω, and the forward voltage Vd = 0.
35 [V], the size of the resistor 10 was 100Ω, and the capacitance value of the capacitor 3 was 1 pF. It can be seen from FIG. 19 that the gain and pass phase of the distortion compensation circuit 9 of FIG. 18 can be adjusted by changing the size of the resistor 11.

FIG. 20 shows simulation results of gain and pass phase characteristics with respect to input power when frequency is used as a parameter. The input / output impedance was 50Ω, the forward voltage Vd applied to the diode 2 was 0.35 [V], the sizes of the resistors 10 and 11 were 100Ω, and the capacitance of the capacitor 3 was 1 pF. It can be seen that the distortion caused by the impedance circuit 12 having the frequency characteristic changes depending on the frequency characteristic of the impedance circuit 12, and the characteristic depending on the frequency can be given.

Fourth Embodiment A distortion compensation circuit according to the fourth embodiment will be described. FIG. 21 in which parts corresponding to those in FIG. 1 are assigned the same reference numerals is an equivalent circuit showing the configuration of this distortion compensation circuit 1d. In the figure, 14 is a resistor,
Reference numeral 15 is an inductor. The impedance circuit 16 composed of the resistor 14 and the inductor 15 is connected to the diode 2
And are connected in parallel.

Next, the operation will be described. This distortion compensation circuit 1d is different from the distortion compensation circuit of the second embodiment in that the resistance 1
The difference is that an impedance circuit 16 constituted by 4 and an inductor 15 is connected in parallel to the diode 2. Even in this case, distortion can be applied to an external signal as in the case of the distortion compensating circuit 6, and the characteristics that the gain is increased and the phase is delayed with respect to the increase of the input power are obtained. Further, by changing the magnitude of the impedance of the impedance circuit 16, it is possible to adjust the characteristic that the gain is increased and the phase is delayed with respect to the increase of the input power.

Fifth Embodiment A distortion compensation circuit according to the fifth embodiment will be described. FIG. 22 in which parts corresponding to those in FIG. 1 are assigned the same reference numerals is a block diagram showing the configuration of this distortion compensation circuit 1e. In the figure, 18 and 19 are impedance circuits composed of at least one of a capacitor, an inductor and a resistor. Impedance circuits 18 and 19 are connected in series with the diode 2.

Next, the operation will be described. This distortion compensating circuit 1e is different from the distortion compensating circuit 1 of the first embodiment in that impedance circuits 18 and 19 each including at least one of a capacitor, an inductor and a resistor are connected to a diode 2 in series. Is different. Even in this case, the distortion can be applied to the signal from the outside similarly to the distortion compensating circuit 1, and the characteristics that the gain is increased and the phase is delayed with respect to the increase of the input power can be obtained. Also, by changing the magnitude of the impedance of the impedance circuits 18 and 19, it is possible to adjust the characteristic that the gain increases and the phase delays with respect to the increase of the input power.

Sixth Embodiment A distortion compensation circuit according to the sixth embodiment will be described. FIG.
FIG. 3 is a configuration diagram showing the configuration of the distortion compensation circuit 20. At least two distortion compensation circuits 1 are connected in series.

Next, the operation will be described. Since at least two distortion compensating circuits 1 of Embodiments 1 to 5 are connected in series, distortion can be applied to a signal from the outside similarly to the distortion compensating circuit 1, and a gain can be obtained with an increase in input power. Is obtained and the phase is delayed. Further, it is possible to cope with a larger distortion as compared with the distortion compensation circuit of the first embodiment or the like.

Seventh Embodiment A distortion compensation circuit according to the sixth embodiment will be described. FIG.
FIG. 3 is a configuration diagram showing the configuration of the distortion compensation circuit 21. At least two distortion compensation circuits 1 are connected in parallel.

Next, the operation will be described. Since at least two distortion compensating circuits 1 of Embodiments 1 to 5 are connected in parallel, it is possible to distort an external signal as in the distortion compensating circuit 1 and the like, and to increase the input power. The gain is increased and the phase is delayed. In addition, compared to the distortion compensating circuit of the first embodiment, it is possible to give distortion at a larger power.

Eighth Embodiment A distortion compensation circuit according to the sixth embodiment will be described. FIG.
FIG. 3 is a configuration diagram showing the configuration of the distortion compensation circuit 22.
In the figure, 23 and 24 are inductors having a sufficiently large impedance at a frequency where distortion is generated, and 25 is a known voltage source. A predetermined bias is applied by the voltage source 25, and the diode 2 connected in parallel with the capacitor 3
Are connected in series to the signal path.

Next, the operation will be described. The magnitude of the voltage applied to the distortion compensation circuit 1 of the first to fifth embodiments is controlled by the temperature of the diode 2. As a result, distortion can be applied to an external signal as in the distortion compensating circuit 1 over a wide temperature range, and gain is increased and phase is delayed with respect to an increase in input power.

Ninth Embodiment A distortion compensation circuit according to the sixth embodiment will be described. FIG.
FIG. 4 is a configuration diagram showing the configuration of the distortion compensation circuit 28. In the figure, 26 and 27 are isolators. The distortion compensation circuit 1 and the isolators 26 and 27 are connected in series.

Next, the operation will be described. The distortion compensating circuit 28 differs from the distortion compensating circuit 1 of the first embodiment and the like in that an isolator is connected in series. Therefore, similarly to the distortion compensating circuit 1, distortion can be applied to the signal from the outside, and the gain is increased and the phase is delayed with respect to the increase of the input power.

[0073]

As described above, according to the present invention, a diode for generating an amplitude distortion biased in a strong non-linear region by applying a forward voltage of about the built-in voltage,
By providing a circuit in which a capacitor for adding phase distortion is connected in parallel, gain increases with increasing input power and phase delay is obtained, realizing a compact and highly efficient distortion compensation circuit. it can.

Further, according to the next invention, since the capacitor is replaced by the parasitic capacitance of the diode, there is an effect that the capacitor is unnecessary and the structure is further simplified.

Further, according to the next invention, since the capacitor is replaced by the impedance circuit, it is possible to perform fine compensation by adjusting the parameter of this circuit, and it is possible to bring it closer to the ideal characteristic.

Further, according to the next invention, since the impedance circuit is provided, it is possible to perform fine compensation by adjusting the parameter of this circuit, and it is possible to bring it closer to the ideal characteristic.

Further, according to the next invention, by controlling the bias voltage applied to the diode according to the temperature of the junction portion of the diode, the gain is increased and the phase is increased in a wide temperature range for a predetermined amount of input power increase. Delay characteristics can be obtained.

According to the next invention, the input / output reflection characteristic can be improved by providing an isolator on at least one of the input side and the output side of the distortion compensation circuit. Also, the input / output impedance of this distortion compensation circuit can be set arbitrarily without depending on the external impedance,
There is flexibility in adjusting the input / output phase characteristics.

Further, according to the following invention, since at least two stages of the distortion compensating circuits are connected in series, a larger distortion can be compensated.

Further, according to the next invention, since at least two stages of the distortion compensating circuits are connected in parallel, the distortion can be compensated with a larger power.

[Brief description of drawings]

FIG. 1 is an equivalent circuit diagram of a distortion compensation circuit according to a first embodiment.

FIG. 2 is a characteristic curve diagram showing a simulation result of gain and pass phase characteristics with respect to input power of the distortion compensation circuit of the first embodiment.

FIG. 3 is a characteristic curve diagram showing simulation results of gain and pass phase characteristics with respect to input power when a forward voltage applied to the diode 2 of the distortion compensation circuit of the first embodiment is used as a parameter.

FIG. 4 is a characteristic curve diagram showing simulation results of gain and pass phase characteristics with respect to input power when the capacitance of the capacitor 3 of the distortion compensation circuit of the first embodiment is used as a parameter.

FIG. 5 is a Smith chart showing a simulation result of an increase amount of gain with the impedance on the input side of the distortion compensation circuit according to the first embodiment as a parameter.

FIG. 6 is a Smith chart showing a simulation result of a passing phase amount using the input impedance of the distortion compensation circuit of the first embodiment as a parameter.

FIG. 7 is a Smith chart showing the simulation result of the gain increase amount with the impedance on the output side of the distortion compensation circuit according to the first embodiment as a parameter.

FIG. 8 is a Smith chart showing a simulation result of a passing phase amount using the output impedance of the distortion compensation circuit of the first embodiment as a parameter.

FIG. 9 is a measurement system diagram for measuring characteristics of the distortion compensation circuit according to the first embodiment.

FIG. 10 is a characteristic diagram of the distortion compensation circuit according to the first embodiment.

FIG. 11 is an equivalent circuit diagram of the distortion compensation circuit according to the second embodiment.

FIG. 12 is a characteristic curve diagram showing simulation results of gain and pass phase characteristics with respect to input power of the distortion compensation circuit of the second embodiment.

FIG. 13 is a diode 2 of the distortion compensation circuit according to the second embodiment.
FIG. 6 is a characteristic curve diagram showing simulation results of gain and pass phase characteristics with respect to input power when a forward voltage applied to is used as a parameter.

FIG. 14 is a Smith chart showing a simulation result of a gain increase amount using the input impedance of the distortion compensation circuit of the second embodiment as a parameter.

FIG. 15 is a Smith chart showing a simulation result of a passing phase amount using the input impedance of the distortion compensation circuit of the second embodiment as a parameter.

FIG. 16 is a Smith chart showing the simulation result of the gain increase amount with the impedance on the output side of the distortion compensation circuit according to the second embodiment as a parameter.

FIG. 17 is a Smith chart showing a simulation result of a passing phase amount using the output impedance of the distortion compensation circuit of the second embodiment as a parameter.

FIG. 18 is an equivalent circuit diagram of the distortion compensation circuit according to the third embodiment.

FIG. 19 is a characteristic curve diagram showing simulation results of gain and pass phase characteristics with respect to input power when the size of the resistor 11 of the distortion compensation circuit of the third embodiment is used as a parameter.

FIG. 20 is a characteristic curve diagram showing simulation results of gain and pass phase characteristics with respect to input power when the frequency of the distortion compensation circuit of the third embodiment is used as a parameter.

FIG. 21 is an equivalent circuit diagram of the distortion compensation circuit according to the fourth embodiment.

FIG. 22 is an equivalent circuit diagram of the distortion compensation circuit according to the fifth embodiment.

FIG. 23 is an equivalent circuit diagram of the distortion compensation circuit according to the sixth embodiment.

FIG. 24 is an equivalent circuit diagram of the distortion compensation circuit according to the seventh embodiment.

FIG. 25 is an equivalent circuit diagram of the distortion compensation circuit according to the eighth embodiment.

FIG. 26 is an equivalent circuit diagram of the distortion compensation circuit according to the ninth embodiment.

FIG. 27 is an equivalent circuit diagram of a distortion compensation circuit of Conventional Example 1.

28 is a schematic diagram of a circuit of Conventional Example 2. FIG.

FIG. 29 is a schematic diagram of a predistortion generation circuit of Conventional Example 2.

FIG. 30 is a schematic diagram of a circuit of Conventional Example 3.

FIG. 31 is a schematic diagram showing an equivalent circuit of a circuit of Conventional Example 4.

[Explanation of symbols]

Distortion compensation circuit 1, diode 2, capacitor 3, input matching circuit 4, output matching circuit 5, resistor 10, 1
1, 14, impedance circuit 12, 16, 18, 1
9, inductors 15, 23, 24, voltage source 25, isolators 26, 27.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yasuo Mitsui 2-3-3 Marunouchi, Chiyoda-ku, Tokyo Sanryo Electric Co., Ltd.

Claims (8)

[Claims] 1. A diode, which is biased in a non-linear operation region to generate amplitude distortion, and a capacitor, which is connected in parallel to the diode and generates phase distortion, increase the gain as the input power increases. Distortion compensation circuit with the characteristic that the phase is delayed. 2. The distortion compensation circuit according to claim 1, wherein the capacitor is replaced with a junction capacitance of the diode. 3. A capacitor, a resistor, an inductor,
Alternatively, the distortion compensating circuit according to claim 1, wherein the distortion compensating circuit is replaced with an impedance circuit including at least one of the capacitors. 4. An impedance circuit connected in series with a parallel circuit of the diode and the capacitor, the impedance circuit including at least one of a resistor, an inductor, and a capacitor. Distortion compensation circuit described. 5. The distortion compensation circuit according to claim 1, wherein the bias voltage applied to the diode is controlled based on the temperature of the junction of the diode. 6. A distortion compensating circuit, wherein an isolator is provided on at least one of an input side and an output side of the distortion compensating circuit according to any one of claims 1 to 5. 7. A distortion compensating circuit comprising a plurality of distortion compensating circuits according to claim 1, wherein these distortion compensating circuits are configured in series. 8. A distortion compensating circuit comprising a plurality of distortion compensating circuits according to claim 1, wherein these distortion compensating circuits are arranged in parallel.