JPH09232626A - Manufacture of light emitting diode array - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable a light emitting diode array with separate electrodes and a common electrode formed on the surface of a substrate to be uniform in drive voltage. SOLUTION: An N-GaAs buffer layer 2, an N<+> -GaAs ohmic contact layer 3, an N-AlGaAs etching buffer layer 4a and an N-GaAs etching buffer layer 4b, an N-AlGaAs layer 5, a P-AlGaAs layer 6, and a P<+> -GaAs ohmic contact layer 7 are successively deposited in this sequence on a semiconductor substrate 1, and the above laminate is formed into unit light emitting devices of island-like structure by etching. The etching buffer layer 4 composed of an N-AlGaAs etching buffer layer 4a and an N-GaAs etching buffer layer 4b laminated on the buffer layer 4a is interposed, so that the buffer layer 4b can be selectively etched first, and then the thin buffer layer 4a uniform in thickness is etched through a time control method in a process where the ohmic contact layer 3 is exposed for the formation of a common electrode 8. Therefore, all devices are made uniform in the thickness of the ohmic contact layer of a common electrode by adoption of the etching buffer layer 4, so that the devices are set uniform in drive voltage.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a light emitting diode array, and more particularly to a method for manufacturing a light emitting diode array used as an exposure source of a photosensitive drum for a page printer.

[0002]

2. Description of the Related Art A conventional light emitting diode array is shown in FIGS. FIG. 4 is a sectional view taken along line AA of FIG.
3 and 4, 21 is a semiconductor substrate, 22 is an island-shaped semiconductor layer, 23 is an individual electrode, and 24 is a common electrode.

The semiconductor substrate 21 is made of, for example, silicon (S
i) or a single crystal semiconductor substrate such as gallium arsenide (GaAs). The island-shaped semiconductor layer 22 is made of a compound semiconductor layer of gallium arsenide, aluminum gallium arsenide, or the like, and includes a layer 22a containing impurities of one conductivity type and a layer 22b containing impurities of opposite conductivity type. Layer 22a containing one conductivity type impurity and layer 22b containing opposite conductivity type impurity
A semiconductor junction is formed at the interface portion of. The island-shaped semiconductor layer 22 is formed by, for example, mesa etching after forming a single crystal semiconductor layer made of gallium arsenide, aluminum gallium arsenide, or the like by MOCVD (metal organic chemical vapor deposition) or MBE (electron beam epitaxy). It is formed like an island.

[0004] On the surface portion of the island-shaped semiconductor layer 22, for example a protective film 25 made of a silicon nitride film (Si _x N _y)
Are formed, and individual electrodes 23 made of, for example, gold (Au) are formed on the surface of the protective film 25. This individual electrode 23 is connected to a semiconductor layer 22b containing an impurity of the opposite conductivity type via a through hole formed in the protective film 25. This individual electrode 23 is formed of a layer 22 b containing an impurity of the opposite conductivity type in the island-shaped semiconductor layer 22.
Is formed so as to extend alternately to the other end face side for each adjacent island-shaped semiconductor layer 22 from the upper surface part to the vicinity of the end face of the semiconductor substrate 21 via the wall face part. A common electrode 24 is formed on almost the entire back surface of the semiconductor substrate 21.

The island-shaped semiconductor layer 22, the individual electrodes 23, and the common electrode 24 constitute individual light emitting diodes, and the light emitting diodes are formed on the semiconductor substrate 21 so as to be arranged in a line. In this case, for example, the individual electrode 23 becomes the anode electrode of the light emitting diode, and the common electrode 24 becomes the cathode electrode. The individual electrode 23 is connected to an external circuit at its wide portion by a bonding wire or the like.

In such a light emitting diode array, for example, when a current is passed in the forward direction from the individual electrode 23 to the common electrode 24, electrons are injected into the layer 22b containing impurities of opposite conductivity type, and impurities of one conductivity type are introduced. Holes are injected into the layer 22a containing. Some of these minority carriers emit light by radiative recombination with majority carriers. In addition, any one of the individual electrodes 2 of the light emitting elements formed in a row
When 3 is selected and a current is passed to cause it to emit light, it is used as an exposure source of a photosensitive drum for a page printer, for example.

However, in this conventional light emitting diode array, individual electrodes 23 are provided on the island-shaped semiconductor layer 22 formed on the front side of the semiconductor substrate 21 and a common electrode 24 is provided on the back side of the semiconductor substrate 21. Therefore, the step of forming the individual electrode 23 and the common electrode 24 is performed twice, and there is a problem that the manufacturing process becomes complicated. In addition, when the individual electrode 23 and the common electrode 24 are on both the front and back surfaces of the semiconductor substrate 21, there is a problem that the connection work is difficult when connecting to an external circuit by a wire bonding method or the like.

Therefore, the present applicant has filed Japanese Patent Application No. 7-19285.
7, the lower semiconductor layer 2 containing one conductivity type impurity is formed on the semiconductor substrate 21 as shown in FIGS.
2a is provided, an upper semiconductor layer 22b containing impurities of opposite conductivity type is provided on the lower semiconductor layer 22a, common electrodes 24a and 24b are connected to the exposed portion of the lower semiconductor layer 22a, and the upper semiconductor layer 22b is provided. It has been proposed that the individual electrodes 23 be connected and provided.

With this configuration, the individual electrode 23 and the common electrodes 24a and 24b can be provided on the same side of the semiconductor substrate 21, and the individual electrode 23 and the common electrodes 24a and 24b can be provided.
Since the light emitting diode array can be simultaneously formed in one step, the manufacturing process of the light emitting diode array is simplified and the individual electrode 2
Since 3 and the common electrodes 24a and 24b are located on the same side, connection work with an external circuit by a wire bonding method or the like becomes easy.

As shown in FIG. 5, the common electrode 24
a and 24b are provided in two groups so that adjacent island-shaped semiconductor layers 22 belong to different groups, and the individual electrodes 23 are provided so that adjacent island-shaped semiconductor layers 22 are connected by the same individual electrode 23. Has been.

As described above, when the common electrodes 24a and 24b are provided in two groups and the individual electrodes 23 are provided so that the adjacent island-shaped semiconductor layers 22 are connected to the same individual electrode, the electrode pattern is simplified. It is possible to prevent short-circuiting of the electrodes, etc.
3 has an advantage that the connection area between the external circuit 3 and the external circuit can be increased.

In such a light emitting diode array, a combination of the individual electrodes 23 and the common electrodes 24a and 24b is selected and a current is passed therethrough, whereby each light emitting diode is selectively caused to emit light.

The specific structure of the island-shaped semiconductor layer 22 is as follows.
As shown in FIG. 6, on a semiconductor substrate 21 made of silicon (Si) or the like, a buffer layer 26 made of gallium arsenide or the like, an n ⁺ type gallium arsenide layer 27, an n type aluminum gallium arsenide layer 28, and a p type aluminum gallium arsenide. Layer 2
9 and p ⁺ type gallium arsenide layer 30. The buffer layer 26, the n ⁺ -type gallium arsenide layer 27, and the n-type aluminum gallium arsenide layer 28 form the lower semiconductor layer 22a, and the p-type aluminum gallium arsenide layer 29 and the p ⁺ -type gallium arsenide layer 30 form the upper semiconductor layer 22b. Composed.

With such a structure, to expose a part of the n ⁺ -type gallium arsenide layer 27, the p ⁺ -type gallium arsenide layer 3 is used.
0, part of the p-type aluminum gallium arsenide layer 29 and the n-type aluminum gallium arsenide layer 28 are etched. However, there is no etching solution that can etch the n-type aluminum gallium arsenide layer 28 but not the n ⁺ -type gallium arsenide layer 27. That is, the aluminum gallium arsenide layer 28 and the gallium arsenide layer 27 have no etching selectivity.

Therefore, when exposing a part of the n ⁺ -type gallium arsenide layer 27, the time during which the p ⁺ -type gallium arsenide layer 30, the p-type aluminum gallium arsenide layer 29, and the n-type aluminum gallium arsenide layer 28 are etched. There is no choice but to perform etching by controlling the time of pulling up from the etching solution.

However, the p ⁺ -type gallium arsenide layer 30, p
When the n-type aluminum gallium arsenide layer 29 and the n-type aluminum gallium arsenide layer 28 are etched by time control, under-etching or over-etching is induced, and the thickness of the n ⁺ -type gallium arsenide layer 27 becomes non-uniform, so that There is a problem that the driving voltage varies and the light emission varies.

The present invention has been made in view of the above problems of the prior art, and an object of the present invention is to provide a method of manufacturing a light emitting diode array capable of eliminating variations in driving voltage of the light emitting diodes.

[0018]

In order to achieve the above object, in a method of manufacturing a light emitting diode array according to a first aspect, a gallium arsenide layer having one conductivity type and an aluminum having one conductivity type are formed on a semiconductor substrate. A gallium arsenide layer, an aluminum gallium arsenide layer having a reverse conductivity type, and a gallium arsenide layer having a reverse conductivity type are sequentially formed, and these layers are etched to form islands, and then the gallium arsenide layer having the reverse conductivity type is formed. An aluminum gallium arsenide layer having a reverse conductivity type, and a part of the aluminum gallium arsenide layer having a single conductivity type is etched to expose a part of the gallium arsenide layer having a single conductivity type to provide the reverse conductivity type. A method for manufacturing a light emitting diode array, comprising forming electrodes by connecting to a gallium arsenide layer and a gallium arsenide layer having one conductivity type, When a part of the gallium arsenide layer exhibiting the conductivity type is exposed, an etching buffer layer is formed on the gallium arsenide layer exhibiting the one conductivity type, and the gallium arsenide exhibiting the opposite conductivity type up to the etching buffer layer. A layer, an aluminum gallium arsenide layer exhibiting a reverse conductivity type, and a portion of the aluminum gallium arsenide layer exhibiting one conductivity type are removed by etching, and then the etching buffer layer is removed by etching to remove the gallium arsenide layer exhibiting one conductivity type. Expose part.

[0019]

Embodiments of the present invention will be described below in detail with reference to the accompanying drawings. 1 is a view showing an embodiment of a light emitting diode array according to claim 1, 1 is a semiconductor substrate, 2 is a buffer layer, 3 (3a, 3b) is a gallium arsenide layer exhibiting one conductivity type, and 4 is Aluminum gallium arsenide layer, 5 is an aluminum gallium arsenide layer having one conductivity type, 6 is an aluminum gallium arsenide layer having an opposite conductivity type, 7 is a gallium arsenide layer having an opposite conductivity type, 8 is a common electrode, 9 is an individual electrode, 10 is a protective film.

The semiconductor substrate 1 is made of, for example, silicon (Si).
And a single crystal semiconductor substrate such as gallium arsenide (GaAs).

The buffer layer 2 is made of gallium arsenide or the like. The buffer layer 2 is formed, for example, by MOCVD or MBE.
It is formed by the method. That is, the natural oxide film on the semiconductor substrate 1 is removed at a high temperature of 800 ° C. to 1000 ° C., and then 45
After growing an amorphous gallium arsenide film serving as a nucleus at a low temperature of 0 ° C. or lower to a thickness of about 0.1 to 2 μm by MOCVD or MBE, the temperature is raised to 500 ° C. to 700 ° C. to recrystallize gallium arsenide. A single crystal film is grown and formed (two-step growth method). In this case, trimethylgallium ((CH ₃ ) ₃ Ga) or the like is used as the raw material of gallium, and arsine (AsH ₃ ) or the like is used as the raw material of arsenic. Next, post annealing such as annealing at a high temperature of 750 ° C. to 1000 ° C. and rapid cooling to a low temperature of 600 ° C. or less is repeated several times (temperature cycle method) is performed. The buffer layer 2 is provided to alleviate lattice mismatch between the silicon and the gallium arsenide layer 3 formed thereon when silicon (Si) is used as the substrate 1.

Next, the gallium arsenide layer 3 having one conductivity type
To form This gallium arsenide layer 3 is also formed by MOCVD or M
It is formed by the BE method. The gallium arsenide layer 3 having the one conductivity type contains semiconductor impurities such as S, Se, Te, Ge, and Si at about 10 ¹⁹ to 10 ²² cm ⁻³ . The gallium arsenide layer 3 having this one conductivity type functions as an ohmic contact layer.

Next, the etching buffer layer 4 is formed.
The etching buffer layer 4 may be made of any material as long as it has a lattice constant similar to that of a gallium arsenide layer or the like and has etching selectivity with respect to the upper layer film. For example, 300Å ~ 2
It is composed of an aluminum gallium arsenide layer 4a having a thickness of about 000Å and a gallium arsenide layer 4b having a thickness of about 2000Å to 10000Å. The etching buffer layer 4 also constitutes a part of the semiconductor layer of the light emitting diode and contains an impurity of one conductivity type. The buffer layer 4 for this etching is also formed by MOCVD or MBE. When the aluminum gallium arsenide layer is formed on the gallium arsenide layer, only the aluminum gallium arsenide layer on the gallium arsenide layer cannot be selectively etched. Only a gallium arsenide layer can be selectively etched by using a system etching solution.

Next, the aluminum gallium arsenide layer 5 containing an impurity of one conductivity type is formed. The aluminum gallium arsenide layer 5 is formed to have a thickness of about 0.3 to 3 μm and is formed by MOCVD method, MBE method or the like. The aluminum gallium arsenide layer 5 is made of S, Se, Te, G.
10 ¹⁶ to 10 ¹⁸ of one conductivity type semiconductor impurity such as e and Si
^Contains about cm ^-3 .

Next, an aluminum gallium arsenide layer 6 containing impurities of opposite conductivity type is formed. The aluminum gallium arsenide layer 6 is formed to have a thickness of about 0.3 to 3 μm and is formed by the MOCVD method or the MBE method. The reverse conductivity type semiconductor impurities include Zn, Cd, Sr, Ba, Ra and the like, and are contained in an amount of about 10 ¹⁶ to 10 ¹⁸ cm ⁻³ .

Next, a gallium arsenide layer 7 containing a large amount of impurities of the opposite conductivity type is formed. The gallium arsenide layer 7 functions as an ohmic contact layer, and Z
n, Cd, Sr, Ba, Ra, etc., at 10 ²⁰ to 10 ²² cm
^Contains about ^-3 .

A protective film 10 is formed on the island-shaped semiconductor layer, and a common electrode 8 and an individual electrode 9 are formed on the protective film 10. The common electrode 8 is connected to the gallium arsenide layer 7 containing a large amount of impurities of the opposite conductivity type through a through hole,
The individual electrode 9 is connected to the gallium arsenide layer 3 containing a large amount of one conductivity type impurity through the through hole. Protective film 1
0 is composed of a silicon nitride film or a silicon oxide film and is formed by a plasma CVD method or the like. The common electrode 8 and the individual electrode 9 are made of gold (Au) or the like and are formed by a vacuum vapor deposition method or the like.

Next, a method of exposing a part of the gallium arsenide layer 3 in the above light emitting diode array will be described with reference to FIG. First, as shown in FIG. 3A, a buffer layer 2, a gallium arsenide layer 3 having one conductivity type, an etching buffer layer 4, an aluminum gallium arsenide layer 5 having one conductivity type, and an aluminum gallium layer having an opposite conductivity type. The arsenic layer 6 and the gallium arsenide layer 7 having the opposite conductivity type are etched in an island shape with a sulfuric acid / hydrogen peroxide-based etching solution.

Next, as shown in FIG. 1B, one of the gallium arsenide layer 7 having the opposite conductivity type, the aluminum gallium arsenide layer 6 having the opposite conductivity type, and the aluminum gallium arsenide layer 5 having the one conductivity type is formed. The part is etched with a sulfuric acid / hydrogen peroxide type etching solution. In this case, etching is performed by controlling the time, but the gallium arsenide layer 7 having the opposite conductivity type, the aluminum gallium arsenide layer 6 having the opposite conductivity type, and the aluminum gallium arsenide layer 5 having the one conductivity type are completely etched. The time may be set and etching may be performed. Gallium arsenide layer 4b which is an etching buffer layer
The surface portion of may be slightly over-etched.

Next, as shown in FIG. 3C, the gallium arsenide layer 4b which is a part of the etching buffer layer 4 is removed by etching. The gallium arsenide layer 4b is etched with a mixed solution of ammonia and hydrogen peroxide. The mixed liquid of ammonia and hydrogen peroxide can impart etching selectivity to the gallium arsenide layer 4b and the aluminum gallium arsenide layer 4a. Therefore, the gallium arsenide layer 4b can be completely removed by etching.

Next, as shown in FIG. 3D, the aluminum gallium arsenide layer 4a, which is a buffer layer for etching, is removed by etching under time control. This etching is performed using a sulfuric acid / hydrogen peroxide-based etching solution. In this case, the aluminum gallium arsenide layer 4a is preferably formed with a thickness of 300Å to 2000Å. That is, when the thickness of the aluminum gallium arsenide layer 4a is 300 Å or less, since the thickness is thin, it is difficult to make the aluminum gallium arsenide layer 4a function as a buffer layer for etching in the step before etching the gallium arsenide layer 4b. That is, when the thickness of the aluminum gallium arsenide layer 4a is 300 Å or less, it is difficult to provide the etching selectivity with the gallium arsenide layer 4b. Further, when the thickness of the aluminum gallium arsenide layer 4a is 2000 Å or more, it becomes difficult to control the etching time, and the gallium arsenide layer 3 having one conductivity type is over-etched or surface roughness is induced, so that the light emitting diode The drive voltage varies. Therefore, the aluminum gallium arsenide layer 4a which is the etching buffer layer is 3
It is desirable to form it to a thickness of 00Å to 2000Å.

[0032]

As described above, according to the method of manufacturing a light emitting diode array of the first aspect, when a part of the gallium arsenide layer having one conductivity type is exposed, the gallium arsenide having one conductivity type is exposed. A buffer layer for etching is formed on the layer, and a gallium arsenide layer having the opposite conductivity type, an aluminum gallium arsenide layer having the opposite conductivity type, and a part of the aluminum gallium arsenide layer having one conductivity type are formed up to the buffer layer for etching. After etching away, the etching buffer layer is removed by etching to expose a part of the gallium arsenide layer exhibiting the one conductivity type, so that the last layer that exposes the gallium arsenide layer is a thin layer. Can be etched into. Therefore, the film thickness of the gallium arsenide layer can be accurately controlled, the driving voltage of the light emitting diode is made uniform, and variations in light emission are reduced.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of a light emitting diode array according to the present invention.

FIG. 2 is a diagram showing a method for manufacturing a light emitting diode array according to the present invention.

FIG. 3 is a diagram showing a conventional light emitting diode array.

FIG. 4 is a sectional view taken along line AA of FIG. 3;

FIG. 5 is a diagram showing another conventional light emitting diode array.

FIG. 6 is a sectional view taken along line AA of FIG. 5;

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Semiconductor substrate, 2 ... Buffer layer, 3 ... One conductivity type gallium arsenide layer, 4 ... Etching buffer layer, 5 ... One conductivity type aluminum gallium arsenide layer, 6 ... Aluminum gallium arsenide layer exhibiting reverse conductivity type, 7 ... Gallium arsenide layer exhibiting reverse conductivity type, 8 ... Common electrode, 9 ... Individual electrode, 10 ...
Protective film

Claims (3)

[Claims] 1. A gallium arsenide layer having one conductivity type, an aluminum gallium arsenide layer having one conductivity type, and an aluminum gallium arsenide layer having an opposite conductivity type on a semiconductor substrate.
And a gallium arsenide layer having a reverse conductivity type are sequentially formed, and each of these layers is etched to form islands, and the gallium arsenide layer having a reverse conductivity type, an aluminum gallium arsenide layer having a reverse conductivity type, and one conductivity type are formed. And a part of the aluminum gallium arsenide layer exhibiting the one conductivity type is exposed to expose a part of the gallium arsenide layer exhibiting the one conductivity type and connected to the gallium arsenide layer exhibiting the opposite conductivity type and the gallium arsenide layer exhibiting the one conductivity type. In the method of manufacturing a light-emitting diode array in which electrodes are formed by etching, a buffer layer for etching is formed on the gallium arsenide layer exhibiting one conductivity type when exposing a part of the gallium arsenide layer exhibiting one conductivity type. , A gallium arsenide layer having the opposite conductivity type up to the etching buffer layer, an aluminum gallium arsenide layer having the opposite conductivity type, and one conductivity type And a part of the gallium arsenide layer exhibiting the one conductivity type is exposed by etching away a part of the aluminum gallium arsenide layer. . 2. The etching buffer layer is composed of an aluminum gallium arsenide layer and a gallium arsenide layer exhibiting one conductivity type, wherein the aluminum gallium arsenide layer is a lower layer and the gallium arsenide layer is an upper layer. A method for manufacturing the light emitting diode array described in 1. 3. The method for manufacturing a light emitting diode array according to claim 1, wherein the film thickness of the aluminum gallium arsenide layer as the etching buffer layer is 300Å to 2000Å.