JPH09293895A - Semiconductor light emitting element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable accurate etching of an upper part of a gallium arsenide layer for connection with an electrode, accurate control of thickness of the gallium arsenide and suppression of dispersion of emitted light with a uniform driving voltage of a light emitting layer, diode; by setting an aluminum composition ratio in the aluminum gallium arsenide layer which exhibits conductivity type at a suitable value. SOLUTION: In the semiconductor light emitting element, a gallium arsenide layer 3 of one conductivity type, an aluminum gallium arsenide layer 4 (Al, Ga1-x , As), an aluminum gallium arsenide layer 5 (Al, Ga1-y , As) of the other conductivity type and a gallium arsenide layer 7 of the other conductivity type are sequentially formed on a single crystal substrate 1. Electrodes are connected to the gallium arsenide layer 4 of one conductivity type and the gallium arsenide layer 7 of the other conductivity type. The aluminum gallium arsenide layer 4 (Al, Ga1-x , As) is set to have an aluminum composition ratio x satisfying relationship 0.5<=x<1.0.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device, and more particularly to a semiconductor light emitting device used as a light source for static elimination of a photosensitive drum for a page printer.

[0002]

2. Description of the Related Art A conventional semiconductor light emitting device is shown in FIGS. FIG. 5 is a sectional view taken along line AA of FIG. 4 and 5, 21 is a single crystal semiconductor substrate, 22 is an island-shaped semiconductor layer, 23 is an individual electrode, and 24 is a common electrode.

The single crystal semiconductor substrate 21 is made of a semiconductor substrate such as silicon (Si) or gallium arsenide (GaAs). The island-shaped semiconductor layer 22 is made of a compound semiconductor layer such as gallium arsenide or aluminum gallium arsenide, and a semiconductor junction is formed at the interface between the layer 22a containing one conductivity type impurity and the layer 22b containing opposite conductivity type impurity. To be done. The island-shaped semiconductor layer 22 is formed by, for example, MOCVD (metal organic chemical vapor deposition) method or MBE (molecular beam epitaxy).
After a single crystal semiconductor layer made of gallium arsenide, aluminum gallium arsenide, or the like is formed by a method, it is formed in an island shape by mesa etching or the like.

[0004] On the surface portion of the island-shaped semiconductor layer 22, for example a protective film 25 made of a silicon nitride film (Si _x N _y)
Are formed, and individual electrodes 23 made of, for example, gold (Au) are formed on the surface of the protective film 25. This individual electrode 23 is connected to a semiconductor layer 22b containing an impurity of the opposite conductivity type via a through hole formed in the protective film 25. This individual electrode 23 is formed of a layer 22 b containing an impurity of the opposite conductivity type in the island-shaped semiconductor layer 22.
Is formed so as to extend alternately to the other end face side for each adjacent island-shaped semiconductor layer 22 from the upper surface part to the vicinity of the end face of the semiconductor substrate 21 via the wall face part. A common electrode 24 is formed on almost the entire back surface of the semiconductor substrate 21.

The island-shaped semiconductor layer 22, the individual electrodes 23, and the common electrode 24 constitute individual light emitting diodes, and the light emitting diodes are formed on the semiconductor substrate 21 so as to be arranged in a line. In this case, for example, the individual electrode 23 becomes the anode electrode of the light emitting diode, and the common electrode 24 becomes the cathode electrode. In addition, the individual electrode 23 is connected to an external circuit at its wide portion by a bonding wire or the like.

In such a semiconductor light emitting device, for example, when a current is passed in the forward direction from the individual electrode 23 toward the common electrode 24, electrons are injected into the layer 22b containing impurities of opposite conductivity type, and impurities of one conductivity type are introduced. Holes are injected into the layer 22a containing. Some of these minority carriers emit light by radiative recombination with majority carriers. In addition, by selecting any one of the individual electrodes 23 of the light emitting elements formed in a row and applying a current to emit light, the light emitting element is used as, for example, a charge eliminating light source of a photosensitive drum for a page printer.

However, in this conventional semiconductor light emitting device, the island-shaped semiconductor layer 2 formed on the front surface side of the semiconductor substrate 21.
The individual electrode 23 is provided on the semiconductor substrate 21
Since the common electrode 24 is provided on the back surface side of the above, there is a problem that the forming process of the individual electrode 23 and the common electrode 24 is performed twice and the manufacturing process becomes complicated. In addition, the individual electrode 2
If 3 and the common electrode 24 are on both front and back surfaces of the semiconductor substrate 21, there is also a problem that the connection work is difficult when connecting to an external circuit by a wire bonding method or the like.

Therefore, the present applicant has filed Japanese Patent Application No. 7-19285.
In No. 7, as shown in FIG. 6, a lower semiconductor layer 22a containing an impurity of one conductivity type is provided on a semiconductor substrate 21, and an upper semiconductor layer 22b containing an impurity of opposite conductivity type is formed on the lower semiconductor layer 22a. It is proposed that the common electrodes 24a and 24b are connected to the exposed portion of the lower semiconductor layer 22a and the individual electrode 23 is connected to the upper semiconductor layer 22b.

With this configuration, the individual electrode 23 and the common electrodes 24a and 24b can be provided on the same side of the semiconductor substrate 21, and the individual electrode 23 and the common electrodes 24a and 24b can be provided.
Since the semiconductor light emitting device can be simultaneously formed in one step, the manufacturing process of the semiconductor light emitting device is simplified, and since the individual electrode 23 and the common electrodes 24a and 24b are located on the same side, it is possible to form an external circuit by a wire bonding method or the like. Connection work becomes easy.

As shown in FIG. 6, the common electrode 24
a and 24b are provided in two groups so as to belong to different groups for each adjacent island-shaped semiconductor layer 22, and the individual electrodes 23
Are provided so that the connected common electrodes 24a and 24b are connected to the same individual electrode 23 for each different adjacent island-shaped semiconductor layers 22.

As described above, when the common electrodes 24a and 24b are provided in two groups and the individual electrodes 23 are provided so that the adjacent island-shaped semiconductor layers 22 are connected to the same individual electrode, the electrode pattern is simplified. It is possible to prevent short-circuiting of the electrodes, etc.
3 has an advantage that the connection area between the external circuit 3 and the external circuit can be increased.

In such a semiconductor light emitting element, each light emitting diode is selectively caused to emit light by selecting a combination of the individual electrode 23 and the common electrodes 24a and 24b and passing an electric current.

As shown in FIG. 7, a concrete structure of the island-shaped semiconductor layer 22 in this conventional semiconductor light emitting device is such that a buffer layer made of, for example, gallium arsenide is provided on a semiconductor substrate 21 made of silicon (Si) or the like. 26, n ⁺ type gallium arsenide layer 27, n type aluminum gallium arsenide layer 2
8, p-type aluminum gallium arsenide layer 29, and p ⁺ -type gallium arsenide layer 30. The buffer layer 26, the n ⁺ -type gallium arsenide layer 27, and the n-type aluminum gallium arsenide layer 28 form the lower semiconductor layer 22a shown in FIG.
The upper type aluminum gallium arsenide layer 29 and the p ⁺ type gallium arsenide layer 30 constitute the upper semiconductor layer 22b shown in FIG. Note that n-type aluminum gallium arsenide (Al _x Ga
The aluminum composition x of the _1-x As) layer 28 is x = 0.35.
P-type aluminum gallium arsenide (Al
The aluminum composition z of the lower part of the _Z Ga _{1 -Z} As) layer 29 is set to approximately z = 0.1.

With such a structure, to expose a part of the n ⁺ -type gallium arsenide layer 27, the p ⁺ -type gallium arsenide layer 3 is used.
0, part of the p-type aluminum gallium arsenide layer 29 and the n-type aluminum gallium arsenide layer 28 are etched. However, when the aluminum composition of the aluminum gallium arsenide layer is 0.35 or less, the aluminum gallium arsenide layer can be etched, but there is no etching solution that cannot etch the gallium arsenide layer. That is, when the aluminum composition of aluminum gallium arsenide is 0.35 or less, the n-type aluminum gallium arsenide layer 28 and the n ⁺ -type gallium arsenide layer 27 have no etching selectivity.

Therefore, when exposing a part of the n ⁺ -type gallium arsenide layer 27, the time during which the p ⁺ -type gallium arsenide layer 30, the p-type aluminum gallium arsenide layer 29, and the n-type aluminum gallium arsenide layer 28 are etched. While etched in a time control to increase the etchant sure to allow, when etching the p ⁺ -type GaAs layer 30, p-type aluminum gallium arsenide layer 29, and n-type aluminum gallium arsenide layer 28 with time control, under-etching and over There is a problem in that etching is induced and the film thickness of the n ⁺ -type gallium arsenide layer 27 becomes non-uniform, causing variations in the driving voltage of the light emitting diode and inducing variations in light emission.

The present invention has been made in view of the above problems of the prior art, and it is an object of the present invention to provide a method of manufacturing a light emitting diode array capable of eliminating variations in driving voltage of the light emitting diodes.

[0017]

In order to achieve the above object, according to the semiconductor light emitting device of the present invention, a gallium arsenide layer exhibiting one conductivity type and an aluminum gallium exhibiting one conductivity type are formed on a single crystal substrate. Arsenic layer (Al _x Ga _1-x A
s), aluminum gallium arsenide layer exhibiting other conductivity type _{(Al y Ga 1-y As} ), and other conductive type formed by sequentially laminating a GaAs layer exhibiting, gallium arsenide layer exhibiting the first conductivity type And a semiconductor light emitting device formed by connecting an electrode to gallium arsenide having another conductivity type, the aluminum gallium arsenide layer (Al _x Ga) having one conductivity type.
_1-x As) aluminum composition ratio x is 0.5 ≦ x <
It was set to 1.0.

[0018]

Embodiments of the present invention will be described below in detail with reference to the accompanying drawings. 1 and 2 are views showing an embodiment of a semiconductor light emitting device according to the present invention, in which 1 is a semiconductor substrate, 2 is a buffer layer, 3 is a gallium arsenide layer exhibiting one conductivity type, and 4 is a conductivity type. , A first aluminum gallium arsenide layer having a reverse conductivity type, 6 a second aluminum gallium arsenide layer having a reverse conductivity type, 7 a gallium arsenide layer having a reverse conductivity type, and 8 ( 8a, 8b) are common electrodes, 9 are individual electrodes, 1
0 is a protective film.

The semiconductor substrate 1 is, for example, silicon (Si).
And a single crystal semiconductor substrate such as gallium arsenide (GaAs) and have an electrical resistivity of 1000 Ωcm or more.

The buffer layer 2 is made of gallium arsenide or the like. The buffer layer 2 is formed, for example, by MOCVD or MBE.
It is formed by the method. That is, the natural oxide film on the semiconductor substrate 1 is removed at a high temperature of 800 ° C. to 1000 ° C., and then 45
After growing an amorphous gallium arsenide film serving as a nucleus at a low temperature of 0 ° C. or lower to a thickness of about 0.1 to 2 μm by MOCVD or MBE, the temperature is raised to 500 ° C. to 700 ° C. to recrystallize gallium arsenide. A single crystal film is grown and formed (two-step growth method). In this case, trimethylgallium ((CH ₃ ) ₃ Ga) or the like is used as the raw material of gallium, and arsine (AsH ₃ ) or the like is used as the raw material of arsenic. Next, post annealing such as annealing at a high temperature of 750 ° C. to 1000 ° C. and rapid cooling to a low temperature of 600 ° C. or less is repeated several times (temperature cycle method) is performed. The buffer layer 2 is provided to alleviate lattice mismatch between the silicon and the gallium arsenide layer 3 formed thereon when silicon (Si) is used as the substrate 1.

Next, the gallium arsenide layer 3 having one conductivity type
To form This gallium arsenide layer 3 is also formed by MOCVD or M
It is formed to a thickness of about 0.5 to 2 μm by the BE method or the like.
The gallium arsenide layer 3 having this one conductivity type is formed of S, Se,
Semiconductor impurities such as Te, Ge, and Si are added at 1 × 10 ¹⁷ to 1
The content is about 10 ¹⁹ cm ^-3 . The gallium arsenide layer 3 having this one conductivity type functions as an ohmic contact layer.

Next, the aluminum gallium arsenide layer 4 containing an impurity of one conductivity type is formed. The aluminum gallium arsenide layer 4 is formed to have a thickness of about 0.5 to 2 μm and is formed by MOCVD or MBE. The aluminum gallium arsenide layer 4 is made of S, Se, Te, G.
1 × 10 ¹⁶ to 1 of one conductivity type semiconductor impurity such as e or Si
× contained approximately 10 ¹⁸ cm ^-3, and functions as a clad layer.

Next, a first aluminum gallium arsenide layer 5 containing impurities of opposite conductivity type is formed. The first aluminum gallium arsenide layer 5 is formed to a thickness of 0.1 to 0.5 μm and is formed by the MOCVD method or the MBE method. The first aluminum gallium arsenide layer 5 containing the impurities of the opposite conductivity type is Zn, Cd, Sr, Ba, R.
It contains about 1 × 10 ¹⁶ to 1 × 10 ¹⁸ cm ⁻³ of a and functions as a light emitting layer.

Next, a second aluminum gallium arsenide layer 6 containing impurities of opposite conductivity type is formed. The second aluminum gallium arsenide layer 6 is formed to have a thickness of about 0.5 to 2 μm and is formed by MOCVD method, MBE method or the like. The second aluminum gallium arsenide layer 6 containing the impurities of the opposite conductivity type functions as a cladding layer.

Next, a gallium arsenide layer 7 containing a large amount of impurities of opposite conductivity type is formed. This gallium arsenide layer 7 is
MOCV formed with a thickness of about 0.01 to 0.1 μm
It is formed by the D method or the MBE method. The gallium arsenide layer 7 containing a large amount of impurities of the opposite conductivity type is Zn, Cd, S.
It contains about 1 × 10 ¹⁸ to 1 × 10 ²⁰ cm ^{−3 of} r, Ba, Ra and the like, and functions as an ohmic contact layer.

A protective film 10 is formed on each of the compound semiconductor layers 2 to 7.
Is formed, and the common electrode 8 and the individual electrode 9 are formed on the protective film 10. The common electrode 8 is connected to the gallium arsenide layer 3 containing a large amount of impurities of opposite conductivity type through the through hole, and the individual electrode 9 is connected to the gallium arsenide layer 7 containing a large amount of impurity of one conductivity type through the through hole. To be done.
The protective film 10 is composed of a silicon nitride film or a silicon oxide film and is formed by a plasma CVD method or the like. The common electrode 8 and the individual electrode 9 are made of gold (Au), chromium (Cr), or the like, and are formed by a vacuum vapor deposition method or the like.

FIG. 3 shows the aluminum composition of each compound semiconductor layer 2-7. The semiconductor substrate 1, the buffer layer 2, the gallium arsenide layer 3 containing one conductivity type semiconductor impurity, and the gallium arsenide layer 7 containing the opposite conductivity type semiconductor impurity do not contain aluminum. Aluminum gallium arsenide (Al _x Ga) containing one conductivity type semiconductor impurity
_1-x As) layer and the fourth aluminum composition x, the composition y of aluminum in the second aluminum gallium arsenide _{(Al y Ga 1-y As} ) layer of aluminum gallium arsenide layer 6 of 6 containing opposite conductivity type semiconductor impurity 0.5 ≦ x <
1.0, 0.5 ≦ y <1.0, and the first aluminum gallium arsenide (Al _Z
The composition ratio z of aluminum of the Ga _{1 -Z} As) layer 5 is z <
Let x and z <y.

The reason why the aluminum compositions x of the aluminum gallium arsenide (Al _x Ga _{1 -x} As) layers 4 containing one conductivity type semiconductor impurities are 0.5 ≦ x <1.0 respectively is that they are different from the gallium arsenide layer. This is to have etching selectivity. That is, aluminum gallium arsenide (A
The aluminum composition x of the l _x Ga _1-x As) layer 4 is x =
At 0.5, the etching rate of aluminum gallium arsenide is several tens of times to several 1 as compared with the case of x = 0.4.
This is 00 times, and the selective etching property with gallium arsenide (GaAs) is improved.

Further, the first aluminum gallium arsenide (Al _Z Ga _{1 -Z} As) containing a reverse conductivity type semiconductor impurity is used.
The reason for setting the aluminum composition ratio z of the layer 5 to z <x and z <y is that the first aluminum gallium arsenide (Al _Z Ga _{1 -Z} A
s) By providing aluminum gallium arsenide layers 4 and 6 having a wide band gap on both sides of the layer 5, both sides of the light emitting region are made transparent so that the light emitted at the pn junction can be efficiently extracted to the outside. This is because.

Next, a method of exposing a part of the gallium arsenide layer 3 in the above semiconductor light emitting device will be described. The entire surface of the semiconductor substrate 1 or part of each layer 2
7 is formed, and is etched in an island shape with a sulfuric acid / hydrogen peroxide-based etching solution. An ohmic contact layer 7, a second aluminum gallium arsenide layer 6 containing an impurity of opposite conductivity type, a first aluminum gallium arsenide layer 5 containing an impurity of opposite conductivity type, and an aluminum gallium arsenide layer 4 containing an impurity of one conductivity type. Etching is performed with a hydrofluoric acid (HF) -based aqueous solution. In this case, aluminum gallium arsenide (Al _x
Ga _1-x As) aluminum composition ratio x is 0.5 ≦ x
It is set to <1.0, and gallium arsenide (Ga) in the lower layer is set.
It has a selective etching property with As). Therefore, it is possible to prevent the aluminum gallium arsenide layer from remaining on the gallium arsenide layer 3 containing an impurity of one conductivity type or overetching the gallium arsenide layer 3 as much as possible.

After that, the protective film 10, the common electrode 8 and the individual electrode 9 are formed and completed. Common electrode 8 and individual electrode 9
Is formed by simultaneously forming a metal film and patterning at the same time.

In the above embodiment, aluminum gallium arsenide (Al _x Ga _{1 -x)} containing one conductivity type semiconductor impurity is used.
The second aluminum gallium arsenide (Al _y) containing semiconductor impurities of the opposite conductivity type to the aluminum composition x of the As layer 4 is used.
Ga _1-y As) layer 6 has aluminum composition ratios y of 0.5 ≦ x ≦ 1.0 and 0.5 ≦ y ≦ 1.0, respectively, and first aluminum gallium containing a reverse conductivity type semiconductor impurity. It has been described that the aluminum composition ratio z of the arsenic (Al _Z Ga _{1 -Z} As) layer 5 is z <x and z <y.
The aluminum composition ratio x of the aluminum gallium arsenide layer 4 containing one conductivity type semiconductor impurity is 0.5 ≦ x <1.0.
In that case, a large etching selectivity with respect to the gallium arsenide layer 3 containing one conductivity type semiconductor impurity can be obtained, and the aluminum composition ratios y and z of the other compound semiconductor layers 5 and 6 can be variously selected.

[0033]

As described above, according to the semiconductor light emitting device of the present invention, a gallium arsenide layer having one conductivity type and an aluminum gallium arsenide layer having one conductivity type (Al _x Ga ₁₎ are formed on a single crystal substrate. _-x As), aluminum gallium arsenide layer exhibiting other conductivity type _{(Al y Ga 1-y As} ), and gallium arsenide layer was formed by laminating exhibiting other conductivity type gallium exhibiting the one conductivity type In a semiconductor light emitting device formed by connecting an electrode to an arsenic layer and gallium arsenide having another conductivity type, the aluminum composition ratio x of the aluminum gallium arsenide layer having one conductivity type (Al _x Ga _{1 -x} As) is 0. Since 0.5 ≦ x <1.0, the upper layer portion of the gallium arsenide layer that connects the electrodes can be accurately etched, and thus the film thickness of the gallium arsenide layer can be accurately controlled. Dynamic voltage is equalized luminous variation is reduced.

[Brief description of drawings]

FIG. 1 is a sectional view showing an embodiment of a semiconductor light emitting device according to the present invention.

FIG. 2 is a plan view showing an embodiment of a semiconductor light emitting device according to the present invention.

FIG. 3 is a diagram showing an aluminum composition of each compound semiconductor layer showing an embodiment of a semiconductor light emitting device according to the present invention.

FIG. 4 is a plan view showing a conventional semiconductor light emitting device.

5 is a cross-sectional view taken along the line AA of FIG.

FIG. 6 is a plan view showing another conventional semiconductor light emitting device.

FIG. 7 is a sectional view taken along line AA of FIG. 6;

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Semiconductor substrate, 2 ... Buffer layer, 3 ... Gallium arsenide layer, 4 ... Aluminum gallium arsenide layer containing one conductivity type semiconductor impurity, 5 ... Other conductivity type semiconductor impurities First aluminum gallium arsenide layer containing 6 ... Second aluminum gallium arsenide layer containing other conductivity type semiconductor impurities, 7 ... Gallium arsenide layer containing other conductivity type semiconductor impurities

Claims (1)

[Claims] 1. A gallium arsenide layer having one conductivity type, an aluminum gallium arsenide layer having one conductivity type (Al _x Ga _{1 -x} As), and a first aluminum gallium arsenide having an opposite conductivity type on a single crystal substrate. Layer (Al _Z Ga _1-Z As),
A first aluminum gallium arsenide layer (Al _y Ga _1-y As) having the opposite conductivity type and a gallium arsenide layer having the opposite conductivity type are sequentially stacked to form a layer opposite to the one conductivity type gallium arsenide layer. In a semiconductor light emitting device formed by connecting an electrode to gallium arsenide exhibiting conductivity type, the aluminum gallium arsenide layer exhibiting one conductivity type (Al _x Ga _1-x
As) aluminum composition ratio x is 0.5 ≦ x <1.0
A semiconductor light-emitting device characterized by being set to.