JPH09224061A - Ramp response circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a ramp response circuit capable of making a circuit scale small. SOLUTION: In a ROM 5 for band limitation, data for the band limitation provided with a fixed amplitude for limiting the band of data to be modulated and bursting them are stored. Also, in the ROM 15 for a ramp, ramp data whose amplitude is changed smoothly from '0' to '1' corresponding to the transition response characteristics of ramp parts provided in front and at the back of the burst data are stored. An adder-subtractor 18 forms the smoothly changing ramp parts in front and at the back of the burst data without a multiplier by adding and subtracting the data for the band limitation outputted from the ROM 5 for the band limitation and the ramp data outputted from the ROM 15 for the ramp at a prescribed timing.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ramp response circuit which is provided with a ramp section having a gentle transient response at the start and end when band limiting and bursting in wireless communication.

[0002]

2. Description of the Related Art In wireless communication, it is necessary to narrow the occupied band in order to effectively use a limited wireless frequency. To that end, in the modulation, while limiting the band, when bursting, at the start and end,
It is necessary to provide a ramp section having a gentle transient response.

FIG. 4 is a block diagram showing the configuration of a conventional ramp response circuit. In the figure, the input data sequence D is converted into I and Q symbol sequences by the IQ modulation circuit 1 and supplied to the delay circuits 2 and 3, respectively.
The I and Q symbol strings are once held by the delay circuits 2 and 3, respectively, and then temporally convoluted by the switch circuit 4 and supplied to the band limiting ROM 5 as an address.

Burst data is stored in the band limiting ROM 5, and a time address within one symbol is supplied from the oversampling address generator 6, and the time address and the I and Q symbol strings are supplied. Burst data is output in accordance with the address. Also,
The coefficient generator 7 generates coefficient data for creating the ramp portion before the burst start and the ramp portion after the burst end according to the time address in one symbol supplied from the oversampling address generator 6. It

Next, in the multiplier 8, the band limiting RO
The time-varying burst data supplied from M5 is multiplied by the coefficient data supplied from the coefficient generator 7 to create data having a gently changing ramp portion. The vector synthesizer 9 creates IQ data from the above data and supplies the IQ data to the D / A converters 10 and 11, respectively. D / A converters 10 and 11
Then, each of the IQ data is converted into an analog signal and sent to a transmission / reception unit (not shown).

As described above, in the conventional ramp response circuit, the coefficient generator 7 of the ramp section generates a gradually changing coefficient and multiplies the coefficient by the burst data (modulated wave) read from the band limiting ROM 5. Caused a gentle transient response.

[0007]

However, in the conventional ramp response circuit, it is necessary to mount a large circuit called the multiplier 8 for the ramp section which is only a few percent of the whole in terms of time, so that the circuit scale is large. However, there is a problem that the cost increases as well as the cost increases.

[0008] Therefore, an object of the present invention is to provide a ramp response circuit which can be reduced in circuit scale.

[0009]

To achieve the above object, a ramp response circuit according to the present invention limits a band of data to be modulated and also has a constant amplitude for bursting. Band limiting data generating means for generating data, and a lamp for generating ramp data having an amplitude change according to the transient response characteristic of a ramp portion provided before and after the burst data when bursting the data. It is characterized by further comprising data generating means and addition / subtraction means for performing addition / subtraction of the band limitation data generated by the band limitation data generation means and the ramp data generated by the ramp data generation means at a predetermined timing. And

In a preferred mode, the ramp data generating means may generate ramp data multiplied by a coefficient that smoothly changes from 0 to 1, for example. Also, the adder / subtractor is
For example, as described in claim 3, before the bursting of the data is started, the ramp data of the ramp data generating means is output as it is, and at the time of burst, the band limiting data of the band limiting data generating means is left as it is. Output,
After the bursting is completed, it may be operated as a subtractor for subtracting the band limiting data of the band limiting data generating means from the ramp data of the ramp data generating means. Further, for example, when bursting the data, the output of the band limitation data generating means is selectively switched between supplying or invalidating the adder / subtractor at a predetermined timing. A first switching means and a second switching means for selectively switching, at a predetermined timing when bursting the data, whether the output of the ramp data generating means is supplied to the adder / subtractor or invalidated. And may be provided.

Further, for example, as described in claim 5, a first ½ means provided at an output end of the band limiting data generating means for halving the band limiting data, and the lamp. Second ½ means provided at the output end of the data generating means for halving the ramp data. The band output from the ramp data output from the first 1/2 means after the ramp data output from the second half means is output as it is. Subtract and output the limiting data,
At the time of the burst, the band limiting data of the band limiting data generating unit is output as it is, and after the bursting is completed, the band limiting data is output from the ramp data output via the second 1/2 unit. After subtracting and outputting the band limiting data output from the generating means, the second
The band limiting data output via the first ½ means may be subtracted from the ramp data output via the ½ means to output.

In addition, for example, when bursting the data, the output of the band limiting data generating means is supplied to the adder / subtractor as it is or is invalidated at a predetermined timing. Alternatively, the first switching means for selectively switching whether to supply to the adder / subtractor via the first 1/2 means and the ramp data generation means of the ramp data generation means at a predetermined timing when bursting the data. The output is directly supplied to the adder / subtractor,
Second switching means for selectively switching between invalidation or supply to the adder / subtractor via the second 1/2 means may be provided.

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, an embodiment in which the embodiment of the present invention is applied to an information portable terminal (PHS terminal) will be described.
This will be described with reference to the drawings.

A. Configuration of Embodiment FIG. 1 is a block diagram showing a configuration of a ramp response circuit according to an embodiment of the present invention. The parts corresponding to those in FIG. 4 are designated by the same reference numerals and the description thereof will be omitted. In the figure, a lamp ROM 15 is for obtaining a gentle transient response of the lamp portion, and the lamp ROM 15 changes gently from "0" to "1" corresponding to a time address. The data (n bits) multiplied by the coefficient is stored. In the lamp ROM 15, only the central few symbols that give the main contribution of the impulse response are
Delay circuits 2 and 3 as addresses based on I and Q symbol strings
It is supplied from. For example, for PHS terminals as in the present embodiment, only the central 4 symbols are sufficient.

Next, the 1/2 circuits 16 and 17 each output the output from the band limiting ROM 5 or the lamp ROM 15 as 1/2, and are composed of shift registers and the like. The switches SW1 and SW2 are
Each is on / off controlled by a control unit (not shown),
At the time of creating the ramp part or the burst part, either the A side or the open (1 symbol) or the B side or the open (2 symbols) is set, and the switch SW1 is the data of the corresponding band limitation ROM 5 or invalid. (0) or the data from the 1/2 circuit 16 is supplied to the adder / subtractor 18, and the switch SW2 switches the corresponding lamp ROM1.
5 data, invalid (0), or 1/2 circuit 1 above
The data from 7 is supplied to the adder / subtractor 18.

The operation timing of the adder / subtractor 18 is controlled by the control signals S1 and S2 from the control unit (not shown) so that it operates as an adder or a subtractor. Specifically, it operates as an adder when creating a ramp before the start of a burst, and operates as a subtractor when creating a ramp after the end of a burst.

B. Next, an operation of the above-described embodiment will be described. B-1.1 Generation Operation of Ramp Unit with Symbol Length FIG. 2 is a timing chart for explaining the operation of generating a ramp unit with one symbol length. When both burst and lamp are off, switches SW1, S
Both W2 are open. In this state, "0" is supplied to the adder / subtractor 18, so the output IQ becomes "0".

First, in generating the ramp portion before the start of burst, first, at time t ₀ , the switch SW
1 is opened (OFF), and the switch SW2 is closed to the A side. In this case, since the switch SW1 is open, the output of the lamp ROM 15 is directly supplied to the vector synthesizer 9. In the ROM 15 for the lamp, “0” →
Since the data multiplied by the coefficient that changes with “1” is stored, the ramp unit that changes gradually from “0” to “1” until the time t ₁ is reached, that is, within the elapsed time of one symbol, is displayed. It is formed. After that, at time t ₁ , the switch SW2 is opened (OFF), the switch SW1 is closed to the A side, and the main part of the burst is created according to the burst data “1” supplied from the band limiting ROM 5.

Next, the ramp portion after the burst is completed is prepared.
You. First, time t after the burst ends In 2, the switch
H switch SW1 is closed to the A side as it is, and switch SW2
Is closed to the A side, and the adder / subtractor 18 is set to the subtraction operation.
You. In this case, at the beginning of the time of 1 symbol unit,
Data that is multiplied by a coefficient close to "0" from the ROM 15
Is output at time t_ThreeIs close to "1" at the end of
Since the data multiplied by the coefficient is output, the adder / subtractor 1
The subtraction result by 8 changes gently from "1" to "0"
A result similar to that obtained by multiplying by the coefficient is obtained.

As described above, in the ramp portion at the start portion, a response that changes from “0” to “1” is obtained over one symbol, and at the ramp portion at the end portion, “1” → “0”.
A response that changes with is obtained.

B-2.2 Symbol Length Ramp Generation Operation Here, FIG. 3 is a timing chart for explaining the operation of generating a 2-symbol length ramp section. The above-described operation is an operation in the case where the ramp unit has a length of 1 symbol, whereas the operation is as follows when the lamp unit has a length of 2 symbols. First, in the lamp unit before the start burst time t _a, the 1 symbol of the first half, the switch SW1 is opened and (off), closes switch SW2 to the B side. The B side of the switch SW2, since 1/2 circuit 16 is interposed, between the time t _a one symbol time t _b, the vector combiner 9, the lamp ROM15 "0" to
Data with an amplitude of "0.5" is supplied.

Next, in one symbol from time t _b to t _c ,
The switch SW2 is set to the B side as it is, the switch SW1 is closed to the B side, and the adder / subtractor 18 performs the addition operation. In this state, the adder / subtractor 18 stores 1/2 of the bandwidth limiting ROM 5
Is supplied, that is, "0.5" is supplied, and the ROM 15 for the lamp is supplied with data with an amplitude of "0" to "0.5". Therefore, the output amplitude of the adder / subtractor 18 is
It becomes "0.5"-"1.0".

After the elapse of one symbol, time t_cAt
Closes the switch SW1 to the A side and opens the switch SW2.
When released, the amplitude of "1" is output from the band limiting ROM 5
Data is supplied to the vector synthesizer 9,
A highly accurate output can be obtained in the main part. Then burst
In the generation operation of the ramp unit at the end, first, the time t
At d, the adder / subtractor 18 is set to the subtraction operation, and the first one
Switch SW1 is kept closed to the A side,
Close switch SW2 to side B. From band limiting ROM 5
Is supplied with the data of which the amplitude is "1".
Change from "0" to "0.5" output from the ROM 15 for use
The output of the adder / subtractor 18 is
An amplitude of “1” → “0.5” is obtained.

Then, in the latter one symbol, both the switches SW1 and SW2 are closed to the B side. ROM for band limitation
5 outputs the data of "0.5" through the 1/2 circuit 17, and the lamp ROM 15 similarly outputs 1
Data that changes from “0” to “0.5” is output via the / 2 circuit 16. Therefore, the output of the adder / subtractor 18 has an amplitude that changes from “0.5” to “0”. After the lamp is finished, both the switches SW1 and SW2 are opened and the output is set to "0".

As described above, in the ramp portion at the start portion, a response that changes from “0” to “1” is obtained over two symbols, and at the ramp portion at the end portion, “1” → “0”.
A response that changes with is obtained.

In the above-described embodiment, when the lamp part is made to operate with two symbols, the lamp ROM 15 is used.
From "0" to "0.5" via the 1/2 circuit 16.
The data up to is output. In other words, in other words, the data "0" to "0.5" may be stored in the lamp ROM 15 and the data may be directly used. In this case, since the 1/2 circuit can be deleted, the circuit configuration can be simplified. Further, in the above-described embodiment, the ROM 15 for lamps stores "0".
The data multiplied by the coefficient changing to "1" is stored, but the data multiplied by the coefficient changing from "1" to "0" is changed by changing the switching timing of the switches SW1 and SW2 and the adder / subtractor 18. May be stored.

[0027]

As described above, according to the present invention,
In order to limit the band of the data to be modulated and to make it burst, the band limiting data generating means generates band limiting data having a constant amplitude, and when the data is bursted, it is bursted. Ramp data having an amplitude change according to the transient response characteristic of the ramp section provided before and after the data is generated by the ramp data generating means, and the band limiting data generated by the band limiting data generating means and the ramp data generation Since the ramp data is generated before and after the burst data by adding and subtracting the ramp data generated by the means at a predetermined timing by the addition and subtraction means, a large-scale circuit such as a multiplier is unnecessary. Therefore, there is an advantage that the circuit scale can be reduced.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a ramp response circuit according to an embodiment of the present invention.

FIG. 2 is a timing chart for explaining an operation of creating a one-symbol lamp unit in the present embodiment.

FIG. 3 is a timing chart for explaining an operation of creating a 2-symbol lamp unit in the present embodiment.

FIG. 4 is a block diagram showing a configuration of a conventional lamp response circuit.

[Explanation of symbols]

 5 ROM for band limitation (data generating means for band limitation) 15 ROM for lamp (lamp data generating means) 18 Adder / subtractor (adding / subtracting means) SW1 switch (first switching means) SW2 switch (second switching means) 16 1 1/2 circuit (first 1/2 means) 17 1/2 circuit (second 1/2 means)

Claims (6)

[Claims] 1. A band limiting data generating means for limiting a band of modulated data and generating band limiting data having a constant amplitude for bursting, and bursting when the data is bursted. Ramp data generating means for generating ramp data having an amplitude change according to the transient response characteristic of the ramp part provided before and after the converted data, band limiting data generated by the band limiting data generating means, and A ramp response circuit comprising: an addition / subtraction unit that adds / subtracts the ramp data generated by the ramp data generation unit at a predetermined timing. 2. The ramp data generating means is from 0 to 1
2. The ramp response circuit according to claim 1, wherein the ramp response circuit generates ramp data multiplied by a coefficient that changes smoothly. 3. The adder / subtractor outputs the ramp data of the ramp data generating means as it is before starting the bursting of the data, and outputs the band limiting data of the band limiting data generating means at the time of burst. The output as it is, and after the bursting is completed, it operates as a subtractor for subtracting the band limiting data of the band limiting data generating unit from the ramp data of the ramp data generating unit. Lamp response circuit. 4. A first switching unit for selectively switching, at a predetermined timing, the output of the band limiting data generating unit between supplying and invalidating the adder / subtractor when bursting the data. In the bursting of the data, the output of the ramp data generating means is selectively switched to be supplied to the adder / subtractor or invalidated at a predetermined timing.
4. The lamp response circuit according to claim 1, further comprising: 5. A first unit which is provided at an output end of the band limiting data generating means and which halves the band limiting data.
½ means and second ½ means provided at the output end of the ramp data generation means for halving the ramp data, wherein the adder / subtractor bursts the data. Before the conversion is started, the ramp data output from the second 1/2 means is output as it is, and then the ramp data output via the second 1/2 means is used to output the first 1/1 / The band limiting data output via the two means is subtracted and output, the band limiting data of the band limiting data generating means is output as it is during the burst, and the second band limiting data is output after the bursting is completed. After the band limiting data output from the band limiting data generating unit is subtracted from the ramp data output via the second 1/2 unit, the data is output, and then is output via the second 1/2 unit. Lamp data before 2. The ramp response circuit according to claim 1, wherein the band limiting data output via the first 1/2 means is subtracted and output. 6. When bursting the data, at a predetermined timing, the output of the band limiting data generating means is directly supplied to the adder / subtractor or invalidated,
Alternatively, a first switching means for selectively switching whether to supply to the adder / subtractor via the first ½ means, and a ramp data generation means for the ramp data generation means at a predetermined timing when bursting the data. Second switching means for selectively switching whether the output is directly supplied to the adder / subtractor, invalidated, or supplied to the adder / subtractor via the second 1/2 means. The lamp response circuit according to claim 5, wherein: