JPH0922364A - Method and device for verifying program in multitask system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method and a device for verifying program in multi-task system with which the processing states of respective processing functions consisting of a specified task program of a multitask system are verified and a task program for enabling efficient processing can be generated by using the verified results. SOLUTION: At a task scheduler 24, the processing address related to the specified task program is stored in an address buffer 26 and that processing address is compared with the addresses of processing functions stored in a map file 32 so that the number of times of using the respective processing functions for the specified task program can be counted and a histogram can be prepared later. Then, based on the histogram, the correction of the like of the efficient task program is performed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a program verification method and apparatus in a multitask system for verifying the processing state of a specific task program and providing information that can be used for improving the processing efficiency of the task program.

[0002]

2. Description of the Related Art Nowadays, the operation of a controlled object is complicated,
The operation processing has come to be performed by multitask processing using a task scheduler. In this case, the task scheduler performs, for example, a process of switching task programs at predetermined time intervals.

By the way, when the processing time of a specific task exceeds the time defined as the specification, the excess time may affect other tasks and the desired operation by the controlled object may become impossible. There is. Therefore, there is a demand for a means capable of optimizing the processing time by finding and correcting the processing function in the task program having such a defect.

As such means, the ICE is conventionally connected to a control device for performing multitask processing and monitors the processing state by the CPU of the control device.
(In-Circuit Emulator) has been developed.

However, in the case of the ICE, the CPU
Although it is possible to monitor all the processing states of the task, it is impossible to cut out the processing state of a specific task and verify the operation state of the task program. Therefore, it is extremely difficult to quickly perform work such as modification of the task program based on the obtained information. In addition, the IC
Since E must be connected to the control device, there is a disadvantage that the work becomes complicated.

On the other hand, a software monitoring device for monitoring the execution state of a specific task program and measuring its execution time is disclosed in Japanese Utility Model Laid-Open No. 63-151050. However, in this conventional technique, although it is possible to monitor the time required to process a specific task program, it is not possible to monitor the time required to process each processing function that constitutes the task program. .

[0007]

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and verifies the processing states of individual processing functions constituting a specific task program in a multitask system, and verifies the verification. An object of the present invention is to provide a program verification method and device in a multi-task system that can create a task program that enables efficient processing using the results.

[0008]

To achieve the above object, the present invention provides a step of designating a task program to be verified, a step of executing each task program by multitask processing, and In the task program, a step of holding a processing address of a specified task program and each processing function related to the held processing address are compared with an address of a processing function forming the task program and the processing address. And a step of obtaining the frequency of use of each of the retrieved processing functions.

Further, the present invention provides a task designating means for designating a task program to be verified, a task switching means for switching the execution state of each task program, and a task program designated among the running task programs. Processing address holding means that holds the processing address of the processing program, processing function address holding means that holds the address of the processing function that constitutes the task program, and the processing address and the address of the processing function are compared. Search means for searching the processing function,
Frequency calculating means for calculating the frequency of use of the retrieved processing function.

In the present invention, after the task program to be verified is designated, multitask processing is executed and only the processing address related to the task program is held. Then, the processing function that constitutes the task program is searched from the held processing address, and the usage frequency of the processing function is obtained, whereby the processing function that affects the processing time of the task program can be specified. . Therefore, it is possible to easily reduce the processing time by the task program by reducing the processing function as needed or replacing it with another processing function.

[0011]

BEST MODE FOR CARRYING OUT THE INVENTION As shown in FIG. 1, a multitask system 10 according to an embodiment of the present invention includes a controller 14 for controlling the operation of a controlled object 12 in accordance with a predetermined task program, and verification of the task program. And an aggregating device 16 for performing. The control device 14 is a CPU
18, an application task processing unit 20 that processes a plurality of task programs, a task scheduler 24 (task switching unit) that performs a switching process of each task program, and a specific task that is processed by the application task processing unit 20. An address buffer 26 (processing address holding means) that holds a processing address of a program and a console task processing unit 28 that performs data input / output processing with the aggregating device 16 are provided.

On the other hand, the totaling device 16 includes an input unit 30 (task designating means) for supplying designated number data of a specific task to a console task processing unit 28 constituting the control device 14, and each constituting each task program. A map file 32 (processing function address holding means) holding the start address of the processing function is compared with the processing address held in the address buffer 26 and the function search unit 34 for searching the used processing function. (Search method)
And a search result file 3 that holds the search results of processing functions
6, a histogram creation unit 38 (frequency calculation means) that creates a histogram of the processing function from the search results, and a display unit 40 that displays the histogram and the like. The totaling device 16 can be composed of, for example, a personal computer.

Next, a program verification method in the multitasking system 10 configured as above will be described.

Prior to the verification, as shown in FIG. 2, the processing functions C, B, D, A, and E that make up each task program.
... and its head addresses c, b, d, a, e ... Are stored in the map file 32.

Therefore, as shown in FIG. 3, the operator inputs the task number to be verified through the input unit 30 of the totaling device 16 (step S1). According to the input of the task number, the console task processing unit 28 displays a measurement start message on the display unit 40 of the aggregating device 16 (step S2), sets the task number in the task scheduler 24 (step S3), and performs the measurement. Pointer to 0
(Step S4).

After the above preparation is completed, the CPU 18
Under the control of the task scheduler 24, the operation control of the controlled object 12 by the control device 14 is started. In this case, the CPU 18 operates the controlled object 12 by instructing the application task processing unit 20 to process the task program selected by the task scheduler 24.

On the other hand, the task scheduler 24 manages the operation of the CPU 18 based on the flowchart shown in FIG. That is, the task scheduler 24 sets the CPU 18 in the interrupt disabled state and updates the operation counter (step S10) every time a predetermined time elapses, and then saves the environment of the task program currently being executed (step S11). Next, the task program to be executed next is determined (step S12).

Here, the task scheduler 24 determines whether or not the currently executed task matches the task specified by the task number to be verified set by the worker in step S1 (step S13). ) If they match, it is confirmed that the measurement pointer is less than 500 (step S14), and the execution address of the task program currently being executed is stored in the address buffer 26 (step S15).

Then, after incrementing the measurement pointer (step S16), the environment of the task program determined in step S12 is loaded into the CPU 18 (step S17). The CPU 18 instructs the application task processing unit 20 to process the loaded task program, and causes the operation of the controlled object 12 to continue. The operation of storing the execution address to be verified in the address buffer 26 is repeated until the measurement pointer reaches 500.

Next, when the measurement work of the specific task is completed, the operator instructs the display unit 30 to display the measurement result. In this case, in the flow chart shown in FIG.
If the measurement pointer held at is 500 (step S20), the display pointer is set to 0 (step S21), and then the contents of the address buffer 26 are displayed on the display unit 4.
The file is transferred to the totaling device 16 while being displayed at 0 (steps S22, S23, S24). If the measurement pointer is less than 500, the control device 14 is measuring the task program, so that "measurement in progress" is displayed and file transfer is not performed (step S25).

When the file transfer to the totalizing device 16 is completed, the processing content of the specific task program is verified according to the flowchart shown in FIG.

First, the map file 32 in which the start addresses of the processing functions related to the controlled object 12 are stored, and the control device 1
The address data file which is the contents of the address buffer 26 transferred from No. 4 is designated (step S3
0). Next, the map file 32 stored as shown in FIG. 2 is read (step S31), and the processing functions C, B, D, A, E ...
Are rearranged in the order of the addresses c, b, d, a, e ... (Step S32, see FIG. 7). Then, the function search unit 3
4, the processing function is specified by comparing the address of the map file 42 shown in FIG. 7 with the address of the address data file. For example, in the map file 42 shown in FIG. 7, if the address of the address data file is in the range of a to (b-1), the address is related to the processing function A and b to (c-1). If it is within the range, it can be determined that the address is related to the processing function B. Next, the number of times each of the specified processing functions is used is counted (step S33), and the function table 44 shown in FIG. 8 is created. This function table 44
Are stored in the search result file 36.

Next, in the histogram creating section 38,
The function table 44 is rearranged in the order of the count number (step S34), and based on the rearranged function table 44, as shown in FIG. 9, a histogram representing the number of times each processing function is used is created. This histogram is displayed on the display unit 40 (step S35).

Using the histogram displayed as described above, for example, the processing contents are checked from the processing function at the bottom of FIG. 9 that is used a lot and the number of uses is reduced, or the number of uses is decreased. The processing time by the task program can be shortened by substituting the correction with another processing function that can be performed. As a result, the overall processing efficiency of the multitask system 10 can be improved.

[0025]

As described above, according to the present invention, the processing states of the processing functions that make up a specific task program in a multi-task system are verified, and it is easy and appropriate to correct the task program from the usage state of each processing function. Therefore, it is possible to create a program capable of efficient processing.

[Brief description of drawings]

FIG. 1 is a configuration block diagram of a multitasking system of the present embodiment.

FIG. 2 is an explanatory diagram of a map file.

FIG. 3 is a processing flowchart in a console task processing unit.

FIG. 4 is a processing flowchart in a task scheduler.

FIG. 5 is a processing flowchart in a console task processing unit.

FIG. 6 is a processing flowchart in the tallying device.

FIG. 7 is an explanatory diagram of a map file.

FIG. 8 is an explanatory diagram of a function table.

FIG. 9 is an explanatory diagram of a histogram of a processing function.

[Explanation of symbols]

10 ... Multi-task system 12 ... Control object 14 ... Control device 16 ... Aggregation device 24 ... Task scheduler 26 ... Address buffer 32 ... Map file 34 ... Function search unit 36 ... Search result file 38 ... Histogram creation unit 40 ... Display unit

Claims (2)

[Claims] 1. A step of designating a task program to be verified, a step of executing each task program by multitask processing, and holding a processing address of the designated task program among the task programs being executed. A step, a step of searching each processing function related to the stored processing address by comparing the address of the processing function forming the task program with the processing address, and a usage frequency of each of the searched processing functions A method for verifying a program in a multi-task system, which comprises the steps of: 2. A task designating means for designating a task program to be verified, a task switching means for switching the execution state of each task program, and a processing address of a designated task program among the running task programs. Processing address holding means for holding, processing function address holding means for holding the address of the processing function that constitutes the task program, comparing the processing address and the address of the processing function, and the processing function related to the processing address A program verification device in a multi-task system, comprising: a search unit that searches for the search function; and a frequency calculation unit that calculates the usage frequency of the searched processing function.