JPH09219644A - A/d conversion method and a/d converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To minimize power consumption at A/D conversion by making the number of conversion bits at the A/D conversion variable so as to optimize the A/D conversion accuracy corresponding to the conversion accuracy requirements of a signal. SOLUTION: A D/A converter 3 coverts a reference voltage code signal 103 and gives the converted signal to a voltage comparator 1 at a reference voltage signal 104. The comparator 1 compares the signal 104 with an analog input signal 101 being a measurement object and provides an output of a comparison result signal 102 to a control circuit 4. The circuit 4 reflects the content of the signal 102 onto the most significant bit of a register 2. An coincidence detector 5 compares the value of a conversion accuracy designation signal 108 with that of a comparison operation count 107 being the count of a counter built in the circuit 4. The comparison operations are repeated and the circuit 4 confirms each bit of the register 2 sequentially in the order of higher-significant bits. Then a detector 5 compares the value of the signal 108 with that of the count 107 and when they are equal, the detector 5 provides the output of a conversion end signal 109 to the circuit 4. Then the circuit 4 interrupts the comparison and provides the output of the content of the register 2 as a conversion result 106.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an A / D converter, and more particularly to a technique for reducing power consumption of the A / D converter.

[0002]

2. Description of the Related Art Conventionally, an A / D converter as described in, for example, Japanese Patent Laid-Open No. 6-85667 has been proposed.

FIG. 3 is a block diagram schematically showing the configuration of these conventional successive approximation type A / D converters. In FIG. 3, reference numeral 1 is a voltage comparator that compares the magnitude of an analog input signal input from the outside with the reference voltage signal output from the internal D / A converter, and outputs the comparison result as a digital value to the control circuit. 2 is a register for storing the reference voltage code signal generated based on the result of the voltage comparator 1, 3 is a D / A converter for receiving a digital value from the register 2 and generating the reference voltage signal, 4 is a A control circuit 101 that controls the operations of the voltage comparator 1 and the D / A converter 3 by an external conversion start signal, receives the comparison result from the voltage comparator 1, and determines the value of each bit of the register 2, An analog input signal input from the outside, 102 is a comparison result signal output from the voltage comparator 1 to the control circuit 4, and 103 is a reference that is a basis of the reference voltage signal output from the register 2 to the D / A converter 3. Voltage De signal, 104 reference voltage signal generated from the D / A converter 3, conversion start signal 105 for instructing the start of the transformation from the outside (not shown) to the control circuit 4, 10
Reference numeral 6 is a conversion result output output from the register 2.

The operation of this A / D converter is as follows.

Conversion start signal 1 from the outside (not shown)
With the input of 05, the control circuit 4 clears all the contents of the register 2 consisting of, for example, 4 bits to "0" and puts "1" in the most significant bit of the register 2. Then, “1000” is output from the register 2 to the D / A converter 3, and a voltage corresponding to that is generated in the D / A converter 3.

The control circuit 4 operates the voltage comparator 1,
Reference voltage 104 from D / A converter 3 and input signal 101
Are compared, and the comparison result signal 102 of the result is compared with the register 2
To reflect. That is, the reference voltage 104 and the input signal 101
When the input signal 101 has a higher voltage, "1" is output, and when the input signal 101 has a lower voltage, "0" is output and the most significant bit is stored and set. This operation is repeated from the most significant bit to the least significant bit, and the storage of all the bits of the register 2 is confirmed. When the storage confirmation of all the bits is completed, the control circuit 4 outputs the value of the register 2 to the conversion result output 106. Output as.

[0007]

[Problems to be Solved by the Invention]
Since the D converter is configured as described above, the conversion bit number is always constant depending on the bit number of the register 2.

Generally, at the same conversion speed, an A / D converter having a higher conversion bit number consumes more power and requires a longer conversion time.

However, depending on the application that requires A / D conversion, the required A of the input signal can be obtained.
In some cases, the A / D conversion accuracy may be low. In this case, in the conventional A / D converter, since the conversion bit number is fixed, the conversion bit number satisfying the required maximum accuracy is set. An A / D converter is required.

Therefore, even if the conversion accuracy required at that time is not high, there is a problem that the maximum power and time are consumed during the conversion.

Further, in the case of a system having a large number of signals for conversion, a switch for selecting and outputting one signal from a large number of input signals is connected to the input of the A / D converter, and a large number of input signals are outputted. Quantization is performed by one A / D converter, but even if the A / D conversion accuracy required for each signal is different, the conversion bit number that satisfies the highest conversion accuracy is always used. Because I needed an A / D converter to have,
Even for a signal that does not require high conversion accuracy, there is a problem in that maximum power and time are consumed during conversion.

The present invention has been made to solve the above-mentioned problems, and the number of conversion bits at the time of A / D conversion is made variable so that the A / D conversion accuracy depends on the required conversion accuracy of the signal. The purpose is to minimize the power consumption at the time of A / D conversion by optimizing.

[0013]

According to a first aspect of the present invention, there is provided an A / D converter including: a D / A converting means for converting a digital signal for generating a reference voltage into an analog signal; and the D / A converting means. In comparison with the storage means for storing a value for outputting a digital signal, the analog voltage to be converted is compared with the reference voltage generated by the D / A conversion means, and the comparison result is outputted as a digital value. And a control means for controlling the operation of the voltage comparator and the D / A converter by reflecting the comparison result of the voltage comparison means in the storage of the storage means. Counter means for counting, a conversion precision value input section, and a coincidence detection means for detecting coincidence between the value of the counter means and the input conversion precision value. detection Exit converted by Rukoto, an A / D converter is characterized by outputting the stored contents of said storage means as the conversion result.

According to another aspect of the A / D conversion method of the present invention, a start detection step of detecting the start of conversion, an initialization step of resetting a register section for storing a digital value and a counter section for counting the number of conversions, and A register setting step of setting a specific bit of the register section, and D for converting the digital value of the register section into an analog signal
/ A conversion step, a comparison step of comparing the analog signal converted in the D / A conversion step with an analog signal to be converted, a reflection step of reflecting the comparison result of the comparison step in a register section, and a counter section The addition step of adding the counter values of the above, a match detection step of repeating the register setting step, the D / A conversion step, the comparison step, and the reflection step until a match between the conversion accuracy and the counter value is detected, and the match detection step. And an output step of outputting the value of the register section as a conversion result by detecting a match with the A / D conversion method.

An A / D converter according to a third aspect of the present invention is the first aspect of the present invention.
In the A / D converter described in (1), a plurality of input sections for receiving a plurality of external analog signals, an input signal switching means for selectively outputting one analog signal from each of the input sections, and the input signal. Precision register means for storing precision information corresponding to each input part of the switching means, means for outputting an analog signal of the input signal switching means and further corresponding precision information from the precision register means by an input control signal. It is an A / D converter characterized by having.

An A / D conversion method according to a fourth aspect is the A / D conversion method according to the second aspect, wherein a selection step of selecting one from a plurality of analog signals and a selection step in the selection step are performed. And a step of outputting accuracy information corresponding to the analog signal as an analog signal for conversion, and the A / D conversion method.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION

(Embodiment 1) FIG. 1 shows an A / A circuit according to a first embodiment of the present invention.
It is a block diagram which shows the structure of a D converter.

In FIG. 1, components corresponding to those in FIG. 3 are designated by the same reference numerals. In FIG. 1, reference numeral 1 is a voltage comparison that compares the magnitude of an analog input signal input from the outside with the reference voltage signal output from the internal D / A converter, and outputs the comparison result as a digital value to the control circuit. It outputs "1" when the voltage of the analog input signal is higher than the reference voltage signal, and outputs "0" when the voltage is low.

Reference numeral 2 is a register for storing the reference voltage code signal generated based on the result of the voltage comparator 1.
It also works as a means for sending a signal of the voltage generated by the / A converter.

Reference numeral 3 is a D / A converter which receives a digital value from the register 2 and generates a reference voltage signal.

Reference numeral 4 denotes a control circuit for controlling each part, which is a conversion start signal 1 given from the outside not shown.
In response to 05, the conversion is started by controlling the operations of the voltage comparator 1, the D / A converter 3, and the register 2, and the conversion is completed by receiving the conversion end signal 109 from the coincidence detector 5 described later. The control is performed to terminate and determine the value of each bit of the register 2 and output it. The control circuit 4 has a built-in counter capable of counting the number of bits of the register 2 and is reset by a conversion start signal to count the number of conversions.

Reference numeral 5 compares the comparison operation number count signal from the counter built in the control circuit 4 with the comparison operation number set value by the conversion precision designation signal, and outputs a conversion end signal to the control circuit 4 when they match. Detector.

Reference numeral 101 is an analog input signal input from the outside, 102 is a comparison result signal output from the voltage comparator to the control circuit, 103 is output from the register 2 to the D / A converter 3, and is the basis of the reference voltage signal. Is a reference voltage code signal, 104 is a reference voltage signal generated from the D / A converter 3, 105 is a conversion start signal for instructing the control circuit to start conversion from the outside, and 106 is a conversion result output from the register 2. The output, 107 is the current count value of the number of comparisons from the control circuit 4, 108 is the conversion system designation signal for transmitting the comparison number setting value satisfying the required conversion accuracy from the outside to the coincidence detector, and 109 is the coincidence This is a conversion end signal from the detector 5.

Next, the operation will be described with reference to FIG.

First, a comparison count setting value, for example, 3 is input to the coincidence detector 5 through a conversion accuracy designation signal 108 from the outside (not shown).

Next, by inputting the conversion start signal 105,
The control circuit 4 clears the built-in counter and register 2 to "0" and starts conversion (S1, S2, S
3).

The control circuit 4 first sets "1" to the most significant bit which is the first specific bit of the register 2. The specific bit here corresponds to a bit obtained by subtracting the value of the counter from the number of bits of the register 2, for example, 4 bits, and sequentially moves according to the counter value (S4).

The register 2 in which "1" is assigned to the most significant bit by the control circuit 4 sends the reference voltage code signal 103 which is the value of the register 2 to the D / A converter 3.

The D / A converter 3 converts the reference voltage code signal 103 to generate a reference voltage (S5).

The voltage generated by the D / A converter 3 is input to the voltage comparator 1 as the reference voltage signal 104.

In the voltage comparator 1, the reference voltage signal 104 obtained from the D / A converter 3 is compared with the value of the analog input signal 101 to be measured (S6), and the analog input signal is compared with the reference voltage signal. When the voltage is high, "1" is output to the control circuit 4 as a comparison result signal when the voltage is low.

The control circuit 4 reflects the contents of the comparison result signal in the most significant bit of the register 2. If the voltage of the analog input signal is lower than that of the reference voltage signal, "0" is stored in the most significant bit of the register 2 (S
8, S7), and the control circuit 4 increments the value of the built-in counter by 1 as the completion of one comparison (S).
9).

In the coincidence detector 5, the conversion precision designation signal 10
The value of 8 is compared with the comparison operation count value 107 which is a counter value built in the control circuit 4 (S1).
0).

In this case, while "3" is input from the conversion precision designation signal 108, the counter value is 1, and the conversion is further continued.

Since the conversion end signal 109 from the coincidence detector 5 has not been generated, the control circuit 4 causes the register 2
"1" is substituted for the second bit from the upper bit, which is the bit next to (S4).

At this time, since the voltage of the analog input signal is lower than that of the reference voltage signal in the first comparison, "0100" is set in the register 2. If the voltage of the analog input signal is higher than that of the reference voltage signal, the content of the register 2 becomes "1100".

By repeating this comparison operation, the control circuit 4 determines the register 2 in order from the upper bit. At that time, the coincidence detector 5 compares the conversion precision designation signal 108 with the comparison operation number count value 107, and outputs a conversion end signal 109 to the control circuit 4 if they match. The control circuit 4 is
By receiving the conversion end signal 109, the repetition of the comparison operation is interrupted and the value of the register 2 is converted to the conversion result 10
It is output as 6 (S11).

At this time, the register 2 is filled with values from the upper bits by the same number of bits as the number of repetitions designated by the conversion precision designation signal 108.

If high A / D conversion accuracy is required, the conversion accuracy designation signal 108 is sent from the outside to the register 2,
Set the number of comparison operations as many as the number of bits of the D / A converter.

As a result, all the bits of the register 2 are obtained by operating similarly to the conventional A / D converter. The power consumption / time at this time is the same as the conventional one. On the other hand, if the A / D conversion accuracy may be low, the conversion accuracy designation signal 10
The number of comparison operations, which is less than the number of bits of the register 2 and the D / A converter, is set to 8. As a result, the number of comparison operations is reduced, and only the bits corresponding to the number of comparisons are obtained in the register 2. Therefore, in this case, although the A / D conversion output accuracy is inferior, the power consumption and time can be reduced as much as the number of comparison operations decreases.

(Embodiment 2) FIG. 2 shows a second embodiment of the present invention.

In FIG. 2, components corresponding to those shown in FIG. 1 are designated by the same reference numerals, and their description will be omitted.

In FIG. 2, 6 is an input signal switch for selecting and outputting one signal from an input signal group by an input control signal, and 7 is a precision register for storing a precision designating signal set for each input signal. A group 8 is a precision designation signal switcher for selecting and outputting one signal from the precision designation signals stored in the precision register group 7 according to an input control signal, 11
0 is a group of analog input signals input from the outside, 111
Is an input selection signal for selecting a signal to be converted from the input signal group.

Next, the operation will be described with reference to FIG.

The number of comparison operations satisfying the conversion accuracy required for each signal is stored in advance in the register of the control register group 7 corresponding to each signal of the input signal group 110. First, the input signal switch 6 selects one from the input signal group 110 by the input selection signal 111 (S1).
2), output as the analog input signal 101 (S1
3).

Further, as with the input signal switch 6, the precision designation signal switch 8 is supplied with the input selection signal 111 as a selection signal. Therefore, the accuracy designation signal switch 8 is
A precision designation signal corresponding to the selected input signal is selected from the outputs of the precision register group 7 and output to the coincidence detector 108 (S14).

After that, the control circuit 4 performs the same operation as that of the first embodiment to perform the conversion. Here, the precision designation signal 108 is
Since it is switched and output for each selected input signal,
Conversion is possible with the precision specified for each input. Therefore, when selecting one signal from multiple signals and performing A / D conversion,
It is possible to cope with the case where the conversion accuracy of each input signal is different, and it is possible to reduce the power consumption at the time of conversion of an input having low conversion accuracy.

Further, according to the above embodiment, when the number of comparison operations is set low in the conversion accuracy signal 108, the conversion accuracy output is low, but the number of operations is reduced, so that the number of conversion processing operations per time can be increased. . Therefore, the conversion process can be performed at a higher speed according to the required conversion accuracy.

[0049]

According to the first and second aspects of the present invention, there is provided a conversion precision designating signal for designating the number of comparison operations, and a coincidence detector for detecting that the number of comparison operations is equal to the setting by the conversion precision designating signal. Since the control circuit for stopping the repetition of the comparison operation by the output from the coincidence detector is provided,
The conversion accuracy of the / D converter can be arbitrarily set, and when the required conversion accuracy is high, the conventional power consumption can be used, and when the conversion accuracy is low, the power consumption can be reduced. The effect is obtained.

According to the third and fourth aspects of the invention, it is possible to efficiently set the conversion accuracy required for the selected analog signal with respect to the plurality of analog signals with one A / D converter. Therefore, it is possible to obtain the effect that the conventional power consumption can be used when the required conversion accuracy is high, and the lower power consumption can be operated when the conversion accuracy is low.

[Brief description of drawings]

FIG. 1 is a block diagram (No. 1) showing a configuration of an A / D converter of the present invention.

FIG. 2 is a block diagram (No. 2) showing the configuration of the A / D converter of the present invention.

FIG. 3 is a block diagram showing a configuration of a conventional A / D converter.

FIG. 4 is a flowchart (1) showing the operation of the present invention.
It is.

FIG. 5 is a flowchart (part 2) showing the operation of the present invention.
It is.

[Explanation of symbols]

 1 Voltage Comparator 2 Register 3 D / A Converter 4 Control Circuit 5 Match Detector 6 Input Signal Switcher 7 Precision Register Group 8 Precision Designated Signal Switcher 101 Analog Input Signal 102 Comparison Result Signal 103 Reference Voltage Code Signal 104 Reference Voltage Signal 105 Conversion start signal 106 Conversion result 107 Comparison operation count value 108 Conversion accuracy designation signal 109 Conversion end signal 110 Input signal group 111 Input selection signal

Claims (4)

[Claims] 1. A D / A conversion means for converting a digital signal for generating a reference voltage into an analog signal, and the D / A conversion means.
A storage means for storing a value for outputting a digital signal to the A conversion means, an analog voltage to be converted, and the D /
A voltage comparing unit that compares the reference voltage generated by the A converting unit and outputs the comparison result as a digital value; and a voltage comparator that reflects the comparison result of the voltage comparing unit in the storage of the storage unit, In an A / D converter having a control means for controlling the operation of the D / A converter, a counter means for counting the number of conversions, an input section for inputting a conversion accuracy value, and a value for the counter means are inputted. A match detection unit that detects a match with the conversion accuracy value, and ends the conversion by detecting a match with the match detection unit,
An A / D converter which outputs the contents stored in the storage means as a conversion result. 2. A start detection step for detecting the start of conversion, an initialization step for resetting a register section for storing a digital value and a counter section for counting the number of conversions, and a register set for setting a specific bit of the register section. A D / A conversion step of converting a digital value of the register unit into an analog signal;
A comparison step of comparing the analog signal converted in the conversion step with the converted analog signal; a reflection step of reflecting the comparison result of the comparison step in the register section; and an addition step of adding the counter value of the counter section, A match detection step in which the register setting step, D / A conversion step, comparison step, and reflection step are repeated until a match between the conversion accuracy and the counter value is detected,
And a step of outputting a value of the register section as a conversion result by detecting a match in the match detecting step. 3. The A / D converter according to claim 1, wherein a plurality of input sections for receiving a plurality of external analog signals and an input for selectively outputting one analog signal from each of the input sections. A signal switching means, a precision register means for storing precision information corresponding to each input part of the input signal switching means, an analog signal of the input signal switching means by an input control signal, and a precision corresponding to the precision register means. An A / D converter having means for outputting each of the information. 4. The A / D conversion method according to claim 2, wherein a selection step of selecting one from a plurality of analog signals and accuracy information corresponding to the analog signal selected in the selection step are converted. A / D conversion method, which comprises a step of outputting as an analog signal.