JPH09204205A - Program control system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To perform high-reliability program control, to preserve error information and to easily investigate the factor of destruction by continuously executing a destroyed control program through self-recovery when the control program is destroyed. SOLUTION: When any error is generated, it is discriminated whether the contents of control program in a program memory 3 are destroyed or not by comparing the contents of control programs within a prescribed range including an error generating address in the program memory 3 and a backup memory 5. Then, an error recovery processing means (program memory 4) is provided for restarting the execution of program control after the contents of the control program in the program memory 3 are recovered when they are destroyed and at the time of error generation, the runaway and stop of program control are prevented.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a control system used for program control of a highly public system such as a plan for steel and papermaking or a vehicle-mounted device, and in particular,
The present invention relates to a program control system capable of preventing a system runaway or system down due to a program abnormality and easily finding the cause of the abnormality.

[0002]

2. Description of the Related Art As a program control system, it is common practice to sequentially read out and execute the instructions of a control program stored in a program memory to perform scheduled program control.

When the content of the control program stored in the program memory is destroyed for some reason, abnormal processing is performed when the control program with the destroyed content is executed, and in some cases, the system goes out of control, The system may go down.

Further, the destruction of the control program cannot be detected, and it takes time to investigate the cause of when the abnormality occurs and why the abnormality occurs, and quick restoration is difficult, and system runaway occurs. In some cases, system down has a great impact on system users.

[0005]

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and an object of the present invention is to destroy a content of a control program when it is destroyed during execution of program control. To provide a program control system capable of self-restoring the contents of a control program, continuously executing program control, performing highly reliable program control, saving error information, and easily investigating the cause of destruction. It is in.

[0006]

A program control system of the present invention includes a program memory in which a control program consisting of a plurality of unit programs is stored, a backup memory in which the same control program as the control program is stored, and the program. When an error occurs, the CPU that sequentially reads the control program from the memory and executes the program control is compared with the contents of the control program in a predetermined range including the error occurrence address of the program memory and the backup memory to compare the contents of the program memory. Error recovery processing means for determining whether or not the contents of the control program are broken, and if the contents are broken, the contents of the control program in the predetermined range of the program memory are restored, and then the execution of the program control is restarted. , Program at the time of error To prevent a runaway and stopping of your. (Claim 1) Further, there is provided means for copying the control program stored in the program memory to the backup memory when the system is activated. (Claim 2) Further, the error recovery processing means holds an error occurrence address when an error is detected during execution of the program control, and controls a predetermined range including the error occurrence address of the program memory and the backup memory. When the contents of the programs do not match, a means for restoring the contents of the control program in the predetermined range of the program memory with the contents of the backup memory is provided. (Claim 3) Further, when the error occurrence address is the same as the previous error occurrence address, the error recovery processing means restarts the execution of the program control from the beginning of the unit program including the error occurrence address to generate the error occurrence address. Is different from the previous error occurrence address, a means for restarting the execution of the program control from the error occurrence address is provided.
(Claim 4) Further, the error recovery processing means stores error information such as an error occurrence address, an error occurrence count, a status of the CPU at the time of error occurrence, an error occurrence date and time, a repair program content, and a retry count. Equipped with a trace memory to notify an external device such as a display device to facilitate analysis of the cause of error. (Claim 5)

[0007]

FIG. 1 shows an embodiment of a program control system of the present invention. FIG. 1 shows a hardware configuration of the present invention. Reference numeral 1 is a C which controls the entire system.
PU, 2 is a system memory for storing an operation program, 3 is a program memory for storing a control program consisting of a plurality of functional unit programs, 4 is a program memory for storing an error recovery processing program, and 5 is a program memory 3. A backup memory in which a copy of the control program is stored, 6 is a trace memory that stores the contents of registers of CPU 1 and error information (details will be described later) when an error occurs, 7 is a calendar that determines the current date and time, and 8 is an external device. Is an interface for transmitting and receiving information to and from these devices, and these devices are connected by a CPU bus 9. The interface 8 is the input / output device 10
Information is exchanged with an external device such as the display device 11 or the like.

The CPU 1 operates on the basis of the operation program stored in the system memory 2, and when the apparatus is activated, it copies the control program stored in the program memory 3 to the backup memory 5. After that, the program control is started, and the CPU 1 executes the program command based on the control program stored in the program memory 3, and exchanges data with the input / output device 10 through the interface 8 to perform the program control. .

When an error occurs during the execution of the program control, the CPU 1 activates the error recovery processing program stored in the program memory 4, and the error occurrence address, the value of each register of the CPU 1 and the date and time of the calendar 7 are traced in the trace memory 6. The contents of the control program in a predetermined range including the error occurrence address of the program memory 3 and the backup memory 5 are compared with each other to determine whether the contents of the program are broken or not. After repairing, resume program control execution. As a result, it is possible to prevent runaway and stop of program control when an error occurs.

The trace memory 6 is, as shown in FIG.
8 memories 6-1 to 6-8 and 2 counters 6-9,
6-10 is an address memory that stores the previous error occurrence address, 6-1 is a storage number memory that stores the number of saves of error information, and 6-3 is a storage location of the latest error information. An index memory to point to, 6-4 is a maximum registration number memory for storing the maximum number of times error information is stored. 6-5 is a destruction status storage memory, which is an address memory 6-51 for storing an error occurrence (detection) address,
Each register value (status) of CPU1 when an error is detected
A register memory 6-52 for storing the data, a calendar memory 6-53 for storing the date and time when the error is detected, and an address memory 6-54 for storing a predetermined range of addresses before and after the error occurrence address as the inspection target address. An inspection data memory 6-55 for storing the contents of the program memory 3 at the inspection target address and a backup data memory 6-56 for storing the contents of the backup memory 5 at the inspection target address. 6-6 is an address memory for storing the start address of the control program stored in the program memory 3, 6-7 is an address memory for storing the start address of the control program stored in the backup memory 5, and 6-8 is a control program Is a size memory that stores the size of the. 6-9 is an instruction retry counter for storing the number of times the instruction of the error occurrence address is reexecuted, 6
-10 is a task retry counter that stores the number of times the unit program including the error occurrence address was re-executed.

In the above configuration, when the program control system is activated, the processing shown in FIG. 3 is started based on the operation program stored in the system memory 2. First, the control program stored in the program memory 3 is copied to the backup memory 5, and the start address of the control program in the program memory 3, the start address of the control program in the backup memory 5, and the size of the control program are stored in the trace memory 6. A backup process 21 for storing in the address memories 6-6 and 6-7 and the size memory 6-8 is performed. Next, the program control activation process 22 is started, and the normal program control process 23 for sequentially reading and executing the program instructions of the control program stored in the program memory 3 is started. In this case, if no error occurs, the unit programs divided into functional units are sequentially read out and executed through the error determination processing 24. When an error occurs, the error recovery process 25 is activated through the error determination process 24, the error content is investigated based on the error recovery program stored in the program memory 4, and if the program is abnormal, the backup memory 5 is controlled. Refers to the program, repairs it, and continues program control execution.

The processing contents of the error recovery processing 25 are shown in FIG. When an error is detected, an error data saving process 25-1 for storing the error occurrence status in the trace memory 6 is first performed. That is, the contents of the saved number memory 6-2 and the index memory 6-3 are counted up, the error occurrence address is stored in the address memory 6-51, and the contents of all the registers of the CPU 1 are stored in the register memory 6-52. ,
The date / time of the calendar 7 at that time is stored in the calendar memory 6-53. Further, the addresses in a predetermined range before and after the error occurrence address are stored in the address memory 6-54 as the inspection range address, and the control program corresponding to this inspection range address is extracted from the program memory 3 and the backup memory 5 respectively and the inspection data is extracted. Store in memory 6-55 and backup data memory 6-56.

The contents of the saved number memory 6-2 and the index memory 6-3 are set to 0 by default, and the contents of the saved number memory 6-2 indicate the cumulative number of error occurrences. Contents are destruction state storage memory 6
-Indicates the storage address of the latest information of 5. If the contents of the index memory 6-3 exceeds the maximum registration number memory 6-4, it is initialized to 0. The address of the control program extracted from the backup memory 5 is determined by calculation from the above-mentioned inspection range address with the head address stored in the address memory 6-7 as a reference.

In FIG. 2, the maximum registration number memory 6-4 has a value of 8,
This is an example in which the number of errors in the storage number memory 6-2 is 10 and the value in the index memory 6-3 is 1, and 8 pieces of error information of the 3rd to 10th times are stored. It also shows the case where the error occurrence address is the same as the previous error occurrence address.
The address memory 6-51 stores the same address (12345678H) as that of the address memory 6-1.
An example in which addresses in the specified range including the error occurrence address (12345670H to 1234569FH) are stored in 4 and the control program corresponding to the addresses in the specified range is stored in the inspection data memory 6-55 and the backup data memory 6-56. Is.

Next, the latest data stored in the inspection data memory 6-55 and the backup data memory 6-56 are compared with each other to carry out a determination processing 25-2 as to whether or not the program needs to be restored. That is, if the control programs of the inspection range addresses stored in the inspection data memory 6-55 and the backup data memory 6-56 all match, no repair is necessary, and if they do not all match, repair is necessary. To determine. When it is determined that the repair is necessary, the program repair processing 25-3 is executed, and the processing of repairing by updating the content of the inspection range address of the program memory 3 with the content of the backup memory 5 is performed. Figure 2 shows the inspection data memory 6-55
The control program indicated by the x mark stored in the table indicates the destroyed data, and the address (12
345670H ~ 1234569FH) control program is restored.

Next, the contents of the address memory 6-1 and the address memory 6-51 are compared with each other, and a judgment processing 25-4 is carried out to determine whether or not the error occurrence address is the same as the previous error occurrence address. When it is determined that the error occurrence address is different from the previous error occurrence address, the instruction retry counter 6-9 is incremented, the processing 25-5 for restarting the execution of the program control from the error occurrence address is performed, and the above is saved. Display device 1 for displaying a series of error detection information
Processing 25-7 for notifying the external device such as 1 is performed.

When it is determined that the error occurrence address is the same as the previous error occurrence address (example in FIG. 2), the task retry counter 6-10 is counted up, and the unit program including the error occurrence address starts from the top address. The process 25-6 for resuming the execution is performed, and the process 25-8 for notifying the external device such as the display device 11 of the series of error detection information saved above is performed.

The content of the instruction retry counter 6-9 indicates the cumulative number of times of re-execution of the instruction of the error occurrence address, and the content of the task retry counter 6-10 indicates the cumulative number of re-execution of the unit program including the error occurrence address. The above information can be reported to the user side together with an alarm. Further, the start address of the unit program is updated and held each time the unit program is executed in the program control processing 23 of FIG. 2, and when execution is instructed by the re-execution processing 25-6, the start address is executed from this start address. The unit program is re-executed.

According to the present embodiment, when the contents of the control program are destroyed by a disturbance such as noise and an execution error occurs, the destroyed control program is self-restored and re-executed to continuously execute the program control. It is possible to prevent program runaway and system down. Therefore, it can be effectively applied to program control of a highly public system that requires high reliability.

[0020]

According to the present invention, when the contents of the control program are destroyed due to some cause and an execution error occurs, the destroyed control program is self-restored and re-executed so that the program control can be continuously executed. Becomes possible,
Program runaway and system down can be prevented, highly reliable program control can be performed, and error information can be reported, so a program that can quickly investigate the cause of error occurrence A control system can be provided.

[Brief description of drawings]

FIG. 1 is a hardware configuration diagram of a program control system of the present invention.

FIG. 2 is a detailed configuration diagram of a trace memory 6 shown in FIG.

FIG. 3 is a flowchart for explaining the operation of the present invention.

4 is a detailed flowchart of the error recovery process of FIG.

[Explanation of symbols]

1 ... CPU 2 ... System memory 3 ... Program memory (control program) 4 ... Program memory (error recovery program) 5 ... Backup memory 6 ... Trace memory 6-1 ... Address memory (previous error) 6-2 ... Save number memory 6 -3 ... Index memory 6-4 ... Maximum number of registrations memory 6-5 ... Destruction status storage memory 6-51 ... Address memory (latest error) 6-52 ... Register memory 6-53 ... Calendar memory 6-54 ... Inspection address memory 6-55 ... Inspection data memory 6-56 Back data up memory 6-6 ... Address memory (start address of control program of memory 3) 6-7 ... Address memory (start address of control program of memory 5) 6-8 … Saved data amount memory 6-9… Instruction retry counter 6-10… Task retry counter 7… Calendar ... interface 9 ... CPU bus 10 ... input / output device (I / O) 11 ... display device 21 ... backup process 22 ... program control start process 23 ... program control process 24 ... error determination process 25 ... error recovery process 25-1 ... error Data saving process 25-2 ... Judgment process of whether or not to restore control program 25-3 ... Restoration process of control program 25-4 ... Judgment process of error occurrence address 25-5 ... Re-execution process of instruction 25-6 … Unit program re-execution processing 25-7, 25-8… Error information notification processing

Claims (5)

[Claims] 1. A program memory in which a control program including a plurality of unit programs is stored, a backup memory in which the same control program as the control program is stored, and the control program is sequentially read from the program memory to perform program control. When an error occurs with the CPU to be executed, the contents of the control program in the program memory are compared by comparing the contents of the control program in a predetermined range including the error occurrence address of the program memory and the backup memory to determine whether or not the contents of the control program are corrupted. However, if the program is broken, the contents of the control program in the predetermined range of the program memory are restored, and error recovery processing means for restarting the execution of the program control is provided to prevent runaway and stop of the program control when an error occurs. Prog characterized by preventing Beam control system. 2. The program control system according to claim 1, further comprising means for copying the control program stored in the program memory to the backup memory when the system is activated. 3. The program control system according to claim 1, wherein the error recovery processing means holds an error occurrence address when an error is detected during execution of the program control, and stores the error occurrence address in the program memory and the backup memory. A program comprising means for restoring the contents of the control program in the predetermined range of the program memory with the contents of the backup memory when the contents of the control program in the predetermined range including the error occurrence address do not match. Control system. 4. The program control system according to claim 1, wherein when the error occurrence address is the same as the previous error occurrence address, the error recovery processing means controls the program from the beginning of the unit program including the error occurrence address. And a means for restarting the execution of the program control from the error occurrence address when the error occurrence address is different from the previous error occurrence address. 5. The program control system according to claim 1, wherein the error recovery processing means includes an error occurrence address, an error occurrence frequency, a status of the CPU at the time of error occurrence, an error occurrence date and time, a repair program content,
A program control system characterized by comprising a trace memory for storing error information such as the number of retries to notify an external device such as a display device to easily analyze the cause of the error.