JP2002007218A - Memory collation system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To discriminate whether data in a common memory that data processes share can be restored through memory inspection and collation, even when the data are rewritten by another program and trouble occurs to subsequent processing by a processing program and to make the data in the memory usable, after the data are restored when the data can be restored. SOLUTION: This system has a memory block (plane A), which has a check code for error detection given to information in a used memory during data process interruption, a memory block (plane B) copied to memory blocks in another area in the memory, a copying means for the memory, and a memory inspection, collation, and restoration means which checks and restores memory block contents of both the planes A and B, each time a program restarts.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a method of collating the contents of a main memory used by a real-time program operating in multi-programming of a processing device.

[0002]

2. Description of the Related Art In multi-programming, a plurality of programs having different processing contents are operating in parallel, and memory sharing between the programs and exclusive control of shared resources are performed. Therefore, at the time of introduction when a new program with a low degree of perfection is incorporated, or during the test period at the time of modification, a program that may have a bug in the memory area used by the existing program that is running stably Therefore, an illegal read / write operation may be performed. In particular, when data developed on the shared memory of the main memory device is illegally rewritten by another program, the stable operation of the program that processes the data cannot be guaranteed.
Depending on the contents of the data handled by the program, there is a possibility that a completely unintended processing result is output.

In order to solve this problem, as a conventional technique, a check code for detecting an error such as a BCC is assigned to a used memory area and its verification is performed. (2) Dual memory configuration,
And a method such as backup when a failure is detected.

In the method (1), the reliability of the memory contents can be easily verified, but only the failure can be recognized, and the address and the contents cannot be specified or repaired at the location where the information has been illegally written. Therefore, there is a disadvantage that business cannot be continued. The method of (2) is considered to be an effective method in which the method of (1) has a dual system configuration and the backup side can continue the business as long as no double failure occurs. For example, JP-A-8-50564 describes a table management method in which data is periodically transferred to a save table in a flash memory.

[0005]

As described above, when a shared memory is used by another program, for example, a program having a bug, with respect to the shared memory content used by each data processing program in a multi-programming environment, Incorrect rewriting may be performed. Then,
The subsequent program processing will be hindered. In particular, when the memory is shared between the programs, the influence becomes large. An object of the present invention is to provide a memory collation method for checking whether or not the contents of the memory have been illegally rewritten at the start of program processing (particularly at the time of restart) even in such a case.

[0006]

A first memory block in which an error detection check code is added to data held in a memory at the end of program processing of a data processing unit;
A second memory block obtained by duplicating the first memory block; a memory duplication unit having a duplication program of the memory block; and a program for verifying, collating, and restoring the two memory blocks when the data processing unit resumes program processing. And a memory verification collation / recovery means.

When one of the first and second memory blocks has been rewritten,
It is characterized in that it is a memory verification collation / recovery means having a program for recovering using the contents of another memory block.

[0008]

FIG. 1 is a block diagram showing one embodiment of the present invention. The data processing device 1 receives input data to be processed from the input device 2 through the data input unit 4. The fetched input data is stored in the memory 5 and data processing, processing, judgment, accumulation and the like are performed by the plurality of data processing units 6. In this example, the data processing unit is composed of a plurality of 6 ₁ ... 6 _i ... 6 _m , and is an example of a so-called multi-programming process in which each can operate in parallel.

Here, a data processing unit i for performing a certain process,
That is, the data processing unit 6 _i secures data ₁ ... Data ₂ ... Data _n in the memory 5 and displays the processing result on the output device 3 by the data output unit 7. Data processing unit 6
Is composed of a plurality of data processing units ₁ to _m . Data 1 to n are variables and constants to be used for processing continuously at the next startup. When one process is completed, there is a period in which the process is suspended until the next start timing.

Immediately before the suspension of the processing, the memory copy creating unit 9 is called. The memory copy creation unit 9 includes a data processing unit _i
From the parameters at the time of calling, data _1, data _2, ... a memory starting address of the data _n, the size has been passed, whereby the data _1, data _2, ... error detection check code for each content of the data _n ( BCC) is created and added to create the memory block 8. Thus, one memory block including the error detection check code is provided. The memory copy creating unit 9 creates a copy 10 of the memory block 8 in an area (Side B) different from the area (Side A) in the memory where the memory block 8 exists.

[0011] Here, to resume processing data processing unit 6 _i is after the stop processing, again before that when you use the data in the memory, calling the processing program from the memory test and matching and restoration unit 11. The memory verification / collation / repair unit 11 is given the same parameters at the time of calling,
An error detection check code BCC is created for both memory blocks on the B side, compared with a code already stored, and a comparison test is performed. If there is a failure, the contents of both memory blocks, that is, the data ₁ , data ₂ ,..., Data _n , are compared with each other, and the unmatched portion is extracted. A simple display can be performed on the display unit 12. Further, the memory fault display unit 12 can transfer this to the output device 3 and display it outside.

[0012] During the data processing unit 6 _i pause, if data (data 1 to n) is rewritten illegally by bugs other data processing unit (e.g., _61), if you look at the information, the The phenomenon can be immediately known, and can be used as failure analysis information.

The memory verification / collation / repair unit 11
If only one side fails, the contents of the memory block (side A or side B) that passed is used. For example,
If the A side is rejected, the B side data block is used, and if the B side is rejected, the A side data block is used. Then, the memory block on the surface determined to be accepted can be copied to the rejected side by copying or the like, and the memory block on the rejected side can be repaired. Therefore, the data processing unit 6 _i can continue the processing. Either one of the A side or the B side, especially the data on the B side is in principle sound, but in some cases, the data may be rewritten on both the A and B sides. Therefore, if either face fails, it cannot be repaired, but if any one fails, it may be possible to repair it.

FIG. 2 shows a schematic flowchart of the data processing section 6. Data processing unit 6 (for example, data processing unit 6
i), after the processing of step S1 is completed using data ₁ ,..., data _n , in step S2, the memory copy creation unit 9 is called in preparation for the next start, and the memory block 8 on the A side
Is copied to the B side to obtain the memory block 10. At this time, the start address and data size of the data as well as the backup address on the side B for the data block 8 on the side A are given to the memory copy creating section 9 as parameters.
In the actual main memory, a capacity for a memory block to which an error check code is assigned is secured for each of the addresses A and B.

FIG. 3 shows a specific processing flow of step S2 in FIG. FIG. 3 shows a processing flow of the memory copy creation unit 9. By calling, the processing program of the memory copy creation unit 9 creates the error detection check code BCC for the memory contents in this section from the specified start address and data size,
Is stored at the end of step (step S21). That is, a check code BCC for error detection is added to the data in the A-side memory block 8 (see FIG. 1). next,
The memory block 8 on the side A including the check code for error detection is copied to the designated address on the side B (step S2).
2).

In FIG. 2, the data processing unit 6 is in a state of waiting for a predetermined time (sleep) for the next operation (step S3). When the predetermined time has elapsed and the next process is started, the process proceeds to the next step S4, where the program of the memory verification / collation / repair unit 11 is called to perform the verification / collation / repair.

FIG. 4 shows a schematic flowchart of the processing of the memory verification / collation / repair unit 11. When the processing program of the memory verification / collation / repair unit 11 is called, the error detection check code BC for the contents of the memory block 8 on the A-side is determined from the specified start address and data size.
C is created, and it is checked whether or not it matches the error detection check code already stored in the previous processing (step S
41). Similarly, the test is performed on the contents of the memory block on the side B (step S42). If both of the test results for the memory blocks on the side A and the side B pass, that is, if there is no change from the time of copying, the data processing unit 6
Is reported to be normal (steps S43, S44).

On the other hand, if the test result is unsuccessful, that is, if there is a change from the time of copying to the memory, the data in the memory blocks 8 and 10 on the side A and the side B are collated in step S45, and the inconsistent portion is indicated by the memory failure display section. 12 and
According to the processing program called from the memory verification / collation / repair unit 11, the memory blocks 8 on the A-side and the B-side
Perform 10 tests. If the test results are unsuccessful on both sides A and B, the memory contents cannot be restored and "abnormal"
(Steps S46 and S47).

As a result of the verification, if either one of the data passes, the data of the rejected data is copied from the data of the rejected data by copying the data of the rejected data. Data is restored, and the data processing unit 6 is restored.
Is reported to the user (steps S48 and S49).

In the data processing unit 6, if the report from the memory verification / collation / repair unit 11 is not a failure (abnormal), the process can be continued because the data has been completely restored, and the processing in step S1 is repeated. Processing can proceed. However, in the case of rejection (S46, S47), it is regarded as abnormal and the data processing device 1 is forcibly terminated.

The data processing unit 6i shown in the above embodiment is
During the step S3 that the time waiting for the next process, other data processing unit bug potentially (such as ₆₁₎ is operated, illegally even one memory data A plane (1 to n) If the data has been rewritten, the error detection check code of the memory block on the A side is changed from the beginning to the last data (data ₁ ,..., Data _n ) by the processing step S41 of the memory verification / collation / repair unit 11. Then, the current error detection check code is created and compared with the stored error detection check code.

However, in step S42, the contents in the memory block on the side B have not been rewritten, so the test has passed. Therefore, since both sides do not pass, step S4
5, the contents of the memory block on the A side (data ₁ ,
Data ₂ ,..., Data _n ) and the contents of the memory block on the B side (data ₁ , data _{2 ′} ,..., Data _n ) are sequentially compared and collated from the beginning to the last data. _An error is detected as ₂ ≠ data _{2 ′,} and it can be determined that this is a rewritten location (data _{2 ′} represents rewritten data). In this way, the data is copied on the memory at the end of the process, and when the data processing unit starts the process, the memory data of both the A side and the B side is verified and collated, and the data in the memory is used. Will not be used when processing is resumed.

[0023]

According to the present method, in data processing operating in a multi-programming environment, information in a memory area to be used is duplicated and duplicated, and used after being checked when processing is resumed. Never use the data.

[Brief description of the drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention.

FIG. 2 is a flowchart schematically showing a data processing unit.

FIG. 3 is a flowchart for explaining copying of a memory block;

FIG. 4 is a flowchart for explaining verification / collation of a memory block;

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Data processing device, 2 ... Input device, 3 ... Output device, 4 ... Data input part, 5 ... Memory, 6 ... Data processing part, 7 ... Data output part, 8 ... A side memory block, 9 ... Memory duplication Creation unit, 10: B-side memory block, 11: Memory verification / collation / repair unit,
12: Memory fault display

Claims (2)

[Claims] The data obtained from an input device is stored in a memory via a data input unit, and the data is processed, processed, determined, stored, etc. by a data processing unit.
In a data processing device that can be displayed on an output device via a data output unit, a first memory block in which an error detection check code is added to data held in a memory at the end of program processing of the data processing unit When,
A second memory block obtained by duplicating the first memory block; a memory duplicating unit having a program for duplicating the memory block; and a program for verifying, collating, and repairing the two memory blocks when the data processing unit resumes program processing. And a memory verification collation / recovery means. 2. The data processing system according to claim 1, wherein at the time of resuming data processing, when one of the first and second memory blocks has been rewritten, the contents of the other memory block are used. A memory verification method comprising a memory verification verification repair means having a program to be recovered.