JPH09199847A - Demounting of component and soldering - Google Patents
Demounting of component and solderingInfo
- Publication number
- JPH09199847A JPH09199847A JP8021920A JP2192096A JPH09199847A JP H09199847 A JPH09199847 A JP H09199847A JP 8021920 A JP8021920 A JP 8021920A JP 2192096 A JP2192096 A JP 2192096A JP H09199847 A JPH09199847 A JP H09199847A
- Authority
- JP
- Japan
- Prior art keywords
- component
- solder
- substrate
- lsi
- solders
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/225—Correcting or repairing of printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3494—Heating methods for reflowing of solder
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体集積回路
（ＬＳＩ）等の電子部品と回路基板を接続する電子回路
の製造方法に関し、特に、はんだ付けされた部品の取外
し方法および該取外し方法で取外された部品のはんだ付
け方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing an electronic circuit for connecting an electronic component such as a semiconductor integrated circuit (LSI) and a circuit board, and more particularly to a method for removing a soldered component and a method for removing the component. The present invention relates to a method for soldering removed parts.
【０００２】[0002]
【従来の技術】電子回路等に使用される半導体集積回路
（以後、ＬＳＩと記す）は種々の要求により、はんだ付
けした後、このはんだを溶融して、一旦取り外し、再び
はんだ付けして利用する場合が多い。この様にする理由
としては、たとえば、 ＬＳＩの性能を確認するためテスト用基板にＬＳＩを
はんだ付けし通電テストにより良否を確認しテスト用基
板から取り外して回路基板に接続する。 回路基板に、はんだ付けした後、位置ズレ等製造トラ
ブルにより取り外して付けかえる。 電子回路の高性能化のため新しい機能のＬＳＩと交換
する等がある。 図１は従来技術を用いてフリップチップタイプのＬＳＩ
をテスト用基板から取外した例を示したものであり、
（ａ）はＬＳＩ取り外し前の状態を示し、（ｂ）は取外
した状態を示す。（ａ）の状態でＬＳＩ２がはんだ付け
されたテストボード１はホットプレート４により加熱さ
れる。はんだ３が溶融された状態で真空ピンセット５等
でＬＳＩを持ち上げるとＬＳＩ２はテストボード１から
離れ（ｂ）に示す状態になる。はんだ３は融点を越える
と急速に表面の酸化が進行し、この状態で部品を取外す
と、表面の酸化膜６´によりはんだの流動が妨げられ、
（ｂ）に示す様に、ＬＳＩに残されたはんだ６は突起状
になり、はんだ量も一定しない。2. Description of the Related Art A semiconductor integrated circuit (hereinafter referred to as an LSI) used in an electronic circuit or the like is soldered to meet various requirements, and then the solder is melted, temporarily removed, and then re-soldered for use. In many cases. The reason for doing this is, for example, to confirm the performance of the LSI by soldering the LSI on a test board, confirming the quality by an energization test, removing from the test board, and connecting to the circuit board. After soldering to the circuit board, it is removed and replaced due to manufacturing problems such as misalignment. In order to improve the performance of the electronic circuit, there is a replacement with an LSI having a new function. FIG. 1 shows a flip-chip type LSI using the conventional technology.
It shows an example of removing from the test board,
(A) shows the state before the LSI is removed, and (b) shows the removed state. The test board 1 to which the LSI 2 is soldered in the state of (a) is heated by the hot plate 4. When the LSI is lifted by the vacuum tweezers 5 or the like in a state where the solder 3 is melted, the LSI 2 is separated from the test board 1 and enters the state shown in (b). When the temperature of the solder 3 exceeds the melting point, the surface of the solder 3 rapidly oxidizes, and when the component is removed in this state, the surface oxide film 6 ′ hinders the flow of the solder.
As shown in (b), the solder 6 left on the LSI has a protrusion shape, and the amount of solder is not constant.
【０００３】フリップチップ端子のＬＳＩを接続する場
合は、接続に供されるはんだ量を一定の精度に保つこと
が必須条件となる。また、この様な接続では接合部の良
否が接続完了後は外観から判定できないため予めＬＳＩ
側のはんだ量をはんだ高さにより計測する方法を用いる
が図１に示した様な従来の方法では、はんだ量が一定せ
ず、はんだの形状も不定形のためこのまま接続が不可能
となる。このため図２に示すごとく、ＬＳＩ例のはんだ
を一旦除去し、しかる後に、はんだ量の一定したはんだ
ボール等ではんだを供給し、さらにフラックスを塗布後
再度はんだを加熱溶融により球体化して、はんだ量検査
を可能にする必要があった。この様な技術については、
たとえば特開昭４−６１１９１号に述べられている。When connecting an LSI having a flip-chip terminal, it is an essential condition to maintain the amount of solder used for the connection at a certain accuracy. In addition, in such a connection, the quality of the joint cannot be judged from the appearance after the connection is completed, so that the LSI can be checked in advance.
Although the method of measuring the amount of solder on the side by the solder height is used, in the conventional method as shown in FIG. 1, the amount of solder is not constant and the shape of the solder is indefinite. Therefore, as shown in FIG. 2, the solder of the LSI example is once removed, and thereafter, the solder is supplied with a solder ball or the like having a constant amount of solder, the flux is further applied, and the solder is again spheroidized by heating and melting. It was necessary to enable quantity inspection. For such technology,
For example, it is described in JP-A-4-61191.
【０００４】[0004]
【発明が解決しようとする課題】前記した様な従来技術
を検討すると、以下のような問題点がある。 はんだ付けされたＬＳＩのはんだを大気中で溶融し取
外す方法は、はんだの表面に酸化膜が形成される。 この酸化膜ははんだの表面張力による流動を妨げ、外
した後のはんだの形状は突起状となり一定化しない。こ
の様な不定形状のはんだは、はんだ量の測定が困難とな
る。 酸化膜の形成により、ＬＳＩ側、基板側に残るはんだ
量は、不均一となり、接続のために必要な均一なはんだ
量を確保できない。 部品外し時に酸化膜が形成されるため、このはんだを
そのまま用いて接続する場合はフラックス等の酸化膜除
去手段を用いないと正常な接続が得られない。ＬＳＩ
外し時に、はんだ付けパット、メタライズが露出した場
合、このメタライズが酸化し、はんだぬれ不良が発生す
る。 はんだ表面の酸化を防止するためフラックスを塗布し
てから部品の取外しを行う工法も有るが、洗浄が必要と
なる。また、フラックスのこげつきやミスト等により設
備のメンテナンスに多大の工数を要する。When the above-mentioned conventional techniques are examined, there are the following problems. In the method of melting and removing the solder of the soldered LSI in the atmosphere, an oxide film is formed on the surface of the solder. This oxide film hinders the flow due to the surface tension of the solder, and the shape of the solder after the removal becomes a projection and is not constant. It is difficult to measure the amount of solder in such an irregularly shaped solder. Due to the formation of the oxide film, the amount of solder remaining on the LSI side and the substrate side becomes non-uniform, and the uniform amount of solder necessary for connection cannot be secured. Since an oxide film is formed when the parts are removed, when the solder is used as it is for connection, normal connection cannot be obtained unless oxide film removing means such as flux is used. LSI
When the soldering pad and the metallization are exposed at the time of removal, the metallization is oxidized and a solder wetting defect occurs. There is also a construction method in which flux is applied in order to prevent oxidation of the solder surface and then parts are removed, but cleaning is required. In addition, a large number of man-hours are required to maintain the equipment due to burning of the flux and mist.
【０００５】本発明の目的は、複雑なプロセスを使用す
ることなく、上記問題点を解決するはんだ付けした部品
の取外し方法を提供することにある。本発明の他の目的
は、上記取外し方法により取外された部品の基板へのは
んだ付け方法を提供することにある。It is an object of the present invention to provide a method for removing a soldered component which solves the above problems without using a complicated process. Another object of the present invention is to provide a method for soldering a component removed by the above-described removal method to a board.
【０００６】[0006]
【課題を解決するための手段】上記目的を達成するた
め、本発明は、はんだ材により接続された部品を低酸素
濃度雰囲気中で加熱し、はんだを溶融後、この雰囲気中
で部品を分離するようにしている。また、前記低酸素濃
度雰囲気の酸素濃度が１０００ＰＰＭ以下であるように
している。また、はんだ溶融後、部品の分離を真空吸引
手段により行ない、該真空吸引手段と部品とが非接触状
態で該分離を開始するようにしている。また、はんだ溶
融後、部品の分離開始時の前記真空吸引手段の吸引ノズ
ルと部品との距離が０．０５〜０．３であるようにして
いる。また、前記部品の分離後における部品のパターン
上に残るはんだ量を該部品の端子パターンの径を変える
ことによりコントロールするようにしている。また、部
品と該部品を取付ける基板の接続において部品の端子パ
ターン径を基板の端子パターン径より大きくし、該部品
と基板の接続分離後のはんだ量が基板よりも部品に多く
残るようにしている。また、部品と該部品を取付ける基
板の接続において部品の端子パターン径を基板の端子パ
ターン径より小さくし、該部品と基板の分離後のはんだ
量が部品より基板側に多く残るようにしている。はんだ
材により接続された部品を低酸素濃度雰囲気中で加熱
し、はんだを溶融後、この雰囲気中で部品を分離した部
品を、該部品が取り付けられていた基板とは異る基板の
接続個所に、有機溶材を塗布後搭載し、酸素濃度２ＰＰ
Ｍ以下の雰囲気で該部品及び基板を同時に加熱し、はん
だ付けを行うようにしている。In order to achieve the above object, the present invention heats a component connected by a solder material in a low oxygen concentration atmosphere, melts the solder, and then separates the component in this atmosphere. I am trying. Moreover, the oxygen concentration of the low oxygen concentration atmosphere is set to 1000 PPM or less. Further, after melting the solder, the parts are separated by the vacuum suction means, and the separation is started in a non-contact state between the vacuum suction means and the parts. Further, after the solder is melted, the distance between the suction nozzle of the vacuum suction means and the component at the time of starting the separation of the component is 0.05 to 0.3. Further, the amount of solder remaining on the pattern of the component after separating the component is controlled by changing the diameter of the terminal pattern of the component. Further, in connecting the component and the substrate on which the component is mounted, the terminal pattern diameter of the component is made larger than the terminal pattern diameter of the substrate so that the amount of solder after the connection and separation of the component and the substrate is larger in the component than in the substrate. . Further, in connecting the component and the substrate on which the component is mounted, the terminal pattern diameter of the component is made smaller than the terminal pattern diameter of the substrate so that the amount of solder after separation of the component and the substrate is larger on the substrate side than on the component. After the parts connected by the solder material are heated in an atmosphere of low oxygen concentration and the solder is melted, the parts separated in this atmosphere are placed in a connection part of a board different from the board on which the parts are attached. , Applied with organic solvent after coating, oxygen concentration 2PP
The component and the substrate are simultaneously heated in an atmosphere of M or less to perform soldering.
【０００７】[0007]
〔実施例１〕図３は本発明をＬＳＩの取外しに適用した
実施例１を説明するための図である。１はテストボー
ド、２はＬＳＩ、３ははんだ、４はホットプレート、５
は真空ピンセット、６は分離後のはんだ、７はＬＳＩ端
子パターン、８はテスト基板端子パターン、９はチャン
バー、１０はチャンバー開閉扉、１１はＮ2ガス導入
孔、１２はＮ2ガス分配板である。[First Embodiment] FIG. 3 is a diagram for explaining a first embodiment in which the present invention is applied to the removal of an LSI. 1 is a test board, 2 is an LSI, 3 is solder, 4 is a hot plate, 5
Is vacuum tweezers, 6 is solder after separation, 7 is an LSI terminal pattern, 8 is a test board terminal pattern, 9 is a chamber, 10 is a chamber opening / closing door, 11 is an N 2 gas introduction hole, and 12 is an N 2 gas distribution plate. is there.
【０００８】本実施例１で示す部品取外し方法はＮ2ガ
スを充填した低酸素濃度チャンバー９中でＬＳＩ２とテ
ストボード１を分離する方法である。図３の左側は分離
前の状態を、図３の右側は分離後の状態を示す。テスト
ボード１にはんだ付けされたＬＳＩ２はホットプレート
４上で加熱される。この時チャンバー９内にはＮ2ガス
が導入されており、部品を取り囲む雰囲気の酸素濃度は
大気中に比較し充分低くなっている。分離前の状態（図
３の左側）はんだ３が溶融後、真空ピンセット５が下降
しＬＳＩ２と一定の距離(l)から吸着し、テストボード
１と分離し、図の右側の状態になる。はんだは融点より
１０〜４０℃くらい高く加熱され、この温度に到達後、
分離を開始する。また、ＬＳＩを吸着するときの真空ピ
ンセットとＬＳＩの距離(l)０．０５〜０．３の間隔を
保つ必要がある。その理由は、はんだが溶融した状態で
真空ピンセット５がＬＳＩに接触すると、はんだがつぶ
れ、均一な分離が困難となり、また、間隔が大きすぎる
とＬＳＩ２が分離する際に傾めに上昇するため、はんだ
量が不均一となるためである。また、この場合の部品の
サイズは１０〜２０ｍｍ、部品重量は０．５〜２ｇ程
度、真空ピンセットの吸着口径（ｄ）は部品面積（被吸
着面）の４０〜８０％程度に設計し、吸着力（Ｆ）（実
際は風速）は（部品重量はんだ表面張力による固定力）
の１．２倍以上とした。The component removing method shown in the first embodiment is a method of separating the LSI 2 and the test board 1 in the low oxygen concentration chamber 9 filled with N 2 gas. The left side of FIG. 3 shows the state before separation, and the right side of FIG. 3 shows the state after separation. The LSI 2 soldered to the test board 1 is heated on the hot plate 4. At this time, N 2 gas is introduced into the chamber 9, and the oxygen concentration of the atmosphere surrounding the parts is sufficiently lower than that in the atmosphere. State before separation (left side in FIG. 3) After the solder 3 is melted, the vacuum tweezers 5 descend to adsorb the LSI 2 from a certain distance (l), separate from the test board 1, and become the state on the right side in the figure. Solder is heated about 10-40 ℃ higher than the melting point, and after reaching this temperature,
Start the separation. In addition, it is necessary to maintain a distance (l) of 0.05 to 0.3 between the vacuum tweezers and the LSI when sucking the LSI. The reason is that if the vacuum tweezers 5 come into contact with the LSI in a molten state of the solder, the solder will be crushed and uniform separation will be difficult, and if the spacing is too large, the LSI 2 will tilt and rise when separated. This is because the amount of solder becomes uneven. In this case, the size of the component is 10 to 20 mm, the weight of the component is about 0.5 to 2 g, and the suction port diameter (d) of the vacuum tweezers is designed to be about 40 to 80% of the component area (adsorbed surface). Force (F) (actually wind speed) is (fixing force due to component weight solder surface tension)
1.2 times or more.
【０００９】図４は、はんだの組成がＳｎ９７％、Ａｇ
３％のものを使用し、ＬＳＩの端子のパターン７の径が
０．１５φ、テストボードパターン８の径が０．１５φ
を使用した時のチャンバー内雰囲気の酸素濃度において
分離後のＬＳＩのはんだ６が球形化する割合を示したも
のであり、このサンプルでは、酸素濃度１０００ＰＰＭ
以下にする必要がある。この様な方法によれば、はんだ
溶融時に形成される酸化膜厚は薄くなり、酸化膜により
はんだの流動を拘束する力は、はんだの表面張力により
流動する力に対して充分小さくなるため、分離後のはん
だが球体化すると共に、はんだはＬＳＩ及びテストボー
ドの端子パターンにそれぞれ均一に分離することが可能
となる。In FIG. 4, the solder composition is Sn 97%, Ag
3% is used, the diameter of the LSI terminal pattern 7 is 0.15φ, and the diameter of the test board pattern 8 is 0.15φ.
Shows the ratio of the spheroidizing of the solder 6 of the LSI after separation in the oxygen concentration of the atmosphere in the chamber when the sample was used.
It must be: According to such a method, the oxide film formed when the solder is melted becomes thin, and the force that restrains the flow of the solder due to the oxide film is sufficiently smaller than the force that flows due to the surface tension of the solder. The later solder becomes spherical, and the solder can be evenly separated into the terminal patterns of the LSI and the test board.
【００１０】〔実施例２〕図５は本発明の実施例２を説
明するための図である。図５の（ａ）はＬＳＩ２とテス
トボード２の分離前の状態を、図５の（ｂ）は分離後の
状態を示す。ＬＳＩ２の端子パターン７の径はテストボ
ード１の端子パターン８の径に対して大きく設計されて
いる。この様なＬＳＩと基板がはんだ付けされたものを
実施例１に示した方法で分離すると図５の（ｂ）の様に
なる。すなわち、酸化膜の形成が充分小さい状態では、
ＬＳＩ２とテストボード１が分離する際、接続されたは
んだ３は、それぞれの端子パターン７，８の径により表
面張力が最も安定する形状に分配される。したがって端
子パターン径が大きい方に多量のはんだが、端子パター
ン径の小さい方に少量のはんだがが均一に分離される。[Second Embodiment] FIG. 5 is a view for explaining a second embodiment of the present invention. 5A shows the state before separation of the LSI 2 and the test board 2, and FIG. 5B shows the state after separation. The diameter of the terminal pattern 7 of the LSI 2 is designed to be larger than the diameter of the terminal pattern 8 of the test board 1. When such an LSI and a substrate that are soldered are separated by the method shown in the first embodiment, it becomes as shown in FIG. That is, when the oxide film formation is sufficiently small,
When the LSI 2 and the test board 1 are separated, the connected solder 3 is distributed in a shape in which the surface tension is most stable due to the diameters of the respective terminal patterns 7 and 8. Therefore, a large amount of solder is uniformly separated into a larger terminal pattern diameter, and a small amount of solder is uniformly separated into a smaller terminal pattern diameter.
【００１１】実施例２によれば、接続される部品及び基
板のパターン径を任意の比率に設計することにより分離
後のはんだ量を任意の比率にしかも均一に分配すること
が可能となる。たとえば、接続品質を確保するためにＬ
ＳＩに供給する必要なはんだ量ａが決定している場合、
テストボードに残るはんだ量ｂを加えた（ａ＋ｂ）のは
んだ量を、ＬＳＩとテストボード接合時に供給すること
により必要なはんだ量を確保することができる。According to the second embodiment, by designing the pattern diameters of the components to be connected and the board at an arbitrary ratio, the amount of solder after separation can be evenly distributed at an arbitrary ratio. For example, to ensure connection quality, L
When the required solder amount a to be supplied to SI is determined,
A necessary solder amount can be secured by supplying a solder amount of (a + b) to which the solder amount b remaining on the test board is added at the time of joining the LSI and the test board.
【００１２】〔実施例３〕実施例１、実施例２に示した
方法で分離したＬＳＩは、はんだ量が均一であり、球体
化されているため、従来技術に示した様に、はんだを除
去後、再度はんだ供給する必要がない。また、球体化し
ているため、はんだ量の検査が容易に実施可能となる。
さらに、このはんだ表面には、ごく薄い酸化膜しか生成
していないため、通常のはんだ付けで必要とするフラッ
クスを必要とせずはんだ付けが可能となる。[Third Embodiment] Since the LSI separated by the method shown in the first and second embodiments has a uniform amount of solder and is spherical, the solder is removed as shown in the prior art. After that, it is not necessary to re-solder supply. Further, since it is spherical, it is possible to easily inspect the amount of solder.
Furthermore, since only a very thin oxide film is formed on the surface of this solder, the soldering can be performed without the need for the flux required for normal soldering.
【００１３】図６は本発明の実施例３を説明するための
図である。２はＬＳＩ、６はＬＳＩ側のはんだバンプ、
１４は基板、１５は基板端子パターン、１３は仮固定
液、１７ははんだ付けチャンバー、１８は真空ポンプ、
１９はＨｅ（ヘリウム）導入ポート、１６はカーボンヒ
ータを示す。FIG. 6 is a diagram for explaining the third embodiment of the present invention. 2 is an LSI, 6 is a solder bump on the LSI side,
14 is a board, 15 is a board terminal pattern, 13 is a temporary fixer, 17 is a soldering chamber, 18 is a vacuum pump,
Reference numeral 19 is a He (helium) introduction port, and 16 is a carbon heater.
【００１４】ＬＳＩ２のはんだバンプ６は実施例１に示
す方法でテストボードから分離されたＬＳＩのはんだバ
ンプである。ＬＳＩが実装される基板１４には仮固定液
１３が所定の量塗布された後、基板１４の端子パターン
１５の位置にＬＳＩが搭載されている。仮固定液はＬＳ
Ｉ２を基板１４に搭載した際に搬送で位置がズレないこ
とや、はんだ付け時の微量の、酸化を防止する目的で塗
布するもので通常ペンタエチレングリコールや、ポリエ
チレングリコールが使用される。The solder bumps 6 of the LSI 2 are the solder bumps of the LSI separated from the test board by the method shown in the first embodiment. The substrate 14 on which the LSI is mounted is coated with a predetermined amount of the temporary fixer 13 and then mounted on the substrate 14 at the position of the terminal pattern 15. Temporary fixative is LS
It is applied for the purpose of preventing the displacement of I2 when it is mounted on the substrate 14 during transportation, and for preventing a small amount of oxidation during soldering, and normally pentaethylene glycol or polyethylene glycol is used.
【００１５】はんだ付けは２ＰＰＭ以下の低酸素雰囲気
で行う。１７はこのための、はんだ付けチャンバーで、
真空ポンプ１８によりチャンバー内の空気を排出後、Ｈ
ｅガス等の不活性ガス、あるいは水素等の還元性ガスを
導入し槽内の酸素濃度が２ＰＰＭ以下（モニタは図示せ
ず）になったことを確認してカーボンヒータに通電して
加熱しはんだを溶融して、接続を行う。尚仮固定液は加
熱時、あるいは冷却時の真空脱気により蒸発させる。Soldering is performed in a low oxygen atmosphere of 2 PPM or less. 17 is a soldering chamber for this,
After the air in the chamber is exhausted by the vacuum pump 18, H
Inert gas such as e-gas or reducing gas such as hydrogen was introduced, and it was confirmed that the oxygen concentration in the tank became 2PPM or less (monitor not shown). Melt and connect. The temporary fixative is evaporated by vacuum degassing during heating or cooling.
【００１６】本方法によれば、はんだ付け時、酸化膜を
除去するために必要なフラックスを使用することなくは
んだ付けが可能となり、洗浄作業が不要となる。また、
ＬＳＩのはんだバンプ６上にできた微量の酸化膜を、エ
キシマレーザー等の、波長の短いレーザーで除去するこ
とにより一層顕著な効果を得ることができる。本実施例
では、フリップチップタイプのＬＳＩを実施例として、
とりあげ説明したが、本発明はこれに限定されるもので
はない。ＱＦＰ等のフラットリードタイプのＬＳＩにつ
いても同様に適用できる。According to this method, the soldering can be performed without using the flux necessary for removing the oxide film at the time of soldering, and the cleaning work is unnecessary. Also,
A more remarkable effect can be obtained by removing a small amount of oxide film formed on the solder bumps 6 of the LSI with a laser having a short wavelength such as an excimer laser. In this embodiment, a flip-chip type LSI is used as an embodiment.
Although described above, the present invention is not limited to this. The same can be applied to flat lead type LSI such as QFP.
【００１７】[0017]
【発明の効果】本発明により、部品取外し後、部品ある
いは基板側に残ったはんだをそのまま使用することが可
能となり、接続に必要なはんだを再供給するための残っ
たはんだの除去、はんだの再供給、はんだ球体化等の処
理が不要となる。従って従来これに要した工数及び設備
投資そしてはんだ材が不要となり、大巾な原価低減、工
程の簡略化が可能となる。また、後工程での部品はんだ
付けにフラックスを用いること無くはんだ付けできるた
めフラックス除去のための洗浄が不要となる。According to the present invention, after the parts are removed, the solder remaining on the parts or the board side can be used as it is, and the remaining solder can be removed and the solder can be re-used in order to re-supply the solder necessary for connection. There is no need for supply, processing of solder spheres, etc. Therefore, the man-hours, capital investment, and solder material required for the conventional method are not required, and the cost can be greatly reduced and the process can be simplified. Further, since soldering can be performed without using flux for soldering components in the subsequent process, cleaning for removing flux is not necessary.
【図１】部品取外しの従来方法を説明するための図であ
る。FIG. 1 is a view for explaining a conventional method for removing parts.
【図２】部品取外し後のはんだ供給の従来方法を説明す
るための図出ある。FIG. 2 is a diagram for explaining a conventional method of supplying solder after component removal.
【図３】本発明の実施例１を説明するための図である。FIG. 3 is a diagram for explaining the first embodiment of the present invention.
【図４】横軸に雰囲気中の酸素濃度、縦軸にはんだ球体
化率をとり、両者の関係をプロットしたグラフを示す図
である。FIG. 4 is a diagram showing a graph in which the horizontal axis represents the oxygen concentration in the atmosphere and the vertical axis represents the solder spheroidization rate, and the relationship between the two is plotted.
【図５】本発明の実施例２を説明するための図である。FIG. 5 is a diagram for explaining a second embodiment of the present invention.
【図６】本発明の実施例３を説明するための図である。FIG. 6 is a diagram for explaining a third embodiment of the present invention.
１ テストボード ２ ＬＳＩ ３ はんだ（分離前） ４ ホットプレート ５ 真空ピンセット ６ はんだ（分離後） ６´ はんだ表面酸化膜 ７ ＬＳＩ端子パターン ８ テスト基板端子パターン ９ チャンバー １０ チャンバー開閉扉 １１ Ｎ2ガス導入孔 １２ Ｎ2ガス分配板 １３ 仮固定液 １４ 基板 １５ 基板端子パターン １６ カーボンヒーター １７ はんだ付けチャンバー １８ 真空ポンプ １９ Ｈｅ導入ポート1 Test Board 2 LSI 3 Solder (Before Separation) 4 Hot Plate 5 Vacuum Tweezers 6 Solder (After Separation) 6 ′ Solder Surface Oxide Film 7 LSI Terminal Pattern 8 Test Board Terminal Pattern 9 Chamber 10 Chamber Door 11 N 2 Gas Inlet Hole 12 N 2 gas distribution plate 13 temporary fixative 14 substrate 15 substrate terminal pattern 16 carbon heater 17 soldering chamber 18 vacuum pump 19 He introduction port
───────────────────────────────────────────────────── フロントページの続き (72)発明者 小野 薫 神奈川県秦野市堀山下１番地 株式会社日 立製作所汎用コンピュータ事業部内 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Kaoru Ono 1 Horiyamashita, Hadano City, Kanagawa Prefecture
Claims (8)
低酸素濃度雰囲気中で加熱し、はんだを溶融後、この雰
囲気中で部品を分離することを特徴とする部品取外し方
法。1. A method of removing a component, which comprises heating a component connected to a substrate with a solder material in an atmosphere of low oxygen concentration, melting the solder, and then separating the component in this atmosphere.
て、 前記低酸素濃度雰囲気の酸素濃度が１０００ＰＰＭ以下
であることを特徴とする部品取外し方法。2. The component removing method according to claim 1, wherein the oxygen concentration of the low oxygen concentration atmosphere is 1000 PPM or less.
て、 はんだ溶融後、部品の分離を真空吸引手段により行な
い、該真空吸引手段と部品とが非接触状態で該分離を開
始することを特徴とする部品取外し方法。3. The component removing method according to claim 1, wherein after the solder is melted, the components are separated by vacuum suction means, and the separation is started in a non-contact state between the vacuum suction means and the components. How to remove parts.
て、 はんだ溶融後、部品の分離開始時の前記真空吸引手段の
吸引ノズルと部品との距離が０．０５〜０．３ｍｍであ
ることを特徴とする部品取外し方法。4. The component removing method according to claim 3, wherein the distance between the suction nozzle of the vacuum suction means and the component at the time of starting the component separation after melting the solder is 0.05 to 0.3 mm. Part removal method.
て、 前記部品の分離後における部品のパターン上に残るはん
だ量を該部品または基板の端子パターンの径を変えるこ
とによりコントロールすることを特徴とする部品取外し
方法。5. The component removing method according to claim 1, wherein the amount of solder remaining on the pattern of the component after the component is separated is controlled by changing the diameter of the terminal pattern of the component or the board. How to remove parts.
て、 部品と該部品を取付ける基板の接続において部品の端子
パターン径を基板の端子パターン径より大きくし、該部
品と基板の接続分離後のはんだ量が基板よりも部品に多
く残るようにすることを特徴とする部品取外し方法。6. The component removing method according to claim 5, wherein the terminal pattern diameter of the component is larger than the terminal pattern diameter of the substrate when connecting the component and the substrate on which the component is mounted, and the solder after the connection and separation of the component and the substrate is performed. A method for removing a component, characterized in that a larger amount of the component remains on the component than the substrate.
て、 部品と該部品を取付ける基板の接続において部品の端子
パターン径を基板の端子パターン径より小さくし、該部
品と基板の分離後のはんだ量が部品より基板側に多く残
るようにすることを特徴とする部品取外し方法。7. The component removing method according to claim 5, wherein the terminal pattern diameter of the component is smaller than the terminal pattern diameter of the substrate in connecting the component and the substrate on which the component is mounted, and the amount of solder after the component and the substrate are separated. The component removing method is characterized in that a larger amount of the component remains on the board side than the component.
該部品が取り付けられていた基板とは異る基板の接続個
所に、有機溶材を塗布後搭載し、酸素濃度２ＰＰＭ以下
の雰囲気で該部品及び基板を同時に加熱し、はんだ付け
を行うことを特徴とするはんだ付け方法。8. A component separated by the method according to claim 1,
An organic solvent is applied to a connection portion of a substrate different from the substrate to which the component is attached, and then mounted, and the component and the substrate are simultaneously heated in an atmosphere having an oxygen concentration of 2 PPM or less to perform soldering. How to solder.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP02192096A JP3410601B2 (en) | 1996-01-12 | 1996-01-12 | Component removal and soldering methods |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP02192096A JP3410601B2 (en) | 1996-01-12 | 1996-01-12 | Component removal and soldering methods |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH09199847A true JPH09199847A (en) | 1997-07-31 |
| JP3410601B2 JP3410601B2 (en) | 2003-05-26 |
Family
ID=12068517
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP02192096A Expired - Fee Related JP3410601B2 (en) | 1996-01-12 | 1996-01-12 | Component removal and soldering methods |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3410601B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003037357A (en) * | 2001-07-26 | 2003-02-07 | Matsushita Electric Ind Co Ltd | Soldering method and heating unit |
| JPWO2008015731A1 (en) * | 2006-07-31 | 2009-12-17 | 富士通株式会社 | Soldering method and apparatus for mounting components on a printed wiring board |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06244548A (en) * | 1992-12-25 | 1994-09-02 | Yamaha Corp | Apparatus and method for attaching and detaching of circuit component |
| JPH07235763A (en) * | 1993-12-28 | 1995-09-05 | Hitachi Ltd | Manufacture of electronic circuit |
-
1996
- 1996-01-12 JP JP02192096A patent/JP3410601B2/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06244548A (en) * | 1992-12-25 | 1994-09-02 | Yamaha Corp | Apparatus and method for attaching and detaching of circuit component |
| JPH07235763A (en) * | 1993-12-28 | 1995-09-05 | Hitachi Ltd | Manufacture of electronic circuit |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003037357A (en) * | 2001-07-26 | 2003-02-07 | Matsushita Electric Ind Co Ltd | Soldering method and heating unit |
| JPWO2008015731A1 (en) * | 2006-07-31 | 2009-12-17 | 富士通株式会社 | Soldering method and apparatus for mounting components on a printed wiring board |
| JP5071386B2 (en) * | 2006-07-31 | 2012-11-14 | 富士通株式会社 | Soldering method and apparatus for mounting components on a printed wiring board |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3410601B2 (en) | 2003-05-26 |
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