JPH09194254A - Substrate for semiconductor device - Google Patents

Substrate for semiconductor device

Info

Publication number
JPH09194254A
JPH09194254A JP8005466A JP546696A JPH09194254A JP H09194254 A JPH09194254 A JP H09194254A JP 8005466 A JP8005466 A JP 8005466A JP 546696 A JP546696 A JP 546696A JP H09194254 A JPH09194254 A JP H09194254A
Authority
JP
Japan
Prior art keywords
substrate
silicon carbide
alumina
ceramic substrate
added
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8005466A
Other languages
Japanese (ja)
Inventor
Shizuyasu Yoshida
静安 吉田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP8005466A priority Critical patent/JPH09194254A/en
Publication of JPH09194254A publication Critical patent/JPH09194254A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]

Landscapes

  • Ceramic Products (AREA)
  • Compositions Of Oxide Ceramics (AREA)

Abstract

PROBLEM TO BE SOLVED: To obtain an insulating substrate for a power semiconductor module having increased strength and increased heat conductivity. SOLUTION: Silicon carbide is added to alumina by 5-30mass% and a sintering aid such as yttria is further added by 0-10% of the total, amt. of the alumina and silicon carbide to produce the objective ceramic substrate having mechanical strength increased by 10-56% and heat conductivity increased by 15-180%. When the ceramic substrate is made thin, the electric resistance is considerably increased, e.g., by 4 times in the case of 30mass% added silicon carbide.

Description

【発明の詳細な説明】Detailed Description of the Invention

【発明の属する技術分野】本発明は、パワートランジス
タモジュールなどにおいて半導体チップを半田付け等に
より搭載する半導体装置用の絶縁基板に関し、特にセラ
ミックス基板に箔状の銅板を直接接合したCBC基板(C
eramic Bonding Copper Substrate)に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an insulating substrate for a semiconductor device in which a semiconductor chip is mounted in a power transistor module or the like by soldering, and more particularly, a CBC substrate (C) in which a foil-shaped copper plate is directly bonded to a ceramic substrate.
eramic Bonding Copper Substrate).

【従来の技術】まず、セラミックス基板に銅板を直接接
合したCBC基板を用いたパワートランジスタモジュー
ルの例の断面を図3に示す。図3において、パワートラ
ンジスタモジュールは、放熱金属ベース1上に半田等で
固着されたCBC基板2と、この上にマウントされたI
GBT等の半導体チップ3と、屈曲先端部がCBC基板
2の表面銅板2cの回路パターンに半田接続された外部
導出端子4と、複数の外部導出端子4を相互固定する端
子ブロック7と、半導体チップ3と外部導出端子4の屈
曲先端部が固着した回路パターンとを接続するボンディ
ングワイヤ5と、放熱金属ベース1と樹脂ケース6を接
着剤等で固着し、その内部空間に充填されたゲル状樹脂
9と、樹脂ケース6を閉蓋する封止樹脂8とを有してい
る。ここで、CBC基板2は、アルミナ(Al2 3
あるいは窒化アルミニウム(AlN)などのセラミック
ス基板(絶縁芯板)2aに対し、その表裏両面に箔状の
薄い銅板2b、2cを、銅と微量の酸素の反応で生成す
るCu−O共晶液相を接合剤として用いて接合する方法
により直接接合したものである。主面側(表面側)の銅
板2cに回路パターン(厚膜回路パターン)が形成され
ており、そこに半導体チップ3がダイボンディングされ
ている。
2. Description of the Related Art First, FIG. 3 shows a cross section of an example of a power transistor module using a CBC substrate in which a copper plate is directly bonded to a ceramics substrate. In FIG. 3, the power transistor module includes a CBC substrate 2 fixed on a heat-dissipating metal base 1 with solder or the like, and an I mounted on the CBC substrate 2.
A semiconductor chip 3 such as a GBT, an external lead-out terminal 4 whose bent tip portion is solder-connected to a circuit pattern of the surface copper plate 2c of the CBC substrate 2, a terminal block 7 for mutually fixing the plurality of external lead-out terminals 4, and a semiconductor chip 3 and the bonding wire 5 for connecting the circuit pattern to which the bent tip portion of the external lead-out terminal 4 is fixed, the heat radiating metal base 1 and the resin case 6 are fixed by an adhesive agent, and the gel-like resin filled in the internal space thereof. 9 and a sealing resin 8 that closes the resin case 6. Here, the CBC substrate 2 is made of alumina (Al 2 O 3 )
Alternatively, with respect to a ceramic substrate (insulating core plate) 2a such as aluminum nitride (AlN), thin copper plates 2b and 2c in a foil shape are formed on both front and back surfaces thereof by a Cu-O eutectic liquid phase which is generated by a reaction between copper and a slight amount of oxygen. Is used as a bonding agent and is directly bonded. A circuit pattern (thick film circuit pattern) is formed on the copper plate 2c on the main surface side (front surface side), and the semiconductor chip 3 is die-bonded thereto.

【発明が解決しようとする課題】ところで、上記のよう
なCBC基板をパワートランジスタモジュールなどのパ
ワー半導体チップを搭載する厚膜回路基板として用いた
場合、次のような問題点がある。すなわち、パワートラ
ンジスタなどの半導体チップでは、通電動作に伴い多量
の熱を発生し、その熱がCBC基板2を介して放熱金属
ベース1に伝導した後に、放熱金属ベース1より外部に
放熱されるようになっているため、CBC基板2の熱伝
導性の良否が半導体装置自体の電流容量を左右する重要
な要因となっている。しかしながら、CBC基板2はセ
ラミックス基板2aを絶縁基材(芯材)として、これに
銅板2b、2cを張り合わせた積層構造であるために、
熱伝導性が比較的低い。ここで、セラミックス基板2a
の材質として用いているアルミナと窒化アルニウムの熱
伝導率は次の通りである。 アルミナ: 21W/(K・m) 窒化アルミニウム: 180W/(K・m) 窒化アルミニウムのほうがアルミナに比べて熱伝導性が
はるかに優れているものの、窒化アルミニウムはアルミ
ナに比べて材料コストが高いという欠点がある。かかる
状況において、本発明者は、材料費の安いアルミナを用
いて作製されたセラミックス基板に対し、放熱性を高め
るために基板の板厚を極力薄くして伝熱抵抗を小さく抑
えることを試みた。しかしながら、アルミナ原料のセラ
ミックス基板の板厚を例えば0.3mm程度まで薄くす
ると、基板の実強度(衝撃に対する抵抗性)が低下し、
これが基で半導体チップ(シリコン)3と銅板2cとの
接合固着時に、各材料の熱膨張係数差に起因する熱応力
によって、薄板化したセラミックス基板2aにクラック
や割れ等の不良を引き起こすことが明らかになった。な
お、上記各材料の熱膨張係数を列記すると次の通りであ
る。 シリコン(半導体チップ): 4.0×10-6/K アルミナ: 7.5×10-6/K 銅: 18.0×10-6/K 本発明は、上記の問題に鑑みなされたものであって、原
料費の安価なアルミナ粉体を主材としたセラミックス基
板に関し、その材料組成を改良することにより、素材の
熱伝導率と機械的強度を高め、これにより基板自身の薄
板化と併せて放熱性の改善が図れるようにした半導体装
置用基板を提供することを目的とする。
However, when the above-mentioned CBC substrate is used as a thick-film circuit board on which a power semiconductor chip such as a power transistor module is mounted, there are the following problems. That is, in a semiconductor chip such as a power transistor, a large amount of heat is generated in accordance with an energizing operation, and the heat is conducted to the heat-dissipating metal base 1 via the CBC substrate 2 and then dissipated outside from the heat-dissipating metal base 1. Therefore, the quality of the thermal conductivity of the CBC substrate 2 is an important factor influencing the current capacity of the semiconductor device itself. However, since the CBC substrate 2 has a laminated structure in which the ceramic substrate 2a is used as an insulating base material (core material) and the copper plates 2b and 2c are bonded to it,
Thermal conductivity is relatively low. Here, the ceramic substrate 2a
The thermal conductivity of the alumina and the aluminum nitride used as the material of the is as follows. Alumina: 21 W / (K · m) Aluminum nitride: 180 W / (K · m) Although aluminum nitride has much higher thermal conductivity than alumina, aluminum nitride has a higher material cost than alumina. There are drawbacks. In such a situation, the present inventor tried to suppress the heat transfer resistance to a ceramic substrate made of alumina, which has a low material cost, by reducing the thickness of the substrate as much as possible in order to improve heat dissipation. . However, when the thickness of the ceramic substrate made of alumina raw material is reduced to, for example, about 0.3 mm, the actual strength (resistance to impact) of the substrate decreases,
Based on this, it is clear that when the semiconductor chip (silicon) 3 and the copper plate 2c are bonded and fixed to each other, defects such as cracks and cracks are caused in the thinned ceramic substrate 2a due to the thermal stress caused by the difference in the thermal expansion coefficient of each material. Became. The thermal expansion coefficients of the above materials are listed below. Silicon (semiconductor chip): 4.0 × 10 −6 / K Alumina: 7.5 × 10 −6 / K Copper: 18.0 × 10 −6 / K The present invention has been made in view of the above problems. Therefore, regarding the ceramic substrate mainly made of alumina powder whose raw material cost is low, by improving the material composition, the thermal conductivity and mechanical strength of the raw material are increased, which enables the thinning of the substrate itself. It is an object of the present invention to provide a substrate for a semiconductor device in which heat dissipation can be improved.

【課題を解決するための手段】上記課題を解決するため
に、本発明に係る半導体装置用のセラミックス基板は、
アルミナを主成分として、これに炭化ケイ素を添加して
作製したセラミックス焼結体よりなることを特徴とす
る。そのような半導体装置用基板は、アルミナ単体のセ
ラミックス基板に比べて熱伝導率が向上し、機械的強
度、特に曲げ強度が大幅に高まる。ここで、アルミナの
質量比は70%以上95%以下の範囲、炭化ケイ素の質
量比は5%以上30%以下の範囲にあることが望まし
い。そのような範囲とすることにより、熱伝導率、機械
的強度だけでなく、体積固有抵抗率が大きく保たれる。
更に、イットリア、カルシア、マグネシア、セリア、酸
化マンガンおよびシリカのうちの少なくとも一種類を
0.5〜10%含有するものとする。この範囲のこれら
の添加剤により、アルミナに分散している炭化ケイ素の
焼結が促進するため、セラミックス基板の焼成温度を低
めに抑えることができ、かつ、強度の優れたアルミナ基
板が得られる。表裏面に箔状の銅板を接合してなる、特
に、回路構成した箔状の銅板を直接接合してなる半導体
装置用基板がよい。そのようにすれば、基板自身を薄型
化することで、半導体装置の基板として放熱性に優れた
CBC基板となる。
In order to solve the above problems, a ceramic substrate for a semiconductor device according to the present invention is
It is characterized by being made of a ceramics sintered body produced by adding silicon carbide to alumina as a main component. Such a substrate for a semiconductor device has an improved thermal conductivity as compared with a ceramic substrate made of a simple substance of alumina, and the mechanical strength, especially the bending strength is significantly increased. Here, it is desirable that the mass ratio of alumina be 70% or more and 95% or less, and the mass ratio of silicon carbide be 5% or more and 30% or less. With such a range, not only the thermal conductivity and mechanical strength, but also the volume resistivity can be kept large.
Further, 0.5 to 10% of at least one of yttria, calcia, magnesia, ceria, manganese oxide, and silica is contained. With these additives in this range, the sintering of silicon carbide dispersed in alumina is promoted, so that the firing temperature of the ceramics substrate can be kept low and an alumina substrate having excellent strength can be obtained. A substrate for a semiconductor device, which is formed by bonding foil-shaped copper plates to the front and back surfaces, and in particular, is formed by directly bonding circuit-configured foil-shaped copper plates. By doing so, by thinning the substrate itself, it becomes a CBC substrate excellent in heat dissipation as a substrate of a semiconductor device.

【発明の実施の形態】以下図面を参照しながら本発明の
実施例について説明する。なお以下に示す混合比は、質
量%で表したが、重量%でも同じである。最初に、セラ
ミックス基板の製造方法を説明する。まず、アルミナ
(Al2 3 )〔例えば住友化学製Al−M43〕に平
均粒径0.4〜0.5μmの炭化ケイ素(SiC)〔例
えば昭和電工製〕と焼結助剤としてイットリア(Y2
3 )〔例えば信越化学製99.9%のもの〕などを添加
して粉砕混合し、さらにバインダーとしてポリビニルブ
チラール(以下PVB)を8%、溶剤としてトルエン、
キシレン混合液を50%、可塑剤としてフタル酸ジオク
チル(DOP)を2%添加して約20時間混練した後、
ドクターブレード法によりシート状に成形してグリーン
シートを得る。次に、そのグリーンシートをプレス加工
により所定の形状に形抜きした後、酸化雰囲気中で70
0℃に昇温加熱し、成形体中のバインダーを除去した。
更に、その成形体を、常圧の窒素あるいは窒素を含むア
ルゴンの不活性雰囲気中で、温度1550℃〜1750
で焼成し、板厚約0.3mmのセラミックス基板の焼結
体を得る。 〔実験1〕上記のようにアルミナに炭化ケイ素を添加し
て作製したセラミックス基板の機械的特性を評価するた
めに、炭化ケイ素の添加量を0から50%の範囲で、前
記の方法で試験片(板厚0.3mm、幅26mm、長さ
50mm)を作製し、この試験片について曲げ強度試験
を行った。尚、それぞれの組成で焼結助剤としてイット
リアをアルミナと炭化ケイ素の全量に対し5%添加し
た。図1に、この強度試験結果を示す。横軸は炭化ケイ
素添加量〔=炭化ケイ素/(アルミナ+炭化ケイ
素)〕、縦軸は曲げ強度である。図からわかるように炭
化ケイ素の添加量が増すほど、機械的強度はアルミナ単
体(炭化ケイ素添加量=0%)のセラミックス基板(強
度約320MPa)より増大し、最大では、約510M
Paにも向上することが認められた。最大強度組成は約
40%である。炭化ケイ素添加量の5〜30%に対して
は、機械的強度の増大分は約10〜56%である。ま
た、炭化ケイ素添加量を30%としたセラミックス基板
の試験片とアルミナ単体で作成した同寸法の試験片につ
いて、支点間距離40mmでの曲げ試験時のの最大たわ
み量を調べたところ、アルミナ単体の試験片でのたわみ
量が0.35mmであるのに対し、炭化ケイ素添加の試
験片では、0.5mmであった。従って、炭化ケイ素を
添加することによって、強度が向上するだけでなく、弾
性も備えた強靱なセラミックス基板になることがわか
る。炭化ケイ素添加量が40%を越す範囲では、強度が
急激に低下している。これは炭化ケイ素添加量が40%
を越すと、焼結性が低下し緻密な焼結体とならないため
である。炭化ケイ素添加量が40%以上では、嵩密度の
測定においても密度の低下が認められ、焼結不足が確認
されている。一方、これらの試験片について熱伝導率を
調べた結果を、図2に示す。横軸は同じく炭化ケイ素添
加量、縦軸は熱伝導率である。図から、炭化ケイ素の添
加量の増加とともに、熱伝導率が向上することが認めら
れる。最高熱伝導率は、炭化ケイ素40%において、熱
伝導率が、73W/(K・m)であった。炭化ケイ素添
加量の5〜30%に対しては、熱伝導率の増大分は約1
5〜180%である。また炭化ケイ素が40%以上で
は、熱伝導率が急激に低下している。これは上述の強度
と同じく、炭化ケイ素が40%以上になると、焼結性が
低下し緻密な焼結体とならないためである。従って、セ
ラミックス基板の材料組成として、アルミナに炭化ケイ
素を添加することにより、アルミナだけのセラミックス
基板より機械的強度が向上するだけでなく、伝熱性にお
いても高熱伝導率を得ることができることがわかった。
更に、アルミナに炭化ケイ素を0〜50%添加して機械
的特性を評価するために作製したセラミックス基板の試
験片(板厚0.3mm)を用いて、その体積固有抵抗率
を測定した。その結果、体積固有抵抗率は炭化ケイ素添
加量が増すにつれて、低下するが、30%以下の添加量
では1014Ω・m以上であり、実用的に問題のない値で
あった。これらの機械的強度、熱伝導率および絶縁性の
結果から、炭化ケイ素を添加したアルミナのセラミック
ス基板としては、炭化ケイ素の添加量が、5〜30%で
あることが総合的に望ましいことがわかった。なお、前
記の材料組成で添加した5%のイットリアは、アルミ
ナ、炭化ケイ素の焼結助剤として添加したものであった
が、実験の結果、添加量の範囲としては、0.5〜10
%の範囲に定めるのが良いことがわかった。すなわち、
イットリアの添加量が0.5%未満であると、焼結が進
行し難くなり、基板の焼結に1750℃以上の加熱温度
が必要となって、基板の製造が困難となる。また、添加
量を10%超過にすると、セラミックス基板の収縮率,
強度に大きなばらつきが生じるようになる。なお、イッ
トリア以外に、カルシア、マグネシア、セリア、酸化マ
ンガンおよびシリカのうち、一種類または複数種類添加
しても同様の焼結としての効果が得られることが確認さ
れている。 〔実施例1〕炭化ケイ素添加量を30%とした素材か
ら、先に述べた方法でセラミックス基板(板厚0.3m
m)を作製し、その炭化ケイ素添加のセラミックス基板
の表裏両面に板厚0.3mmのタフピッチ電解銅を重ね
合わせ、温度1050〜1070℃の窒素雰囲気中で1
0分間加熱し、セラミックス基板と銅板を直接接合して
CBC基板を作製した。得られたCBC基板を用いて図
3に断面を示したようなトランジスタモジュールを組立
てた。また比較例として、別途、板厚0.63mm、
0.3mmのアルミナ単体のアルミナ基板で作製したC
BC基板を用いて同様なトランジスタモジュールを組立
て、これらに対して機械的な変形耐性試験および断続通
電試験を行った。まず、変形耐性試験では放熱金属ベー
スに外力を加えて強制的な変形を与え、基板の絶縁不良
に至るまでの変形量を調べた。この結果、アルミナに炭
化ケイ素を添加したセラミックス基板(板厚0.3m
m)と板厚0.63mmのアルミナ単体のアルミナ基板
とでは殆ど同等な耐性を示したが、板厚0.3mmのア
ルミナ基板は、約半分の変形量で絶縁不良となることが
わかった。つまり、アルミナに炭化ケイ素を適量添加す
ることにより、実用的にはセラミックス基板の板厚を約
1/2まで薄くすることが可能であることが実証され
た。また、断続通電試験では、炭化ケイ素添加のセラミ
ックス基板(板厚0.3mm)は、板厚0.63mmの
アルミナ基板と比べて、同一のコレクタ損失を与えたと
きの半導体チップを接合した銅板(2c)部分での温度
上昇ΔTjが約40%低減し、断続通電耐量が4倍に向
上することが認められた。このことからわかるように、
アルミナに炭化ケイ素を添加したセラミックス基板は、
アルミナ単体の基板と比べて機械的特性に優れており、
基板自身の熱伝導性の向上と薄板化とにより、放熱性の
高い半導体装置用基板として使用可能なことがわかっ
た。なお、上記の実施例では、セラミックス基板の板厚
を0.3mmとしたが、シート成形法によれば、板厚
0.05〜1mmの基板を形成することができる。また
原料粉にポリビニルアルコールPVA等の結合材を添加
し、湿式混合後、スプレードライヤーで乾燥造粒すれ
ば、その造粒粉を用いてプレス成形することにより、板
厚1mm以上の基板を形成することも可能である。
BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. Note that the mixing ratios shown below are expressed in mass%, but the same applies to weight%. First, a method for manufacturing a ceramic substrate will be described. First, alumina (Al 2 O 3 ) [eg Sumitomo Chemical Al-M43] with silicon carbide (SiC) having an average particle size of 0.4 to 0.5 μm [eg Showa Denko] and yttria (Y) as a sintering aid. 2 O
3 ) [For example, 99.9% manufactured by Shin-Etsu Chemical] and the like are added and pulverized and mixed, and further 8% polyvinyl butyral (hereinafter PVB) as a binder, toluene as a solvent,
After adding 50% xylene mixed solution and 2% dioctyl phthalate (DOP) as a plasticizer and kneading for about 20 hours,
A green sheet is obtained by forming a sheet by the doctor blade method. Next, after pressing the green sheet into a predetermined shape by pressing, the green sheet is subjected to 70% in an oxidizing atmosphere.
The binder was removed from the molded body by heating to 0 ° C. and heating.
Furthermore, the molded body is heated in an inert atmosphere of nitrogen or argon containing nitrogen at a temperature of 1550 ° C. to 1750 ° C.
Is fired to obtain a ceramic substrate sintered body having a plate thickness of about 0.3 mm. [Experiment 1] In order to evaluate the mechanical properties of the ceramic substrate produced by adding silicon carbide to alumina as described above, a test piece was prepared by the method described above with the addition amount of silicon carbide being in the range of 0 to 50%. (Plate thickness 0.3 mm, width 26 mm, length 50 mm) was prepared, and a bending strength test was performed on this test piece. In each composition, yttria was added as a sintering aid in an amount of 5% with respect to the total amount of alumina and silicon carbide. FIG. 1 shows the result of this strength test. The horizontal axis represents the amount of silicon carbide added [= silicon carbide / (alumina + silicon carbide)], and the vertical axis represents the bending strength. As can be seen from the figure, as the amount of silicon carbide added increases, the mechanical strength increases more than that of a ceramic substrate (strength about 320 MPa) of alumina alone (the amount of silicon carbide added = 0%), and the maximum is about 510M.
It was confirmed that the value also improved to Pa. The maximum strength composition is about 40%. With respect to 5 to 30% of the amount of silicon carbide added, the increase in mechanical strength is about 10 to 56%. Moreover, when the maximum deflection amount of the test piece of the ceramic substrate with the added amount of silicon carbide of 30% and the test piece of the same size made of alumina alone was examined during the bending test at the distance between fulcrums of 40 mm, the alumina alone was found. The amount of deflection of the test piece of No. 3 was 0.35 mm, while that of the test piece containing silicon carbide was 0.5 mm. Therefore, it can be seen that the addition of silicon carbide not only improves the strength but also makes it a tough ceramic substrate having elasticity. In the range where the amount of silicon carbide added exceeds 40%, the strength sharply decreases. This is because the amount of silicon carbide added is 40%
This is because if it exceeds the above range, the sinterability will be reduced and a dense sintered body will not be obtained. When the amount of silicon carbide added is 40% or more, a decrease in density is recognized in the measurement of bulk density, and insufficient sintering is confirmed. On the other hand, the results of examining the thermal conductivity of these test pieces are shown in FIG. Similarly, the horizontal axis represents the amount of silicon carbide added, and the vertical axis represents the thermal conductivity. From the figure, it can be seen that the thermal conductivity improves as the amount of silicon carbide added increases. The highest thermal conductivity was 40% silicon carbide, and the thermal conductivity was 73 W / (K · m). For 5 to 30% of the amount of silicon carbide added, the increase in thermal conductivity is about 1
5 to 180%. Further, when the content of silicon carbide is 40% or more, the thermal conductivity sharply decreases. This is because, as with the above-mentioned strength, when the content of silicon carbide is 40% or more, the sinterability is deteriorated and a dense sintered body cannot be obtained. Therefore, it was found that, by adding silicon carbide to alumina as the material composition of the ceramic substrate, not only the mechanical strength is improved as compared with the ceramic substrate made of only alumina, but also high thermal conductivity can be obtained in terms of heat conductivity. .
Further, a volume resistivity of the ceramic substrate was measured using a test piece (plate thickness: 0.3 mm) of a ceramic substrate prepared by adding 0 to 50% of silicon carbide to alumina to evaluate mechanical properties. As a result, the volume resistivity decreased as the amount of silicon carbide added increased, but was 10 14 Ω · m or more at an amount of 30% or less, which was a practically no problem. From these results of mechanical strength, thermal conductivity and insulating property, it was found that it is generally desirable that the amount of silicon carbide added be 5 to 30% for the alumina ceramic substrate to which silicon carbide is added. It was The 5% yttria added in the above material composition was added as a sintering aid for alumina and silicon carbide, but as a result of experiments, the range of addition amount was 0.5-10.
It turns out that it is better to set it in the range of%. That is,
If the amount of yttria added is less than 0.5%, it becomes difficult for sintering to proceed, and a heating temperature of 1750 ° C. or higher is required for sintering the substrate, which makes it difficult to manufacture the substrate. Also, if the addition amount exceeds 10%, the shrinkage rate of the ceramic substrate,
Large variations in strength will occur. It has been confirmed that, in addition to yttria, one or more kinds of calcia, magnesia, ceria, manganese oxide, and silica can be added to obtain the same effect as sintering. Example 1 A ceramic substrate (plate thickness 0.3 m
m) was prepared, and tough pitch electrolytic copper having a plate thickness of 0.3 mm was superposed on both front and back surfaces of the silicon carbide-added ceramics substrate, and the temperature was 1050 to 1070 ° C.
The ceramic substrate and the copper plate were directly bonded by heating for 0 minutes to produce a CBC substrate. A transistor module having a cross section shown in FIG. 3 was assembled using the obtained CBC substrate. As a comparative example, a plate thickness of 0.63 mm,
C prepared on an alumina substrate of 0.3 mm alumina alone
Similar transistor modules were assembled using the BC substrate, and a mechanical deformation resistance test and an intermittent current test were performed on these. First, in the deformation resistance test, an external force was applied to the heat-dissipating metal base to forcibly deform it, and the amount of deformation until the insulation failure of the substrate was examined. As a result, a ceramic substrate (plate thickness 0.3 m
m) and an alumina substrate with a plate thickness of 0.63 mm having almost the same resistance as alumina, but an alumina substrate with a plate thickness of 0.3 mm was found to have poor insulation with a deformation amount of about half. That is, it was proved that the plate thickness of the ceramic substrate can be practically reduced to about 1/2 by adding an appropriate amount of silicon carbide to alumina. Further, in the intermittent current test, the silicon carbide-added ceramics substrate (plate thickness 0.3 mm) was bonded to the semiconductor plate when the same collector loss was given, as compared with the alumina substrate having a plate thickness 0.63 mm ( It was confirmed that the temperature rise ΔTj in the portion 2c) was reduced by about 40% and the intermittent current resistance was improved four times. As you can see from this,
The ceramic substrate with silicon carbide added to alumina is
It has superior mechanical properties compared to a substrate made of alumina alone,
By improving the thermal conductivity of the substrate itself and making it thinner, it has been found that it can be used as a substrate for semiconductor devices with high heat dissipation. Although the ceramic substrate has a plate thickness of 0.3 mm in the above-described examples, the sheet forming method can form a substrate having a plate thickness of 0.05 to 1 mm. A binder having a thickness of 1 mm or more is formed by adding a binder such as polyvinyl alcohol PVA to the raw material powder, wet-mixing, and dry granulating with a spray dryer, and press-molding using the granulated powder. It is also possible.

【発明の効果】以上説明したように、本発明によれば、
CBC基板のセラミックス基板として、アルミナに炭化
ケイ素を添加し、高温焼成したセラミックス基板を用い
ることにより、従来のアルミナ単体のアルミナ基板に比
較して機械的強度が大幅に増強でき、さらに高熱伝導率
が得られる。従って、実用上でセラミックス基板の薄型
化が可能となる。また炭化ケイ素のアルミナに対する含
有量を制御することにより絶縁特性の優れたセラミック
ス基板を形成することができる。特に、アルミナの質量
比が70〜95%の範囲、炭化ケイ素の質量比が5〜3
0%の範囲、イットリア、カルシア、マグネシア、セリ
ア、酸化マンガン、シリカのうち一種以上がアルミナと
炭化ケイ素の全量に対して0.5〜10%添加されたも
のは、実用的に優れた機械的強度と高熱伝導率のセラミ
ックス基板を得ることができ、半導体装置用基板とし
て、強度、熱伝導性、絶縁性、低コストの点で優れてい
る。これにより半導体装置用の基板として放熱性の高い
CBC基板が得られ、特にパワートランジスタモジュー
ルなどの基板に適用することで、半導体装置の小型化、
低コスト化並びに電流容量の増大化を図ることができ
る。なお、このセラミックス基板は、基板単体としての
機械的特性が優れていることから、ハイブリッドIC回
路基板,あるいはICパッケージなどに適用しても同様
の効果をもたらすものである。
As described above, according to the present invention,
By using a ceramic substrate obtained by adding silicon carbide to alumina and firing it at a high temperature as the ceramic substrate of the CBC substrate, mechanical strength can be significantly enhanced as compared with the conventional alumina substrate of simple alumina, and further high thermal conductivity can be obtained. can get. Therefore, it is possible to make the ceramic substrate thinner in practical use. Further, by controlling the content of silicon carbide with respect to alumina, it is possible to form a ceramic substrate having excellent insulating properties. In particular, the mass ratio of alumina is in the range of 70 to 95%, and the mass ratio of silicon carbide is 5 to 3
In the range of 0%, one or more of yttria, calcia, magnesia, ceria, manganese oxide, and silica added in an amount of 0.5 to 10% with respect to the total amount of alumina and silicon carbide has a practically excellent mechanical property. A ceramic substrate having high strength and high thermal conductivity can be obtained, and it is excellent as a substrate for a semiconductor device in terms of strength, thermal conductivity, insulation and low cost. As a result, a CBC substrate having a high heat dissipation property can be obtained as a substrate for a semiconductor device, and particularly when applied to a substrate such as a power transistor module, miniaturization of the semiconductor device,
The cost can be reduced and the current capacity can be increased. Since this ceramic substrate has excellent mechanical properties as a single substrate, it has the same effect when applied to a hybrid IC circuit substrate, an IC package, or the like.

【図面の簡単な説明】[Brief description of the drawings]

【図1】炭化ケイ素添加量と基板の曲げ強度との関係を
表す図
FIG. 1 is a diagram showing the relationship between the amount of silicon carbide added and the bending strength of a substrate.

【図2】炭化ケイ素添加量と基板の熱伝導率との関係を
表す図
FIG. 2 is a diagram showing the relationship between the amount of silicon carbide added and the thermal conductivity of the substrate.

【図3】CBC基板を用いたトランジスタモジュールの
断面図
FIG. 3 is a sectional view of a transistor module using a CBC substrate.

【符号の説明】[Explanation of symbols]

1 放熱金属ベース 2 CBC基板 2a セラミックス基板 2b,2c 銅板 3 半導体チップ 4 外部導出端子 5 ボンディングワイヤ 6 樹脂ケース 7 端子ブロック 8 封止樹脂 9 ゲル状充填材 1 Heat Dissipation Metal Base 2 CBC Substrate 2a Ceramics Substrate 2b, 2c Copper Plate 3 Semiconductor Chip 4 External Lead-out Terminal 5 Bonding Wire 6 Resin Case 7 Terminal Block 8 Sealing Resin 9 Gel Filling Material

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】アルミナを主成分として、炭化ケイ素を添
加して作製したセラミックス焼結体よりなることを特徴
とする半導体装置用基板。
1. A substrate for a semiconductor device, comprising a ceramics sintered body produced by adding silicon carbide to alumina as a main component.
【請求項2】セラミックス焼結体の材料組成比が、アル
ミナ(質量)70〜95%、炭化ケイ素5〜30%の範
囲内であることを特徴とする請求項1に記載の半導体装
置用基板。
2. The substrate for a semiconductor device according to claim 1, wherein the material composition ratio of the ceramics sintered body is in the range of alumina (mass) 70 to 95% and silicon carbide 5 to 30%. .
【請求項3】イットリア、カルシア、マグネシア、セリ
ア、酸化マンガンまたはシリカのうちの少なくとも一種
類をアルミナと炭化ケイ素の全量に対して0.5〜10
%含有することを特徴とする請求項1または2に記載の
半導体装置用基板。
3. At least one of yttria, calcia, magnesia, ceria, manganese oxide or silica is used in an amount of 0.5 to 10 with respect to the total amount of alumina and silicon carbide.
%, The semiconductor device substrate according to claim 1 or 2.
【請求項4】セラミックス焼結体の表裏面に箔状の銅板
を接合してなることを特徴とする請求項1ないし3のい
ずれかに記載の半導体装置用基板。
4. The substrate for a semiconductor device according to claim 1, wherein a foil-shaped copper plate is bonded to the front and back surfaces of the ceramic sintered body.
JP8005466A 1996-01-17 1996-01-17 Substrate for semiconductor device Pending JPH09194254A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8005466A JPH09194254A (en) 1996-01-17 1996-01-17 Substrate for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8005466A JPH09194254A (en) 1996-01-17 1996-01-17 Substrate for semiconductor device

Publications (1)

Publication Number Publication Date
JPH09194254A true JPH09194254A (en) 1997-07-29

Family

ID=11612024

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8005466A Pending JPH09194254A (en) 1996-01-17 1996-01-17 Substrate for semiconductor device

Country Status (1)

Country Link
JP (1) JPH09194254A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003089573A (en) * 2001-09-11 2003-03-28 Kyocera Corp Nonmagnetic ceramics, production method therefor, and steel sheet for magnetic head obtained by using the same
CN113185270A (en) * 2021-05-12 2021-07-30 四川锐宏电子科技有限公司 Ceramic-based printed circuit board and preparation process thereof
WO2023032748A1 (en) * 2021-08-30 2023-03-09 日油株式会社 Heat-dissipating circuit board, heat-dissipating member, and production method for heat-dissipating circuit board

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003089573A (en) * 2001-09-11 2003-03-28 Kyocera Corp Nonmagnetic ceramics, production method therefor, and steel sheet for magnetic head obtained by using the same
CN113185270A (en) * 2021-05-12 2021-07-30 四川锐宏电子科技有限公司 Ceramic-based printed circuit board and preparation process thereof
WO2023032748A1 (en) * 2021-08-30 2023-03-09 日油株式会社 Heat-dissipating circuit board, heat-dissipating member, and production method for heat-dissipating circuit board

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