JPH09190954A - Semiconductor substrate and its manufacture - Google Patents
Semiconductor substrate and its manufactureInfo
- Publication number
- JPH09190954A JPH09190954A JP2035096A JP2035096A JPH09190954A JP H09190954 A JPH09190954 A JP H09190954A JP 2035096 A JP2035096 A JP 2035096A JP 2035096 A JP2035096 A JP 2035096A JP H09190954 A JPH09190954 A JP H09190954A
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- Prior art keywords
- semiconductor substrate
- oxygen
- heat treatment
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Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は半導体基板およびそ
の製造方法に関し、より詳細には外周部における酸素析
出物の密度が制御された半導体基板およびその製造方法
に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor substrate and a method for manufacturing the same, and more particularly to a semiconductor substrate in which the density of oxygen precipitates in the outer peripheral portion is controlled and a method for manufacturing the same.
【0002】[0002]
【従来の技術】LSI等の集積回路形成用基板として用
いられる半導体基板の大部分はSi単結晶から製造され
ており、このSi単結晶は石英坩堝内に充填されたSi
溶融液を回転させながら引き上げるチョクラルスキー法
(CZ法)と呼ばれる引き上げ方法により形成されてい
る。2. Description of the Related Art Most of semiconductor substrates used as substrates for forming integrated circuits such as LSI are manufactured from Si single crystals, and the Si single crystals are filled in a quartz crucible.
It is formed by a pulling method called the Czochralski method (CZ method) of pulling the melt while rotating it.
【0003】Si単結晶をCZ法を用いて成長させる
と、石英坩堝自身がSi溶融液に溶解して酸素を溶出
し、この酸素は固液界面からSi単結晶中に(5〜2
0)×1017個/cm3 程度の濃度で取り込まれる。こ
のうち、Si単結晶中の酸素濃度が約10×1017個/
cm3 以上となっている場合には、LSI製造における
熱処理時に酸素がSi半導体基板(以下、単に半導体基
板と記す)内に析出し、SiO2 構造に変化する。その
結果、体積が膨張して前記酸素析出物の周囲に歪みが生
じる場合があり、歪みがある臨界値を超えると転位が発
生する。これらの酸素析出物及び転位が前記半導体基板
の表面から数μmの範囲(LSI素子の活性領域)に存
在する場合、酸化膜耐圧の低下やリーク電流の発生等が
生じ、LSIにとって有害となる。When a Si single crystal is grown by the CZ method, the quartz crucible itself dissolves in the Si melt to dissolve out oxygen, and this oxygen is introduced from the solid-liquid interface into the Si single crystal (5 to 2).
0) It is taken in at a concentration of about 10 17 pieces / cm 3 . Of these, the oxygen concentration in the Si single crystal is approximately 10 × 10 17 /
When it is at least 3 cm 3 , oxygen precipitates in the Si semiconductor substrate (hereinafter, simply referred to as a semiconductor substrate) during the heat treatment in the LSI manufacturing, and changes into a SiO 2 structure. As a result, the volume may expand and strain may occur around the oxygen precipitates, and dislocation occurs when the strain exceeds a certain critical value. When these oxygen precipitates and dislocations are present within a range of several μm from the surface of the semiconductor substrate (active region of the LSI element), the breakdown voltage of the oxide film is reduced and leak current is generated, which is harmful to the LSI.
【0004】上記の理由により、近年、酸素濃度が(5
〜10)×1017個/cm3 の範囲にある半導体基板
(いわゆる低酸素濃度半導体基板)がLSI等の集積回
路形成用基板として用いられはじめている。この低酸素
濃度半導体基板においては、LSI製造における熱処理
時に酸素の析出がほとんどなく、このためLSIの製造
歩留りが非常に高くなる。Due to the above reasons, in recent years, the oxygen concentration is (5
-10) × 10 17 / cm 3 semiconductor substrates (so-called low oxygen concentration semiconductor substrates) have begun to be used as substrates for forming integrated circuits such as LSIs. In this low oxygen concentration semiconductor substrate, there is almost no precipitation of oxygen during the heat treatment in the LSI manufacturing, and therefore the manufacturing yield of the LSI becomes very high.
【0005】[0005]
【発明が解決しようとする課題】しかしながら、上記し
た低酸素濃度半導体基板においては、LSI製造におけ
る熱処理時(特に熱処理炉からの基板搬出中)に起きる
局所的な熱応力により外周部からスリップ(転位がすべ
り運動してできるすべり帯)とよばれる欠陥が発生し易
く、基板強度が低下し易いという課題があった。However, in the above-mentioned low oxygen concentration semiconductor substrate, slip (dislocation) occurs from the outer peripheral portion due to local thermal stress that occurs during heat treatment in LSI manufacturing (particularly during substrate unloading from the heat treatment furnace). There is a problem that defects called "slip bands formed by sliding motion" tend to occur and the substrate strength is likely to decrease.
【0006】本発明は上記課題に鑑みなされたものであ
って、(5〜10)×1017個/cm3 の範囲の酸素を
含有する半導体基板において、前記スリップが発生しに
くく、基板強度が低下しにくい半導体基板及びその製造
方法を提供することを目的としている。The present invention has been made in view of the above problems, and in a semiconductor substrate containing oxygen in the range of (5 to 10) × 10 17 pieces / cm 3 , the slip is unlikely to occur and the substrate strength is high. It is an object of the present invention to provide a semiconductor substrate that does not easily deteriorate and a manufacturing method thereof.
【0007】[0007]
【課題を解決するための手段及びその効果】一般にスリ
ップの発生は下記に示すような機構によるものであると
考えられている。[Means for Solving the Problem and Its Effect] It is generally considered that the occurrence of slip is due to the mechanism described below.
【0008】LSI製造における熱処理時においては、
一般に半導体基板の外周部と中心部とで温度差が発生
し、特に熱処理炉からの搬出時においては、半導体基板
の外周部の温度が中心部の温度よりもかなり低くなる。
このため、前記外周部の収縮率が前記中心部の収縮率よ
りも大きくなり、前記外周部には引っ張り応力が働くこ
とになる。そこで、該引っ張り応力を緩和するために半
導体基板の表面にはその表面に対して平行な60°転位
の運動や螺旋転位の半導体基板内側への運動が発生す
る。During the heat treatment in the LSI manufacturing,
Generally, a temperature difference occurs between the outer peripheral portion and the central portion of the semiconductor substrate, and particularly when the semiconductor substrate is unloaded from the heat treatment furnace, the temperature of the outer peripheral portion of the semiconductor substrate becomes considerably lower than the temperature of the central portion.
Therefore, the contraction rate of the outer peripheral portion becomes larger than the contraction rate of the central portion, and tensile stress acts on the outer peripheral portion. Therefore, in order to alleviate the tensile stress, the movement of 60 ° dislocations parallel to the surface of the semiconductor substrate and the movement of the screw dislocations inside the semiconductor substrate occur.
【0009】前記した外周部と中心部とでの温度差は特
に半導体基板の直径が200mm以上である場合に顕著
になり、前記転位の運動も大きな温度差に起因して発生
し易くなる。The above-mentioned temperature difference between the outer peripheral portion and the central portion becomes remarkable especially when the diameter of the semiconductor substrate is 200 mm or more, and the movement of the dislocation tends to occur due to the large temperature difference.
【0010】前記転位の運動の結果形成されたスリップ
の形状は図6に示すように一般的に線状をしている。こ
こで図6はスリップを説明するために示した半導体基板
のX線トポグラフ像をスケッチした模式的平面図であ
り、半導体基板10の外周部には上記した線状のスリッ
プ12が形成されている。スリップ12が形成されるに
あたっての転位源としては、半導体基板10の外周にお
ける面取り部の加工歪み等が考えられている。The shape of the slip formed as a result of the movement of the dislocations is generally linear as shown in FIG. Here, FIG. 6 is a schematic plan view sketching an X-ray topographic image of the semiconductor substrate shown for explaining the slip, and the linear slip 12 described above is formed on the outer peripheral portion of the semiconductor substrate 10. . As a dislocation source when the slip 12 is formed, processing strain of the chamfered portion on the outer periphery of the semiconductor substrate 10 is considered.
【0011】発生した転位がスリップ12となるまで運
動するか否かは、半導体基板10内部の酸素濃度や酸素
の析出状態に依存すると考えられている。It is considered that whether or not the generated dislocation moves until it becomes a slip 12 depends on the oxygen concentration inside the semiconductor substrate 10 and the state of precipitation of oxygen.
【0012】半導体基板10内部に存在する酸素は通常
Si単結晶の格子間位置に存在するが、この格子間位置
に存在する酸素(以下、格子間酸素と記す)は発生した
転位の運動を抑制する効果を有している(Koji Sumino:
Mechanical Behaviour of Semiconductors,Elsevier S
cience B.V. pp139-142,(1994)) 。従って、酸素濃度が
(5〜10)×1017個/cm3 (old ASTM:
4.81×1017atoms/cm2 )である低酸素濃
度半導体基板においては前記抑制効果が少ないためLS
I製造における熱処理時にその外周部からスリップが発
生し易い。The oxygen existing inside the semiconductor substrate 10 is usually present at the interstitial position of the Si single crystal, but the oxygen present at this interstitial position (hereinafter referred to as interstitial oxygen) suppresses the movement of the generated dislocations. Has the effect of (Koji Sumino:
Mechanical Behavior of Semiconductors, Elsevier S
cience BV pp139-142, (1994)). Therefore, the oxygen concentration is (5 to 10) × 10 17 pieces / cm 3 (old ASTM:
In the low oxygen concentration semiconductor substrate of 4.81 × 10 17 atoms / cm 2 ), the suppression effect is small, so that LS
Slip is likely to occur from the outer peripheral portion during heat treatment in manufacturing I.
【0013】また、酸素析出物については、その形態、
大きさや転位の発生の有無によってスリップの発生し易
さが異なることが知られている。特に、前記酸素析出物
の形態が板状である場合には転位が発生していることが
多く、スリップが発生しやすい。これに対し、前記酸素
析出物の形態が例えばSiの{111}面及び{10
0}面で囲まれた8〜14面体(以下、単に多面体と記
す)であるSiO2 析出物である場合には、転位が発生
していないことが多く、スリップが発生しにくい。これ
は、前記多面体の酸素析出物がスリップとなる転位の運
動を抑制するためであると考えられている(安武潔:C
Z−Si結晶の微小格子欠陥と機械的性質に関する研
究,p102(1982))。Regarding the oxygen precipitate, its morphology,
It is known that the susceptibility to slip varies depending on the size and the presence or absence of dislocation. In particular, when the form of the oxygen precipitates is plate-like, dislocations often occur and slips easily occur. On the other hand, the morphology of the oxygen precipitates is, for example, the {111} plane of Si and the {10}
In the case of a SiO 2 precipitate which is an 8 to 14-faced (henceforth simply referred to as a polyhedron) surrounded by the 0} plane, dislocations are often not generated and slip is less likely to occur. It is believed that this is because the oxygen precipitates of the polyhedron suppress the movement of dislocations that cause slips (Yasutake Kiyoshi: C
Research on micro lattice defects and mechanical properties of Z-Si crystals, p102 (1982)).
【0014】本発明者は上記した知見に基づき本発明を
完成するに至った。すなわち上記目的を達成するために
本発明に係る半導体基板は、(5〜10)×1017個/
cm3 の範囲の酸素を含有し、基板外周から10mm以
下の範囲に多面体の酸素析出物を108 〜1010個/c
m3 の範囲の密度で含有していることを特徴としてい
る。The present inventor has completed the present invention based on the above findings. That is, in order to achieve the above object, the semiconductor substrate according to the present invention is (5-10) × 10 17 pieces /
It contains oxygen in the range of 3 cm 3 and contains 10 8 to 10 10 polyhedral oxygen precipitates / c in the range of 10 mm or less from the outer periphery of the substrate.
It is characterized by containing at a density in the range of m 3 .
【0015】上記半導体基板によれば、108 〜1010
個/cm3 の密度で含有されている前記多面体の酸素析
出物がスリップとなる転位の運動を抑制するため、LS
I製造における熱処理時における外周部からのスリップ
の発生を抑制することができる。According to the above semiconductor substrate, 10 8 to 10 10
Since the oxygen precipitates of the polyhedron contained at a density of pcs / cm 3 suppress the movement of dislocations that cause slip,
It is possible to suppress the occurrence of slip from the outer peripheral portion during the heat treatment in I manufacturing.
【0016】多面体の酸素析出物の含有量が108 個/
cm3 未満である場合は前記転位の運動の抑制効果が十
分でなく、他方、多面体の酸素析出物は、その格子間酸
素濃度の可飽和分しか析出できないため、1010個/c
m3 以上の密度を持たせることは困難である。The content of polyhedral oxygen precipitates is 10 8 /
If it is less than 3 cm 3 , the effect of suppressing the movement of dislocations is not sufficient, and on the other hand, polyhedral oxygen precipitates can precipitate only a saturable portion of the interstitial oxygen concentration, and thus 10 10 / c
It is difficult to give a density of m 3 or more.
【0017】なお、半導体基板の外周から10mm以上
である領域においては低酸素濃度のままであるため、酸
化膜耐圧の低下やリーク電流の発生等が生ずることがな
く、製造歩留まりを低下させることはない。Since the oxygen concentration remains low in the region of 10 mm or more from the outer periphery of the semiconductor substrate, the breakdown voltage of the oxide film, the generation of leak current, etc. do not occur, and the manufacturing yield cannot be reduced. Absent.
【0018】また、本発明に係る半導体基板の製造方法
は、(5〜10)×1017個/cm 3 の範囲の酸素を含
有する半導体基板に、該半導体基板の外周から10mm
以下の範囲に1018〜1020個/cm3 の範囲の酸素を
イオン注入し、さらに窒素ガス雰囲気において750〜
850℃で8〜16時間と、1050〜1150℃で1
〜4時間の2段階の熱処理を施すことを特徴としてい
る。A method of manufacturing a semiconductor substrate according to the present invention
Is (5-10) × 1017Pieces / cm Three Range of oxygen
10 mm from the outer periphery of the semiconductor substrate to have
10 in the following range18-1020Pieces / cmThree Range of oxygen
Ion implantation is performed, and further, in a nitrogen gas atmosphere,
8 to 16 hours at 850 ° C and 1 at 1050 to 1150 ° C
Characterized by a two-step heat treatment for up to 4 hours
You.
【0019】上記半導体基板の製造方法によれば、前記
イオン注入により半導体基板の外周から10mm以下の
範囲においてのみ酸素濃度を上昇させることができ、1
段階目の熱処理により、前記半導体基板の表面から所定
距離以上離れた領域に108〜1010/cm3 の密度を
有するSiO2 析出物(酸素析出物)の発生核を確実、
かつ効率的に形成し得る。また、2段階目の熱処理によ
り、前記発生核を基に前記所定密度を有する多面体のS
iO2 析出物を確実、かつ効率的に成長させ得る。よっ
て半導体基板の外周から10mm以下の範囲において多
面体のSiO2析出物を108 〜1010/cm3 の密度
で含有させることができる。According to the method for manufacturing a semiconductor substrate, the oxygen concentration can be increased only within a range of 10 mm or less from the outer circumference of the semiconductor substrate by the ion implantation.
By the heat treatment of the stage, the generation nuclei of SiO 2 precipitates (oxygen precipitates) having a density of 10 8 to 10 10 / cm 3 are surely generated in a region away from the surface of the semiconductor substrate by a predetermined distance or more,
And can be formed efficiently. In addition, by the second-stage heat treatment, the polyhedron S having the above-mentioned predetermined density based on the above-mentioned nuclei is generated.
The iO 2 precipitate can be grown reliably and efficiently. Therefore, polyhedral SiO 2 precipitates can be contained at a density of 10 8 to 10 10 / cm 3 within a range of 10 mm or less from the outer circumference of the semiconductor substrate.
【0020】初めの熱処理時において前記熱処理温度が
750℃未満であったり前記熱処理時間が8時間未満で
ある場合は前記SiO2 析出物が発生しにくく、他方、
前記熱処理温度が850℃より高い場合に発生した前記
発生核は前記2段階目の熱処理時において多面体となら
ない。また、16時間を超える前記熱処理による効果は
少なく、生産コストの上昇を招くこととなる。In the first heat treatment, if the heat treatment temperature is lower than 750 ° C. or the heat treatment time is shorter than 8 hours, the SiO 2 precipitate is hard to be generated, while
The generated nuclei generated when the heat treatment temperature is higher than 850 ° C. do not become polyhedra during the second heat treatment. In addition, the effect of the heat treatment for more than 16 hours is small, resulting in an increase in production cost.
【0021】また、2段階目の熱処理において前記熱処
理温度が1050℃未満であったり前記熱処理時間が1
時間未満である場合は前記SiO2 析出物が多面体とな
らず、他方、1150℃より高い温度で前記熱処理を施
すと前記SiO2 析出物の成長が遅れる。また、4時間
を超える前記熱処理による効果は少なく、生産コストの
上昇を招くこととなる。In the second heat treatment, the heat treatment temperature is lower than 1050 ° C. or the heat treatment time is 1
When the time is less than the time, the SiO 2 precipitate does not become polyhedral, while the heat treatment at a temperature higher than 1150 ° C. delays the growth of the SiO 2 precipitate. Moreover, the effect of the heat treatment for more than 4 hours is small, and the production cost is increased.
【0022】なお、上記した工程によって半導体基板外
周から10mm以上の領域において前記SiO2 析出物
が発生するということはないため、LSIの製造歩留り
を低下させることはない。Since the above-mentioned steps do not generate the SiO 2 precipitate in the region of 10 mm or more from the outer periphery of the semiconductor substrate, the manufacturing yield of LSI is not reduced.
【0023】[0023]
【発明の実施の形態】以下、本発明に係る半導体基板お
よびその製造方法の実施の形態を図面に基づいて説明す
る。BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of a semiconductor substrate and a method of manufacturing the same according to the present invention will be described below with reference to the drawings.
【0024】図1は実施の形態に係る半導体基板の製造
に用いられる、酸素等をイオン注入するためのイオン打
ち込み装置を模式的に示した平面図である。FIG. 1 is a plan view schematically showing an ion implantation apparatus for ion-implanting oxygen or the like used for manufacturing the semiconductor substrate according to the embodiment.
【0025】図中1は打ち込みする元素をイオン化する
ためのイオン源を示している。イオン源1の前方所定箇
所には引き出し電極2が配置されており、引き出し電極
2の前方には、引き出し電極2を通して取り出されたイ
オンを質量分析して前記イオンを選別するアナライザ3
が配置されている。アナライザ3によって選別されたイ
オンは高電圧で加速する加速器4に取り込まれ、加速器
4に取り込まれた前記イオンによるイオンビームは試料
(Siウエハ10a)の所定箇所に均一に打込むための
走査系5に導入される。走査系5はX方向の走査系であ
るXスキャン5aとY方向の走査系であるYスキャン5
bとからなっており、例えばXスキャン5aが加速器4
側に配置されている。走査系5により打ち込み位置が制
御されたイオンはイオン計測器(ファラデーカップ)と
しての機能を有する試料室6中のSiウエハ10aに打
ち込まれるようになっている。打ち込まれたイオンは、
Si原子との相互作用によりエネルギーを失い、Siウ
エハ10a中に停止する。Reference numeral 1 in the figure shows an ion source for ionizing the element to be implanted. An extraction electrode 2 is arranged at a predetermined position in front of the ion source 1, and an analyzer 3 for selecting the ions by mass spectrometry of the ions extracted through the extraction electrode 2 is arranged in front of the extraction electrode 2.
Is arranged. The ions selected by the analyzer 3 are taken into an accelerator 4 which accelerates with a high voltage, and the ion beam by the ions taken into the accelerator 4 is uniformly scanned into a predetermined position of a sample (Si wafer 10a) by a scanning system 5. Will be introduced to. The scanning system 5 is an X scan 5a which is a scanning system in the X direction and a Y scan 5 which is a scanning system in the Y direction.
b and, for example, the X scan 5a is the accelerator 4
Located on the side. Ions whose implantation position is controlled by the scanning system 5 are implanted into the Si wafer 10a in the sample chamber 6 having a function as an ion measuring instrument (Faraday cup). The implanted ions are
The energy is lost due to the interaction with Si atoms, and the silicon wafer stops in the Si wafer 10a.
【0026】本実施の形態においては上記したイオン打
ち込み装置を用い、Xスキャン5a及びYスキャン5b
を制御することによってSiウエハ10aの外周から1
0mm以下の範囲にのみ1018〜1020個/cm3 の酸
素イオンの注入を行う。In the present embodiment, the above-mentioned ion implanting device is used, and the X scan 5a and the Y scan 5b are used.
From the outer periphery of the Si wafer 10a by controlling
Implantation of 10 18 to 10 20 oxygen ions / cm 3 is performed only in the range of 0 mm or less.
【0027】次に、上記方法により酸素をイオン注入し
たSiウエハ10aに、以下に説明する熱処理を行う。Next, the Si wafer 10a into which oxygen is ion-implanted by the above method is subjected to the heat treatment described below.
【0028】図2は実施の形態に係る半導体基板の製造
に用いられる熱処理装置を模式的に示した斜視図であ
り、図中21aは所定長さを有する略中空円筒形状の石
英チューブを示している。石英チューブ21aの周囲に
は複数個のヒータ(図示せず)が配設されており、この
ヒータにより石英チューブ21a内の温度分布は入り
口、中央部、出口でほぼ一定となるように設定されてい
る。また石英チューブ21aにはガス供給系(図示せ
ず)が接続され、このガス供給系を介して窒素または酸
素を導入することにより、石英チューブ21a内の雰囲
気が制御されるようになっており、これら石英チューブ
21a、ヒータ、ガス供給系等を含んで熱処理炉21が
構成されている。一方、略板形状の石英ボード22a上
には略箱形状をした石英製のトレイ22bが載置されて
おり、トレイ22b内には半導体基板であるSiウエハ
10aが収容されている。Siウエハ10aはトレイ2
2bの両側壁部に形成されたスリット部22cに挿入さ
れて縦方向に設置されており、これら石英ボード22
a、トレイ22bを含んで、ウエハ支持手段22が構成
されている。トレイ22bは熱処理炉21の入口部21
bから図中矢印方向に挿入され、石英チューブ21a内
を所定の一定速度で搬送され、入口部21bから再び取
り出されるようになっており、これら熱処理炉21、ウ
エハ支持手段22を含んで熱処理装置20が構成されて
いる。FIG. 2 is a perspective view schematically showing a heat treatment apparatus used for manufacturing a semiconductor substrate according to the embodiment. In the figure, 21a shows a substantially hollow cylindrical quartz tube having a predetermined length. There is. A plurality of heaters (not shown) are arranged around the quartz tube 21a, and the heater is used to set the temperature distribution in the quartz tube 21a to be substantially constant at the inlet, the central portion, and the outlet. There is. A gas supply system (not shown) is connected to the quartz tube 21a, and the atmosphere inside the quartz tube 21a is controlled by introducing nitrogen or oxygen through this gas supply system. The heat treatment furnace 21 is configured to include the quartz tube 21a, a heater, a gas supply system, and the like. On the other hand, a substantially box-shaped quartz tray 22b is placed on the substantially plate-shaped quartz board 22a, and the Si wafer 10a which is a semiconductor substrate is accommodated in the tray 22b. Si wafer 10a is tray 2
The quartz boards 22 are inserted vertically into the slit portions 22c formed on both side wall portions of the quartz board 22b.
The wafer supporting means 22 is constituted by including a and the tray 22b. The tray 22b is the inlet 21 of the heat treatment furnace 21.
It is designed to be inserted from b in the direction of the arrow in the figure, transported inside the quartz tube 21a at a predetermined constant speed, and taken out again from the inlet part 21b. The heat treatment furnace 21 and the wafer supporting means 22 are included in the heat treatment apparatus. 20 are configured.
【0029】このように構成された装置20を用いて半
導体基板を製造する場合、まず石英チューブ21a内に
窒素ガスを導入した後、前記ヒータへの供給電流を制御
して石英チューブ21aの温度を750℃に設定する。
次にウエハ支持手段22に収容されたSiウエハ10a
を熱処理炉21内に例えば約5cm/minの所定速度
で挿入する。次に750〜850℃で8〜16時間の第
1段階の熱処理を施し、さらに1050〜1150℃で
1〜4時間の第2段階の熱処理を施し、Siウエハ10
aの外周から10mm以下の範囲に多面体のSiO2 を
析出させた後、熱処理炉21内より5cm/minの速
度で取り出す。In the case of manufacturing a semiconductor substrate using the apparatus 20 thus constructed, first, nitrogen gas is introduced into the quartz tube 21a, and then the current supplied to the heater is controlled to control the temperature of the quartz tube 21a. Set to 750 ° C.
Next, the Si wafer 10a housed in the wafer supporting means 22.
Is inserted into the heat treatment furnace 21 at a predetermined speed of, for example, about 5 cm / min. Next, the first stage heat treatment is performed at 750 to 850 ° C. for 8 to 16 hours, and further the second stage heat treatment is performed at 1050 to 1150 ° C. for 1 to 4 hours.
After depositing polyhedral SiO 2 in the range of 10 mm or less from the outer periphery of a, it is taken out of the heat treatment furnace 21 at a speed of 5 cm / min.
【0030】[0030]
【実施例及び比較例】実施例では半導体基板10(Si
ウエハ10a)を以下に示す条件により製造した。Examples and Comparative Examples In the examples, the semiconductor substrate 10 (Si
Wafer 10a) was manufactured under the following conditions.
【0031】イオン注入源:酸素 イオン注入した酸素量:10×1017個/cm3 加速器4における加速電圧:200keV 第一段階の熱処理温度:800℃ 第一段階の熱処理時間:16時間 第二段階の熱処理温度:1100℃ 第二段階の熱処理時間:1時間 また、比較例としては実施例と同様にCZ法により引き
上げられたSiウエハによるものであって、上記したよ
うなイオンの注入及び2段階の熱処理が施されていない
半導体基板を製造した。Ion implantation source: oxygen Ion-implanted oxygen amount: 10 × 10 17 ions / cm 3 Accelerating voltage in accelerator 4: 200 keV First stage heat treatment temperature: 800 ° C. First stage heat treatment time: 16 hours Second stage Heat treatment temperature: 1100 ° C. Second stage heat treatment time: 1 hour Further, as a comparative example, a Si wafer pulled by the CZ method as in the example was used. A semiconductor substrate that has not been subjected to the heat treatment of 1 was manufactured.
【0032】実施例及び比較例に係る半導体基板の外周
から10mm以下の範囲をTEM(透過型電子顕微鏡)
により観察したところ、実施例に係る半導体基板10に
おいてはSiの{111}面で囲まれた大きさ約500
Å程度の多面体であるSiO2 析出物(図3)が109
個/cm3 の密度で確認された。また、半導体基板10
の外周から10mm以上の範囲には前記SiO2 析出物
の存在は確認されなかった。A range of 10 mm or less from the outer circumference of the semiconductor substrate according to the example and the comparative example is TEM (transmission electron microscope).
As a result, the size of the semiconductor substrate 10 according to the example surrounded by the {111} plane of Si was about 500.
Å Polyhedral SiO 2 precipitates (Fig. 3) are 10 9
It was confirmed with a density of pieces / cm 3 . In addition, the semiconductor substrate 10
The presence of the above-mentioned SiO 2 precipitate was not confirmed in a range of 10 mm or more from the outer periphery of the.
【0033】他方、比較例に係る半導体基板において
は、前記多面体であるSiO2 析出物が106 個/cm
3 の密度で確認された。該値は、実施例の場合と比較し
て非常に小さい値である。一方、半導体基板の外周から
10mm以上の範囲には前記SiO2 析出物の存在は確
認されなかった。On the other hand, in the semiconductor substrate according to the comparative example, the polyhedron of SiO 2 precipitates was 10 6 / cm.
Confirmed at a density of 3 . This value is a very small value as compared with the case of the example. On the other hand, the presence of the SiO 2 precipitate was not confirmed within a range of 10 mm or more from the outer circumference of the semiconductor substrate.
【0034】上記したように、実施例に係る半導体基板
10においては、その外周から10mm以下の範囲にお
いて多面体の酸素析出物(SiO2 析出物)を比較例に
係る半導体基板よりも非常に多く確認することができ
た。As described above, in the semiconductor substrate 10 according to the example, much more polyhedral oxygen precipitates (SiO 2 precipitates) were confirmed in the range of 10 mm or less from the outer periphery than the semiconductor substrate according to the comparative example. We were able to.
【0035】次に実施例及び比較例に係るSiウエハに
ついて、熱処理を施した際のスリップの発生し易さを比
較した。なお、両半導体基板の格子間酸素濃度はいずれ
も約8×1017/cm3 であった。スリップの発生し易
さは両半導体基板を熱処理炉21内に挿入し、1100
℃で30分熱処理した後、熱処理炉21から15cm/
minの速度で搬出し、その後X線トポグラフ法により
比較した。なお、X線トポグラフ法によれば半導体基板
内に存在するスリップを形成する転位を直接観察するこ
とが可能であり、前記転位は完全結晶部に対して明るい
線状のコントラストとして観察される。Next, with respect to the Si wafers according to the examples and the comparative examples, the easiness of occurrence of slip when heat-treated was compared. The interstitial oxygen concentration of both semiconductor substrates was about 8 × 10 17 / cm 3 . The easiness of slippage is 1100 after inserting both semiconductor substrates into the heat treatment furnace 21.
After heat treatment at ℃ for 30 minutes, from the heat treatment furnace 21 15cm /
It was carried out at a speed of min and then compared by the X-ray topography method. According to the X-ray topography method, it is possible to directly observe the dislocations forming the slip existing in the semiconductor substrate, and the dislocations are observed as a bright linear contrast with respect to the perfect crystal part.
【0036】図4は実施例に係る半導体基板10につい
ての上記X線トポグラフ像を示した写真である。図4か
ら明らかなように、実施例に係る半導体基板10には前
記転位がほとんど確認されず、スリップがほとんど発生
していないことがわかる。FIG. 4 is a photograph showing the X-ray topographic image of the semiconductor substrate 10 according to the example. As is clear from FIG. 4, the dislocations were hardly observed in the semiconductor substrate 10 according to the example, and it was found that slips were hardly generated.
【0037】図5は比較例に係る半導体基板についての
X線トポグラフ像を示した写真である。図5から明らか
なように、比較例に係る半導体基板にはその外周部から
10mm以下の範囲において前記転位が高密度で確認さ
れ、スリップが発生していることがわかる。FIG. 5 is a photograph showing an X-ray topographic image of a semiconductor substrate according to a comparative example. As is clear from FIG. 5, in the semiconductor substrate according to the comparative example, the dislocations were confirmed at a high density within a range of 10 mm or less from the outer peripheral portion, and it was found that slips occurred.
【0038】上記したように、実施例に係る半導体基板
10においては前記熱処理によってもスリップが発生す
ることがなく、LSI製造における熱処理時においても
スリップが発生しないことが確認された。As described above, it was confirmed that in the semiconductor substrate 10 according to the example, slip did not occur even by the heat treatment, and slip did not occur even during the heat treatment in the LSI manufacturing.
【図1】本発明の実施の形態に係る半導体基板の製造に
用いられる、例えば酸素をイオン注入するために用いら
れるイオン打ち込み装置を模式的に示した平面図であ
る。FIG. 1 is a plan view schematically showing an ion implantation apparatus used for manufacturing a semiconductor substrate according to an embodiment of the present invention, for example, used for ion-implanting oxygen.
【図2】実施の形態に係る半導体基板の製造に用いられ
る熱処理装置を模式的に示した斜視図である。FIG. 2 is a perspective view schematically showing a heat treatment apparatus used for manufacturing a semiconductor substrate according to an embodiment.
【図3】実施例及び比較例に係る半導体基板の外周から
10mm以下の範囲に存在する多面体酸素析出物のTE
M写真である。FIG. 3 is a TE of polyhedral oxygen precipitates existing in a range of 10 mm or less from the outer circumference of the semiconductor substrate according to the example and the comparative example.
It is an M photograph.
【図4】実施例に係る半導体基板のX線写真である。FIG. 4 is an X-ray photograph of a semiconductor substrate according to an example.
【図5】比較例に係る半導体基板のX線写真である。FIG. 5 is an X-ray photograph of a semiconductor substrate according to a comparative example.
【図6】スリップを説明するために示した半導体基板の
X線トポグラフ像をスケッチした模式的平面図である。FIG. 6 is a schematic plan view sketching an X-ray topographic image of a semiconductor substrate shown for explaining slip.
10 半導体基板 10a Siウエハ 10 semiconductor substrate 10a Si wafer
Claims (2)
の酸素を含有し、基板外周から10mm以下の範囲に多
面体の酸素析出物を108 〜1010個/cm3 の範囲の
密度で含有していることを特徴とする半導体基板。1. Containing oxygen in the range of (5 to 10) × 10 17 pieces / cm 3 and forming polyhedral oxygen precipitates in the range of 10 8 to 10 10 pieces / cm 3 within a range of 10 mm or less from the outer periphery of the substrate. A semiconductor substrate characterized by being contained at a density of.
の酸素を含有する半導体基板に、該半導体基板の外周か
ら10mm以下の範囲に1018〜1020個/cm3 の範
囲の酸素をイオン注入し、さらに窒素ガス雰囲気におい
て750〜850℃で8〜16時間と、1050〜11
50℃で1〜4時間の2段階の熱処理を施すことを特徴
とする請求項1記載の半導体基板の製造方法。2. A semiconductor substrate containing oxygen in the range of (5 to 10) × 10 17 pieces / cm 3 and a range of 10 18 to 10 20 pieces / cm 3 within 10 mm or less from the outer periphery of the semiconductor substrate. Oxygen is ion-implanted, and further in a nitrogen gas atmosphere at 750 to 850 ° C. for 8 to 16 hours, and 1050 to 11
The method for manufacturing a semiconductor substrate according to claim 1, wherein the heat treatment is performed in two stages at 50 ° C. for 1 to 4 hours.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2035096A JPH09190954A (en) | 1996-01-10 | 1996-01-10 | Semiconductor substrate and its manufacture |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2035096A JPH09190954A (en) | 1996-01-10 | 1996-01-10 | Semiconductor substrate and its manufacture |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH09190954A true JPH09190954A (en) | 1997-07-22 |
Family
ID=12024681
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2035096A Pending JPH09190954A (en) | 1996-01-10 | 1996-01-10 | Semiconductor substrate and its manufacture |
Country Status (1)
Country | Link |
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JP (1) | JPH09190954A (en) |
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