JPH09186526A - Detection circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To increase a detection output twice by adopting a bipolar voltage source for a balanced detection circuit so as to reduce the output fluctuation due to temperature. SOLUTION: The resistance of resistors of the balanced circuit are selected as R1 =R4 and R2 =R3 and diodes of the circuit are selected so that the total operating resistance of diodes Dd1 and Dz1 is equal to the total operating resistance of diodes Dd2 and Dz2 . Thus, a detection output by the diodes Dd1 , Dz1 nearly twice the case when load resistors are Dd1 , Dz1 is obtained at an output terminal. Even when the operating state of the detection elements Dd1 , Dz1 or the diodes Dd2 , Dz2 is changed individually depending upon temperature, so long as the conditions above are satisfied, the effect on the detection output is suppressed. When the frequency of an input signal is high, Schottky barrier diodes are adopted for the detection elements and the diodes, then a high fidelity waveform is obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention reduces the output fluctuation due to temperature by constructing a balanced type circuit using positive and negative voltage sources for demodulating a signal from an amplitude-modulated carrier, and detects the detected output. The present invention relates to a high-sensitivity detection circuit that is doubled.

[0002]

2. Description of the Related Art Conventionally, as a high-sensitivity detection circuit for converting into a detection voltage 2Vm which is approximately twice the maximum value Vm of a high frequency signal,
There is one shown in FIG. In the figure, when the high frequency signal has a negative half cycle, the capacitor C1 is passed through the diode D1
Are charged, and the voltage Vc1 across C1 becomes equal to the maximum value Vm of the high frequency signal. Next, when the high frequency signal becomes positive, the capacitor C2 is charged through C1 and D2. At this time, the voltage applied to C2 is the sum of the high frequency signal voltage and the voltage Vc1 of C1. Therefore, the voltage of C2 is the maximum value V of the signal.
It is approximately twice m. Therefore, a detection voltage of about 2 Vm is applied to the load resistor RL connected in parallel with C2 (Ishihashi: Electronic circuit; Nisshin Publishing Co., Ltd.).

[0003]

In such a conventional form, since the detection element D2 and the diode D1 have a characteristic that the operating state changes depending on the temperature, the circuit is placed even if a high frequency signal of a constant level is input. There was a problem that the detection output fluctuated under the influence of the environmental temperature. Therefore, an object of the present invention is to provide a detection circuit which is not affected by the ambient temperature and has high sensitivity.

[0004]

A detection circuit according to the present invention is a detection circuit using two detection elements Dd1 and Dd2, and a resistance is provided between a positive voltage source V1 and a negative voltage source V2. R
1, R2, R3, R4 are connected in series, a detection output terminal is provided between the connection point of the resistors R2 and R3 and the ground, and the detection element Dd1 and then the capacitor from the connection point of the resistors R1 and R2. The high-frequency input terminal provided between C1 and the ground is connected, and the diode Dz1 is connected to the ground from the connection point between the capacitor C1 and the detector element Dd1 and the connection point between the resistors R1 and R2 and the ground. A capacitor C2 is connected between them, and further, a diode Dz2 and then a detection element Dd2 are connected from the ground to the connection point of the resistors R3 and R4.

Another detection circuit according to the present invention is 2
A detection circuit using a plurality of detection elements Dd1 and Dd2,
Resistors R1 and R are provided between the positive voltage source V1 and the negative voltage source V2.
2, R3, R4 are connected in series, a detection output end is provided between the connection point of the resistors R2 and R3 and the ground, and a high frequency input end provided between the ground and the resistors R3 and R4. The capacitor C1 and then the detection element Dd1 are connected toward the connection point, and the diode Dz1 and the resistors R3 and R are connected from the ground to the connection point between the capacitor C1 and the detection element Dd1.
A capacitor C2 is connected between the connection point with 4 and the ground, and a detection element Dd2 and then a diode Dz2 are connected from the connection point between the resistors R1 and R2 to the ground.

[0006]

According to the above construction, the present invention reduces the output fluctuation due to temperature by constructing a balanced circuit using positive and negative voltage sources, and doubles the detection output with high sensitivity. The circuit can be obtained. Furthermore, the resistors forming the balanced circuit are R1 = R4 and R2 = R3, and the value obtained by adding the operating resistances of the diodes Dd1 and Dz1 is equal to the value obtained by adding the operating resistances of Dd2 and Dz2. The effect can be further enhanced by selecting it.

[0007]

Embodiments of the present invention will be described below with reference to the accompanying drawings. In the description of the drawings, the same elements will be denoted by the same reference symbols, without redundant description. FIG. 1 is a circuit diagram showing a configuration of a detection circuit according to the present embodiment, which is a detection circuit using two detection elements Dd1 and Dd2 for demodulating a signal from an amplitude-modulated carrier wave. Voltage source V
Resistors R1, R2, R3, and R4 are connected in series between 1 and the negative voltage source V2, and a detection output terminal is provided between the connection point of the resistors R2 and R3 and the ground. From the connection point of R2, the detection element Dd1 is connected, and then the high frequency input terminal provided between the capacitor C1 and the ground is connected. From the connection point of the capacitor C1 and the detection element Dd1 to the ground, the diode Dz1, or A capacitor C2 is connected between the connection point of the resistors R1 and R2 and the ground, and a diode D is connected from the ground to the connection point of the resistors R3 and R4.
z2 and then the detection element Dd2 are connected.

Next, the operation of this circuit will be described with reference to FIGS. In FIG. 3, when no signal is input to the input end, a current of i1 + i2 flows through R1, i2 flows through R2, i2 flows through R3, and i2 + i3 flows through R4. Where Dd1
If the value obtained by adding the operating resistance of Dz1 and the value obtained by adding the operating resistance of Dd2 and Dz2 are equal, the voltage appearing at R1 + R2 and the voltage appearing at R3 + R4 are balanced, and the detection output terminal becomes zero volt. Next, even if a positive polarity high frequency signal is input, the current of i1 does not fluctuate, and zero volt is output to the output terminal. On the other hand, since positive charge is stored on the input side of the capacitor C1, negative charge is stored on the output side of the capacitor C1 through Dz1, and the maximum value of the high frequency signal -V
is equal to m. Next, as shown in FIG. 4, when a negative high frequency signal is input to the input terminal, the capacitor C1
On the output side of-, -Vm accumulated in the positive half cycle and -Vm due to the input of the negative signal are added,
A voltage of 2 Vm is generated and the current through i1 is increased by 2Δi1, resulting in a negative voltage at the output. However,
Δi is the amount of current increase when Dz1 and Dz2 are resistive loads. Therefore, it is possible to obtain a detection output that is about twice as high as that in the case where Dz1 and Dz2 are load resistors at the output terminal.

Further, R1 = R4, R2 = R3, and 2
Detection elements Dd1, Dd2 or two diodes D
When z1 and Dz2 are selected such that the room temperature characteristic and the temperature characteristic are substantially equal to each other, and more specifically, the value obtained by adding the operating resistances of Dd1 and Dz1 and the value obtained by adding the operating resistances of Dd2 and Dz2 are equal, Since i1 = i3, i1 + i2 = i3
It becomes + i2. Therefore, even if the detection elements Dd1 and Dz1 or the diodes Dd2 and Dz2 individually change the operating state due to temperature, the detection output can suppress the influence as long as the above conditions are satisfied. When the input signal has a high frequency, the detection elements Dd1 and Dz1
Alternatively, by using Schottky barrier diodes as the diodes Dd2 and Dz2, a high-fidelity waveform can be obtained. Further, the resistors R1 and R4 are connected to the resistor R
By selecting a value of several tens of kΩ which is sufficiently larger than 2 and R3, it is possible to sufficiently suppress the output fluctuation due to the dispersion of these resistance values.

FIG. 2 is a circuit diagram showing the configuration of another detection circuit according to this embodiment, which is a detection circuit using two detection elements Dd1 and Dd2 for demodulating a signal from an amplitude-modulated carrier. Therefore, resistors R1, R2, R3, and R4 are connected in series between the positive voltage source V1 and the negative voltage source V2, and the resistor R2
A detection output end is provided between the connection point of R3 and R3 and the ground, and a capacitor C1 and a detection element Dd1 are connected from the high frequency input end provided between the ground and the connection point of the resistors R3 and R4. Connected and ground to capacitor C1
Diode Dz toward the connection point between the detector and the detection element Dd1
1, a capacitor C2 is connected between the connection point of the resistors R3 and R4 and the ground, and a detection element Dd2 and then a diode Dz2 are connected from the connection point of the resistors R1 and R2 to the ground. . With this circuit as well, a positive voltage can be generated at the output terminal by the same operation as in the case of FIG.

[0011]

As described above, by forming a balanced circuit using positive and negative voltage sources, it is possible to obtain a highly sensitive detection circuit in which the output fluctuation due to temperature is reduced and the detection output is doubled. be able to. Further, the resistances forming the balanced circuit are R1 = R4, R2 = R3, and the values obtained by adding the operating resistances of the diodes Dd1 and Dz1 to Dd2 and Dz2.
The effect can be further enhanced by selecting such that the value obtained by adding the operating resistance of is equal.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a configuration of a detection circuit according to this embodiment.

FIG. 2 is a circuit diagram showing a configuration of another detection circuit according to the present embodiment.

FIG. 3 is a circuit diagram illustrating an operation of the detection circuit according to the present exemplary embodiment.

FIG. 4 is a circuit diagram illustrating an operation of the detection circuit according to the present exemplary embodiment.

FIG. 5 is a circuit diagram showing a configuration of a conventional detection circuit.

[Explanation of symbols]

 C1, C2: Capacitors Dd1, Dd2: Detection elements Dz1, Dz2: Diodes D1, D2: Diodes R1, R2, R3, R4, RL: Resistors i1, i2, i3: Bias currents Δi: Signal currents V1, V2: Voltages Source Vm: Maximum value of high frequency signal

Claims (6)

[Claims] 1. A detection circuit using two detection elements Dd1, Dd2, wherein resistors R1, R2, R3, R4 are connected in series between a positive voltage source V1 and a negative voltage source V2. , A detection output end is provided between the connection point of the resistors R2 and R3 and the ground,
Further, from the connection point of the resistors R1 and R2, the detection element Dd1,
Next, the high frequency input terminal provided between the capacitor C1 and the ground is connected, and the capacitor C1 and the detection element D are connected.
From the connection point with d1 to the ground, diode Dz1,
Further, a capacitor C2 is connected between the connection point of the resistors R1 and R2 and the ground, and further, a diode Dz2 and then a detection element Dd2 are connected from the ground to the connection point of the resistors R3 and R4. And a detection circuit. 2. A detection circuit using two detection elements Dd1, Dd2, wherein resistors R1, R2, R3, R4 are connected in series between a positive voltage source V1 and a negative voltage source V2. , A detection output end is provided between the connection point of the resistors R2 and R3 and the ground,
Further, a capacitor C1 and then a detection element Dd1 are connected from a high frequency input end provided between the ground and a resistor R3 to R4, and from the ground to a connection point between the capacitor C1 and the detection element Dd1. A diode Dz1, a capacitor C2 is connected between the connection point of the resistors R3 and R4 and the ground, and a detection element Dd2 and then a diode Dz2 are connected from the connection point of the resistors R1 and R2 to the ground. A detection circuit characterized by that. 3. A value obtained by adding operating resistances of Dd1 and Dz1 and D
The detection circuit according to claim 1 or 2, wherein the values obtained by adding the operating resistances of d2 and Dz2 are equal. 4. A detector element Dd1, Dd2 and a diode D.
4. The detection circuit according to claim 1, wherein z1 and Dz2 are Schottky barrier diodes. 5. The detection circuit according to claim 1, wherein the resistors R1 and R4 and the resistors R2 and R3 are selected to be substantially equal to each other. 6. The detection circuit according to claim 1, 2 or 5, wherein the resistance value of the resistor R2 or R3 is larger than the resistance value of the resistor R1 or R4, respectively, and is several tens kΩ or more.