JPS5812141Y2 - AC signal peak level detection circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an AC signal peak level detection circuit for detecting the peak level of an AC signal.

There is a circuit system that uses a Schmitt circuit to detect the peak level of a predetermined AC signal.

Figure 1 shows the circuit system used for this purpose.

That is, an AC signal A for detecting a peak level is applied to a non-inverting input of a differential input type operational amplifier 1, and its output is fed back to an inverting input via a feedback resistor R2.

Further, the inverting input is grounded via a resistor R1 and a capacitor C1.

The amplifying circuit 10 including the differential input type amplifier 1 amplifies the AC input signal A'4 to a constant level.

Thereafter, the AC signal is rectified by a rectifier circuit 20 comprising a diode D1, a capacitor C2, and a resistor R3 in the next stage to obtain a rectified output B.

The rectified output is applied to the Schmitt circuit 30 at the next stage, and the peak level of the AC signal is detected using the output C thereof.

The Schmitt circuit 30 is composed of a differential input amplifier 2, a feedback resistor R5, a reference voltage vA and a resistor R4, and has VTR and VTL as an upper trip voltage and a lower trip voltage, respectively. .

FIG. 2 is a diagram showing the circuit operation of FIG. 1, and A, B, and C correspond to A, B, and C in FIG. 1.

As shown in the figure, when the peak value of the AC signal A decreases every three cycles, the DC level of the output B of the rectifier circuit 20 also decreases one cycle at a time.

And the trip voltages VTH and T of the Schmitt circuit 30
If TL is set to the level shown, the input B of the Schmitt circuit 30 is at a low level before time t□, so its output is at a high level.

At the moment when the button is pressed at time t2 and the input B exceeds the upper trip voltage VTH, the Schmitt circuit 30 is inverted and the output C becomes a low level.

As long as the input B does not become lower than the lower trip voltage VTL, the state of the Schmitt circuit 30 does not change and the output C remains at a low level.

When the input B falls below the lower drip voltage vTL at time t3, the Schmitt circuit 30 is inverted again and the output C becomes high level.

Therefore, the circuit shown in FIG. 1 is used to detect the peak level of an AC input signal, for example, to detect the pilot signal level of an FM stereo signal, or to detect the pilot signal level of TV audio multiplexing.

However, in the peak level detection circuit shown in FIG. Therefore, there is a voltage loss and the sensitivity of the Schmitt circuit is reduced.

An object of the present invention is to provide an AC signal peak level detection circuit with a simple circuit configuration and high sensitivity.

Hereinafter, embodiments of the present invention will be described in detail.

FIG. 3 is a circuit diagram showing an embodiment of the present invention, in which an AC signal A passes through an input circuit consisting of a capacitor C and a resistor R, and is applied to the inverting input terminal of a differential input type operational amplifier 30. ing.

A reference voltage source VA is applied to a non-inverting input terminal, which is a supply input of the amplifier 3, via a resistor R4.

The output of the amplifier 3 is connected to the output terminal OUT of the circuit through a parallel connection circuit 4 of a resistor R6 and a diode D2.

A capacitor C3, which is a capacitive element, is connected between the output terminal OUT and the ground, and the parallel connection circuit 4 forms a charging/discharging path to the capacitor C3.

In this example, the diode D2 has a cand connected to the output part of the amplifier 3 and an anode connected to the circuit output terminal OUT.

The output terminal OUT is connected to the amplifier 3 via the feedback resistor R5.
is connected to the non-inverting input terminal of

FIG. 4 is a diagram showing the input/output characteristics of the circuit shown in FIG. 3, and FIGS. 5A and 5B show waveform diagrams of input signals and output signals, respectively.

The operation of the circuit shown in FIG. 3 will be explained with reference to these figures.

In this S, the output level vO' of the amplifier 3 can take a level between vo'H (high level) and o'L (low level) depending on the input signal, and the upper trip of the entire circuit voltage and lower trip voltage to VTR and TTL, respectively.
shall be.

First, when there is no input signal A and it is at zero level, output B is at high level V.

When an AC input signal A whose positive peak value is above the VTR level is applied, the circuit output B does not change below the VTR level, but at the instant t1 when it exceeds the VTR level, the circuit state is reversed. As a result, the output voltage Vo' of the amplifier 3 becomes the low level vo'L.

Therefore, the high level charge stored in the capacitor C3 is rapidly discharged through the diode D2, and the voltage VO at the output B becomes the low level voL.

The value of Vow, is the value of VO'L, then vo'L+VD
, where VO'L is the low level output of the amplifier 3 mentioned above, and VD is the forward voltage of the diode D2.

At time t2 when the AC input signal drops below the lower trip voltage VTL of the circuit, the output voltage Vo' of the amplifier 3 is at a high level V.

'H, the capacitor C3 begins to be charged through the resistor R6 due to vo/H.

However, the charging time constant R6. If the value of C3 is selected to be much larger than the cycle T of the AC input signal and the button is pressed, then
The change in the voltage Vo of the output B hardly changes until the peak arrival time of the next input signal, so the state of the entire circuit does not change either, and the output B remains at a low level.

←In addition, R5>> R6) The input signal starts to rise again towards the positive peak value,
At time t3 when the lower trip voltage VTL of the circuit is exceeded, the output voltage Vo' of the amplifier 3 becomes Vo'L, and the very small amount of charge stored in the capacitor C3 is instantly discharged through the diode. Clamp output B to low level VOL.

This state will continue as long as the positive peak value of the input signal does not fall below the lower trip voltage FE, vTL.

This state is shown at time t4t.

When the positive peak value of the input signal after time t4 becomes smaller than the lower trip voltage VTL, the output voltage yo/ of the amplifier 3 remains at the high level vo'H and does not change, so the capacitor C3 After being charged by a charging path having a constant R6tC3, the output B becomes a high level VOH1.
rises.

The output voltage VOR in this case is determined by the following equation.

voH=VA+(Vo'H-VA)(R4+R5)/(
R4+R5+R6) Here, the upper trip voltage VTR and lower trip voltage VTL of the circuit are expressed by the following equations.

VTH=VA+(VO'HVA)"R4/(R4+R5
+R6) VTL”'Vo'L +VD+(VA (V□'H+
VD))・R5/(R4+R5) Therefore, it can be seen that the input/output characteristics shown in FIG. 4 are obtained, and the circuit of FIG. 3 exhibits the operating characteristics of a Schmitt circuit.

As described above, according to the Schmitt circuit of the present invention, the rotational operation is exactly the same as that of the conventional peak level detection circuit with a complicated circuit configuration using an amplifier circuit, a rectifier circuit, and a Schmitt circuit as shown in FIG. Therefore, it has an extremely simple circuit configuration, and furthermore, since it operates by directly detecting the peak level of the input signal without using a rectifier circuit or the like, it has the advantage of improving the sensitivity of the Schmitt circuit.

[Brief explanation of drawings]

FIG. 1 is a conventional peak level detection circuit, FIG. 2 is an operation waveform diagram of FIG. 1, and FIG. 3 is a circuit diagram showing an embodiment of the present invention.
4 is an input/output characteristic diagram of the circuit of FIG. 3, and FIG. 5 is an input and output waveform diagram of the circuit of FIG. 3. Explanation of symbols of main parts, 3...Amplifier, 4...
...Parallel circuit, R4, R5...Resistance, R6
...Charging resistor, C3... Capacitor, D2... Discharging diode, VA...
・Reference voltage source.

Claims (3)

[Scope of utility model registration request] (1) To form an output terminal, an amplifying circuit having a differential input and to which an AC signal is applied, a capacitive element connected to the output terminal, and a charging/discharging path for the capacitive element. a charging/discharging circuit connected between the output part of the amplifying circuit and the capacitive element and comprising a parallel circuit of a resistor and a diode; a feedback resistor for feeding back the output terminal voltage to the supply input of the amplifying circuit; An alternating current signal peak level detection circuit comprising: a reference power source applied to a power input of an amplification circuit via a resistor. (2) The AC signal is applied to the inverting differential input terminal of the amplifying circuit, the output terminal voltage is fed back to the non-inverting differential input terminal of the amplifying circuit, and the output terminal voltage is fed back to the non-inverting differential input terminal of the amplifying circuit, and the anode of the diode of the charging/discharging circuit is applied to the amplifying circuit. The alternating current signal peak level detection circuit according to claim 1, wherein is connected to the capacitive element and the cathode is connected to the output part of the amplification circuit. (3) The utility model registration claim described in claim 1 or 2, characterized in that the time constant formed by the resistance of the charging/discharging circuit and the capacitive element is much shorter than the period of the input signal. AC signal peak level detection circuit.