JPH0918311A - Power element driving circuit - Google Patents

Abstract

PURPOSE: To prevent a driving circuit from being destructed even when a power element is destructed. CONSTITUTION: A control power source 1 is connected through a resistor R2 and the collector/emitter of a PNP transistor TR4 to the gate of a MOSFET Q1 to be the power element. To the resistor R2 , the serial circuit of a diode D1 and a capacitor C1 is parallelly connected. When a part between the drain and the gate of the MOSFET Q1 is destructed and a high voltage is generated at the gate, an overcurrent is absorbed by the capacitor C1 and the transistor TR4 is turned OFF by the rise of the both-terminal voltage of the capacitor C1 . Thus, the high voltage generated at the gate is prevented from being applied to the control power source 1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power element drive circuit for controlling a power element such as MOSFET based on a signal from a control power source.

[0002]

2. Description of the Related Art Conventionally, a MOSF used for power control
As a circuit for driving a power element such as ET, there is one having a configuration shown in FIG. FIG. 3 shows a drive circuit of the MOSFET Q1 inserted as a switching element between the power source E and the load Z. That is, the Zener diode ZD1 connected between the gate and the source of the MOSFET Q1.
, A resistor R1 connected in parallel to the Zener diode ZD1, a resistor R2 connected in series to the gate of the MOSFET Q1, and a PNP transistor Tr1 in which a series circuit of the resistor R2 is connected in parallel to the resistor R1 and a PNP transistor. The resistor R3 is connected between the emitter of the Tr1 and the control power supply 1, and the resistor R4 is connected between the base of the PNP transistor Tr1 and the control power supply 1.
The control power supply 1 has a connection point between the resistors R3 and R4 and an MO
It is connected between the source of SFET Q1.

When this drive circuit operates normally, the PNP transistor Tr1 is off when the high potential voltage is output from the control power supply 1, and the forward bias voltage is applied to the gate of the MOSFET Q1 to turn on the MOSFET Q1. . Further, when the output of the control power source 1 becomes zero voltage, the PNP transistor Tr1 is turned on,
The gate of MOSFET Q1 becomes zero voltage and MOSFET
Q1 turns off.

[0004]

In the drive circuit described above, when the drain and the gate are short-circuited due to the destruction of the MOSFET Q1, a high voltage on the drain side of the MOSFET Q1 is applied to the drive circuit connected to the gate of the MOSFET Q1. Since a sudden voltage change occurs in the drive circuit and an excessive current flows in, the drive circuit may be destroyed or the control power supply 1 may be destroyed.

The present invention has been made in view of the above circumstances, and an object thereof is to provide a power element driving circuit which is not destroyed even if the power element is destroyed.

[0006]

According to a first aspect of the present invention, a power element having a control terminal for controlling a conduction amount between a first terminal and a second terminal on the ground side is supplied to a signal from a control power source. A power element drive circuit for controlling in accordance with, a separation circuit in which a switching element is inserted between a control power supply and a control terminal, and a diode connected in parallel to a resistor inserted between the switching element and the control terminal, and An overcurrent absorption circuit that is equipped with a series circuit of a capacitor and charges the capacitor in the direction from the control terminal to the control power supply via a diode, and a current limit when the voltage across the capacitor charged through the diode reaches a specified voltage. And a current limiting circuit for connecting the control terminal to the second terminal through the element and controlling the switching element to be turned off.

According to a second aspect of the present invention, a power element for controlling a power element having a control terminal for controlling the amount of conduction between the first terminal and the second terminal on the ground side in accordance with a signal from a control power source. A drive circuit, a separation circuit in which a switching element is inserted between a control power supply and a control terminal, and a low-loss path which is inserted between the control terminal and the switching element and through which a current flowing from the control power supply to the control terminal passes. A current limiting bypass circuit having a current limiting path for passing a current flowing from the control terminal to the control power source, and a selecting means for selecting a low loss path or a current limiting path according to the direction of the passing current; The element is composed of a PNP transistor which is turned on by the passing current of the current limiting path, and the base of the switching element is connected to the second terminal via the current limiting element.

[0008]

According to the structure of the present invention, the current flowing from the control terminal to the control power source is provided with the series circuit of the diode and the capacitor connected in parallel with the resistor inserted between the switching element and the control terminal. By providing an overcurrent absorption circuit that charges the capacitor via the diode, even if a high voltage is applied to the control terminal due to the destruction of the power element, the charging current to the capacitor causes a high current to flow to the control power supply. The voltage can be applied for a predetermined period of time. Further, when the voltage across the capacitor rises, the current limiting circuit controls the switching element of the separation circuit inserted between the control power source and the control terminal to be turned off, so that the control terminal of the power element and the control power source are switched. Therefore, even if a high voltage is applied to the control terminal due to the destruction of the power element, the destruction of the control power supply due to the overcurrent flowing can be prevented. Moreover, since the control terminal is connected to the second terminal through the current limiting element in the current limiting circuit due to the rise in the voltage across the capacitor, it is possible to suppress overcurrent from the control terminal of the power element.

According to the structure of the second aspect of the present invention, the current limiting bypass circuit is inserted between the control terminal and the switching element, and the current limiting bypass circuit passes the low current through which the current from the control power source to the control terminal passes. A loss path and a current limiting path for passing a current from the control terminal to the control power supply are provided, and a selecting means for selecting a low loss path or a current limiting path according to the direction of the passing current is provided, so that the normal operation is performed. Sometimes the signal from the control power supply can be given to the power element through the low loss path, and when a high voltage is applied to the control terminal due to the destruction of the power element, the overcurrent is prevented by selecting the current limiting path. be able to. Moreover, a switching element, which is a PNP transistor that is turned on by the passing current in the current limiting path, is inserted as a separation circuit between the control power source and the control terminal, and the base of the switching element is connected to the first power element through the current limiting element. Since it is connected to the two terminals, when a current flows through the current limiting path, the switching element is turned off to disconnect the control terminal from the control power source, thereby protecting the control power source, and connecting the control terminal and the second terminal. By connecting the two via a current limiting path and a current limiting element, overcurrent can be prevented. Here, since the PNP transistor is used as the switching element of the separation circuit,
Since the PN junction is connected in the forward direction, only the forward voltage level is applied between the collector and the base, and the stress on the switching element is small.

[0010]

【Example】

(Embodiment 1) In this embodiment, as shown in FIG. 1, a MOSFET Q which is a power element is added to the conventional circuit configuration shown in FIG.
An overcurrent absorption circuit 11 that absorbs an overcurrent flowing into the gate (control terminal) of the MOSFET Q1 when the device 1 is destroyed, and a current limiting circuit 12 that limits the overcurrent and bypasses it to the ground (second terminal = source side). , And a separation circuit 13 for separating the control power supply 1 is added. here,
The drain of the MOSFET Q1 corresponds to the first terminal in the claims.

The overcurrent absorption circuit 11 is composed of a series circuit of a diode D1 and a capacitor C1 and is connected in parallel with a resistor R2. The anode of the diode D1 is MOSFETQ
1 and the cathode of the diode D1 is connected to the capacitor C1. That is, MOSFET
When current flows into the drive circuit side through the gate of Q1,
By charging the capacitor C1 through the diode D1, the flow of current into the control power supply 1 is suppressed.

The current limiting circuit 12 includes a resistor R2 and a capacitor C.
The base is connected to the connection point with 1 and the resistor R5 is connected to the connection point between the cathode of the diode D1 and the capacitor C1.
PNP transistor Tr whose emitter is connected via
2 is provided. The base of the NPN transistor Tr3 is connected to the collector of the PNP transistor Tr2 via the resistor R6. The emitter of the NPN transistor Tr3 is connected to the ground. Therefore, the capacitor C
When 1 is charged through the diode D1 and the voltage across the capacitor C1 rises, the PNP transistor Tr2 is forward biased and turned on, and the NPN transistor Tr3.
Turns on. Here, the resistor R5 protects the emitter-base of the PNP transistor Tr2 and limits the overcurrent, and the resistor R6 limits the overcurrent to protect the NPN transistor Tr3. That is, the resistance R5 and the resistance R
6 functions as a current limiting element. The function of the current limiting circuit 12 will be described later.

The separation circuit 13 includes a PNP transistor Tr4 having a collector connected to the resistor R2 and an emitter connected to the resistor R3. The base of the PNP transistor Tr4 is grounded via the resistor R7 and the collector / emitter of the NPN transistor Tr5. Connected to. NPN
Base of transistor Tr5 and PNP transistor Tr
A resistor R8 is connected between the four emitters. The collector of the NPN transistor Tr3 described above is connected to the connection point between the resistor R8 and the base of the NPN transistor Tr5, and when the NPN transistor Tr3 is turned on, NP
N Transis Tr5 is turned off. As a result, the PNP transistor Tr4 is turned off, and the PNP transistor T
The PNP transistor Tr4 disconnects between r1 and the control power supply 1 and the gate of the MOSFET Q1.

Next, the operation of this embodiment will be described.
During normal operation, the capacitor C1 provided in the overcurrent absorption circuit 11 is hardly charged, so the current limiting circuit 1
The second PNP transistor Tr2 is off, and
The PN transistor Tr3 is also off. Therefore, when the control power supply 1 becomes a high potential voltage, N
The PN transistor Tr5 is turned on, and the PNP transistor Tr4 is also completely turned on. That is, the MOSFET Q1 operates in the same manner as the conventional configuration shown in FIG. 3, and the MOSFET Q1 can be turned on / off according to the output value of the control power supply 1.

On the other hand, when the MOSFET Q1 is destroyed and the drain and the gate are short-circuited, a high voltage is applied to the gate of the MOSFET Q1 and an overcurrent flows. At this time, the capacitor C1 is charged through the diode D1, and the overcurrent is absorbed by the capacitor C1. When the charging of the capacitor C1 progresses, the PNP transistor Tr2 is forward-biased and turned on due to the increase in the voltage across the capacitor C1, and the diode D1 → the resistor R5 → PNP.
A current flows through the base of the NPN transistor Tr3 through the path from the transistor Tr2 to the resistor R6 to turn on the NPN transistor Tr3. In addition, NP from the above route
A current flows in the path from the base / emitter of the N-transistor Tr3 to the ground, and the overcurrent is bypassed by current limiting.

When the NPN transistor Tr3 turns on, the NPN transistor Tr5 turns off and the PNP
The transistor Tr4 is also turned off. That is, the separation circuit 1
3 by PNP transistor Tr1 and control power supply 1
Is disconnected from the gate of MOSFET Q1. In this way, the drive circuit can be protected by disconnecting the PNP transistor Tr1 and the control power supply 1 from the MOSFET Q1 before the overcurrent flows from the gate of the MOSFET Q1.

In the separation circuit 13, the MOSFET Q
The high voltage to the gate of 1 is mainly the NPN transistor T
Since the voltage is applied between the collector and emitter of r5 and only the forward voltage level is applied to the PN junction between the collector and base of the PNP transistor Tr4, stress on the PNP transistor Tr4 is small. Where PNP
The reason why the transistor Tr4 is used is that if this transistor is an NPN transistor, a high voltage is applied between the emitter and the base in the opposite direction, stress is large, and the possibility of damage is large.

(Embodiment 2) In the present embodiment, as shown in FIG. 2, the conventional circuit configuration shown in FIG. 3 is provided with a low loss path and a current limiting path, and a current is passed through the low loss path under normal conditions.
It has a configuration in which a current limiting bypass circuit 14 that allows a current to flow in a current limiting path when the ETQ1 is destroyed and a separation circuit 15 that disconnects the control power supply 1 from the MOSFET Q1 are added.

The separation circuit 15 includes a PNP transistor Tr4 whose emitter is connected to the control power source 1 via a resistor R3 as in the first embodiment, and the base of the PNP transistor Tr4 is connected to the ground via a resistor R7. There is.
The current limiting bypass circuit 14 includes a current transformer CT1 between the resistor R2 and the collector of the PNP transistor Tr4.
The series circuit of the primary winding and the resistor R9 is inserted,
9 is connected between the collector and emitter of the NPN transistor Tr6. One end of the secondary winding of the current transformer CT1 is connected to the connection point between the primary winding of the current transformer CT1 and the resistor R9 together with the emitter of the NPN transistor. The other end of the secondary winding of the current transformer CT is connected to the base of the NPN transistor Tr6 via the parallel circuit of the capacitor C2 and the resistor R10.
That is, the signal path from the control voltage 1 to the MOSFET Q1 is selected from the low loss path passing through the collector / emitter of the NPN transistor Tr6 and the current limiting path passing through the resistor R9 depending on whether the NPN transistor Tr6 is on or not. Will be done.

Next, the operation of this embodiment will be described. First,
During normal operation when the MOSFET Q1 is not destroyed,
The PNP transistor Tr4 is in the ON state and the control power supply 1
The signal current from the PNP transistor Tr4 → resistor R
9 → primary winding of current transformer CT1 → flows to the gate of MOSFET Q1 through the path of resistor R2. At this time, due to the current induced in the secondary winding of the current transformer CT1, a forward bias current is given to the base of the NPN transistor Tr6 through the parallel circuit of the resistor R10 and the capacitor C2, and the NPN transistor Tr is turned on. Therefore, the signal current from the signal power source 1 is N
It passes through the collector / emitter of the PN transistor Tr6 and is supplied to the gate of the MOSFET Q1 with low loss. Here, a current first flows through the resistor R9, and then the NPN transistor Tr6 is turned on, which causes a slight loss, but the switching of the path is instantaneously performed, so that a large loss that causes a problem in operation does not occur. Further, in this state, the capacitor C2 is charged.

On the other hand, when an overcurrent flows through the gate due to the destruction of the MOSFET Q1, the overcurrent flows through the primary winding of the current transformer CT1 and the current induced in the secondary winding causes the NPN transistor Tr6 to be reverse biased. .
At this time, the NPN transistor Tr6 is immediately turned off due to the discharge of the charge of the capacitor C2. As a result, the overcurrent is generated by the resistor R2 → the primary winding of the current transformer CT1 → the resistor R9 → the PNP transistor Tr4 → the resistor R7.
→ The current will flow through the path called ground, the current will be limited by the current limiting path that passes through the resistor R9, and the PNP transistor Tr
4 and the resistor R7 are bypassed. That is,
The current transformer CT1, the capacitor C2, the resistor R10, and the transistor Tr6 constitute a selecting unit that selects a low loss path or a current limiting path. At this time, the potential of the base of the PNP transistor Tr4 becomes higher than the potential of the emitter, so that the PNP transistor Tr4 is turned off and the PN
The MOSFET Q is connected to the P transistor Tr1 and the control power supply 1.
Separate from 1. Here, the high voltage of the gate of the MOSFET Q1 is mainly applied to the resistors R9 and R7, and only the forward voltage level is applied between the collector and the base of the PNP transistor Tr4 of the separation circuit 15, so that the stress on the PNP transistor Tr4 is small. .

In each of the above-mentioned embodiments, the power element is an MO.
Although the SFET is exemplified, the bipolar transistor or the thyristor may be used as the power element without any particular limitation. In addition, each of the transistors Tr1 to Tr6
An FET or the like can be used instead of the bipolar transistor.

[0023]

According to the present invention, a series circuit of a diode and a capacitor connected in parallel to a resistor inserted between a switching element and a control terminal is provided, and a current flowing from the control terminal to the control power supply is diode Since an overcurrent absorption circuit that charges the capacitor via the power supply is provided, even if a high voltage is applied to the control terminal due to destruction of the power element, a high voltage is applied to the control power supply by the charging current flowing to the capacitor. The effect is that it can be sent for a predetermined period. Further, when the voltage across the capacitor rises, the current limiting circuit controls the switching element of the separation circuit inserted between the control power supply and the control terminal to be off, so that the control terminal of the power element and the control power supply are switched. Therefore, even if a high voltage is applied to the control terminal due to the destruction of the power element, the destruction of the control power supply due to the overcurrent flowing can be prevented. Moreover, since the control terminal is connected to the second terminal via the current limiting element in the current limiting circuit due to the rise of the voltage across the capacitor, the overcurrent from the control terminal of the power element can be suppressed.

According to a second aspect of the present invention, a current limiting bypass circuit is inserted between the control terminal and the switching element, and the current limiting bypass circuit has a low loss path through which a current flowing from the control power source to the control terminal passes. A current limiting path for passing a current flowing from the control terminal to the control power source is provided, and a selecting means for selecting a low loss path or a current limiting path according to the direction of the passing current is provided. A signal from the control power supply can be given to the power element through the power element. When a high voltage is applied to the control terminal due to the destruction of the power element, it is possible to prevent the occurrence of overcurrent by selecting the current limiting path. There are advantages. Moreover, a switching element, which is a PNP transistor that is turned on by the passing current in the current limiting path, is inserted as a separation circuit between the control power source and the control terminal, and the base of the switching element is connected to the first power element through the current limiting element. Since it is connected to the two terminals, when a current flows through the current limiting path, the switching element is turned off to disconnect the control terminal from the control power source, thereby protecting the control power source, and connecting the control terminal and the second terminal. By connecting the two via a current limiting path and a current limiting element, there is an advantage that overcurrent can be prevented. further,
Since the PNP transistor is used as the switching element of the separation circuit, the PN junction is connected in the forward direction, only the forward voltage level is applied between the collector and the base, and the stress on the switching element is small. There is an effect.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a first embodiment.

FIG. 2 is a circuit diagram showing a second embodiment.

FIG. 3 is a circuit diagram showing a conventional example.

[Explanation of symbols]

 1 Control Power Supply 11 Overcurrent Absorption Circuit 12 Current Limiting Circuit 13 Separation Circuit 14 Current Limiting Bypass Circuit 15 Separation Circuit D1 Diode C1 Capacitor C2 Capacitor C2 Current Transformer Q1 MOSFET R2 Resistor R5 Resistor R6 Resistor R7 Resistor R9 Resistor R10 Resistor Tr4 PNP Transistor Tr6 NPN transistor

Claims (2)

[Claims] 1. A power element drive circuit for controlling a power element having a control terminal for controlling the amount of conduction between a first terminal and a second terminal on the ground side according to a signal from a control power supply. , A separation circuit with a switching element inserted between the control power supply and the control terminal, and a series circuit of a diode and a capacitor connected in parallel with a resistor inserted between the switching element and the control terminal To the second terminal through the current limiting element and the overcurrent absorption circuit that charges the capacitor with the current in the direction toward the capacitor, and when the voltage across the capacitor charged through the diode reaches the specified voltage. A power element drive circuit comprising: a current limiting circuit that is connected and controls the switching element to be turned off. 2. A power element drive circuit for controlling a power element having a control terminal for controlling the amount of conduction between a first terminal and a second terminal on the ground side according to a signal from a control power supply. , A separation circuit in which a switching element is inserted between the control power supply and the control terminal, and a low loss path through which a current flowing from the control power supply to the control terminal passes between the control terminal and the switching element and the control power supply from the control terminal And a current limiting bypass circuit having a selecting means for selecting a low-loss path or a current limiting path according to the direction of the passing current, and the switching element is a current limiting path. A power element drive circuit comprising a PNP transistor that is turned on by the passing current of the switching element, and the base of the switching element is connected to the second terminal through a current limiting element.