JPH09181403A - Insulating board for mounting electronic component - Google Patents

Insulating board for mounting electronic component

Info

Publication number
JPH09181403A
JPH09181403A JP35195695A JP35195695A JPH09181403A JP H09181403 A JPH09181403 A JP H09181403A JP 35195695 A JP35195695 A JP 35195695A JP 35195695 A JP35195695 A JP 35195695A JP H09181403 A JPH09181403 A JP H09181403A
Authority
JP
Japan
Prior art keywords
substrate
mounting electronic
board
insulating substrate
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP35195695A
Other languages
Japanese (ja)
Inventor
Atsushi Furuta
淳 古田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokin Corp
Original Assignee
Tokin Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokin Corp filed Critical Tokin Corp
Priority to JP35195695A priority Critical patent/JPH09181403A/en
Publication of JPH09181403A publication Critical patent/JPH09181403A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0237High frequency adaptations
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0271Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/141One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components

Landscapes

  • Structure Of Printed Boards (AREA)

Abstract

PROBLEM TO BE SOLVED: To improve durability against falling shock, vibration and warping of an insulating board for mounting electronic components, by forming a cut portion made of at least a punched hole or a cut-out at a stress concentrating portion caused by an external force on an insulating board for mounting electronic components thereon. SOLUTION: A dielectric filter 20 using a board 16 includes an input/output terminal 7, an earthing terminal 9, dielectric resonator earthing conductors 3a, 3b, and an electric element connecting conductor 6. In addition, a punched hole 17 of elongated (slit-like) shape is formed in the board 16 in such a manner that the punched hole 17 is adjacent to a junction between coaxial dielectric resonators 2, 2' and the earthing conductor 3a provided on the board 16. The cross section of corners of both ends of the punched hole 17 is preferably circular so as to prevent development of crack due to stress load. Also, as a cut-out 19 is provided near the input/output terminal 7 and the earthing terminal 9, an external stress loaded on a mother board, if any, is relieved by the cut-out 19.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、電子部品が実装さ
れる絶縁基板に係り、特に、落下衝撃、振動、反り等に
対して耐久性が要求される移動通信機器等に用いられる
電子部品実装用絶縁基板に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an insulating substrate on which electronic parts are mounted, and more particularly, to mounting electronic parts used on mobile communication equipment or the like which is required to have durability against drop impact, vibration, warpage and the like. Insulating substrate.

【0002】[0002]

【従来の技術】従来の電子部品実装用基板の一例とし
て、移動通信機器等に使用される誘電体フィルタの基板
について説明する。
2. Description of the Related Art As an example of a conventional electronic component mounting substrate, a substrate of a dielectric filter used in mobile communication equipment will be described.

【0003】図5(a)は、従来の基板を用いたフィル
タの一例として、同軸型誘電体共振器2,2’の二つを
用いた場合のバンドパスフィルタ10の外観を示してい
る。図5(b)に、従来の基板1の部品実装面から見た
構造を、図5(c)に、半田面[図5(b)の反対の
面]から見た構造を示す。基板1は、同軸型誘電体共振
器2を接地するために、接地用導体パターン3a,3b
がスルーホール4によって互いに短絡しており、更に、
コンデンサ、インダクタ等の電気素子5を接続するため
の導体6を備えている。スルーホール4は、基板を介し
て対向する両面の導体を互いに短絡させるためのもので
あって、一般には、断面が径の小さな真円の貫通孔であ
ることが多い。そして、この貫通孔には、応力集中を緩
和する機能はない。
FIG. 5A shows an appearance of a bandpass filter 10 in which two coaxial dielectric resonators 2 and 2'are used as an example of a filter using a conventional substrate. FIG. 5B shows a structure viewed from the component mounting surface of the conventional substrate 1, and FIG. 5C shows a structure viewed from the solder surface [opposite surface to FIG. 5B]. The substrate 1 has grounding conductor patterns 3a and 3b for grounding the coaxial dielectric resonator 2.
Are short-circuited to each other by the through hole 4, and
A conductor 6 for connecting an electric element 5 such as a capacitor or an inductor is provided. The through hole 4 is for short-circuiting the conductors on both surfaces facing each other through the substrate, and is generally a perfect circular through hole having a small cross section. The through hole does not have the function of relieving stress concentration.

【0004】入出力端子7は、基板の端部を半円状にカ
ットし、基板の対向する面にある入出力用導体8a,8
bが、半円状の基板側面に設けられた入出力用導体8c
によって、互いに短絡するように形成されている。接地
用端子9も同様に形成されている。
The input / output terminal 7 is formed by cutting the end portion of the substrate into a semicircular shape, and the input / output conductors 8a, 8 on the opposite surfaces of the substrate.
b is an input / output conductor 8c provided on the side surface of the semicircular substrate
Are short-circuited with each other. The grounding terminal 9 is similarly formed.

【0005】誘電体共振器2,2’は、その外導体11
が基板1上の接地用導体パターン3aに接地されてい
る。この時、互いに隣合う誘電体共振器2,2’は、隙
間のないように配列され、各誘電体共振器2,2’の
間、及び基板1との間は、リジッドに構成されている。
又、インダクタ、コンデンサ等の電気素子5は、電気素
子接続用導体6に電気的に接続されている。更に、同軸
型共振器の内導体12と電気素子接続用導体6は、端子
ピン(図示されていない)によって電気的に接続されて
いる。
The dielectric resonators 2 and 2'include the outer conductor 11 thereof.
Is grounded to the grounding conductor pattern 3 a on the substrate 1. At this time, the dielectric resonators 2 and 2'adjacent to each other are arranged so that there is no gap, and the dielectric resonators 2 and 2'and the substrate 1 are rigidly configured. .
The electric element 5 such as an inductor and a capacitor is electrically connected to the electric element connecting conductor 6. Further, the inner conductor 12 of the coaxial resonator and the electric element connecting conductor 6 are electrically connected by a terminal pin (not shown).

【0006】フィルタ本体は、図5(d)に示すケース
14によって、全体を覆われ、接地されている。
The entire filter body is covered with a case 14 shown in FIG. 5D and is grounded.

【0007】図6に、上述した構成のバンドパスフィル
タの周波数特性を示してる。中心周波数(f0)は、1
901MHz、帯域幅は25MHz、挿入損失は2.6
6dBであることを示している。
FIG. 6 shows the frequency characteristic of the bandpass filter having the above-mentioned configuration. The center frequency (f 0 ) is 1
901MHz, bandwidth 25MHz, insertion loss 2.6
It shows that it is 6 dB.

【0008】基板1の外形寸法は、11mm×11mm
×0.8mm(L×W×T)で、材質はガラスエポキシ
である。誘電体共振器は、口3.0mm×8mmで、電
気素子として用いているコンデンサの値は、0.5pF
〜1.0pFであり、フィルタの外形形状は、11mm
×11mm×4.0mm(L×W×H)である。
The external dimensions of the substrate 1 are 11 mm × 11 mm
The size is 0.8 mm (L × W × T), and the material is glass epoxy. The dielectric resonator has a mouth of 3.0 mm x 8 mm, and the value of the capacitor used as an electric element is 0.5 pF.
~ 1.0 pF, the outer shape of the filter is 11 mm
It is x 11 mm x 4.0 mm (L x W x H).

【0009】又、このフィルタを、図7に示すように、
幅40mm×長さ100mm×厚さ1.6mmのガラス
エポキシ製の試験基板15上に、誘電体フィルタ10の
入出力端子7及び接地用端子9を半田付けした後、矢印
で示す方向から応力を負荷して、基板の反りに対する強
度試験を行った。その結果、試験基板15が反った状態
を点線で示している。そのAの位置で下方に約4mm反
った時点で、誘電体共振器2と誘電体フィルタ用基板1
との接合面で剥離が生じ、図6に示すような所定のフィ
ルタ特性が得られなくなった。
Further, as shown in FIG. 7, this filter is
After soldering the input / output terminal 7 and the grounding terminal 9 of the dielectric filter 10 onto the glass epoxy test substrate 15 having a width of 40 mm, a length of 100 mm and a thickness of 1.6 mm, stress is applied from the direction indicated by the arrow. A load was applied and a strength test against warpage of the substrate was performed. As a result, the state where the test substrate 15 is warped is shown by a dotted line. At the time of warping downward by about 4 mm at the position A, the dielectric resonator 2 and the dielectric filter substrate 1 are
Peeling occurred at the joint surface with and the predetermined filter characteristics as shown in FIG. 6 could not be obtained.

【0010】[0010]

【発明が解決しようとする課題】電子部品の中でも、携
帯電話機等の移動体通信機器等に用いられる電子部品に
ついては、その使用目的から、落下衝撃、振動、反り等
に対する耐久性が、特に求められている。
Among the electronic parts, for electronic parts used in mobile communication equipment such as mobile phones, durability against drop impact, vibration, warpage, etc. is particularly required for the purpose of use. Has been.

【0011】移動体通信関係の電子部品の一例として、
誘電体フィルタについて説明すると、誘電体フィルタ
は、導体パターンが形成された絶縁基板上に、インダク
タ、コンデンサ、誘電体共振器等の電気素子が半田等に
よって電気的に接続、実装されて構成される。更に、誘
電体フィルタは、他の高周波電子部品と共に、入出力端
子及び接地端子が、半田付け等の手段によってマザー基
板に実装される。
As an example of electronic parts related to mobile communication,
Explaining the dielectric filter, the dielectric filter is configured by electrically connecting and mounting electric elements such as an inductor, a capacitor, and a dielectric resonator by solder or the like on an insulating substrate on which a conductor pattern is formed. . Further, in the dielectric filter, the input / output terminal and the ground terminal are mounted on the mother board together with other high frequency electronic components by means such as soldering.

【0012】上述の誘電体共振器は、四角柱状をしたセ
ラミックスに内部導体及び外部導体を形成して構成され
るが、セラミックスはせん断応力に弱く、じん性が小さ
いという性質がある。又、セラミックスと導体膜との境
界面での導体膜強度も、実用的には、まあまあ満足でき
る程度の大きさである。
The above-mentioned dielectric resonator is constructed by forming an inner conductor and an outer conductor in a quadrangular prism-shaped ceramic, but the ceramic has a property that it is weak against shear stress and has a low toughness. Also, the strength of the conductor film at the interface between the ceramic and the conductor film is practically sufficiently large.

【0013】しかしながら、従来の技術によれば、誘電
体共振器は、誘電体フィルタを構成する他の部品に比
べ、形状、重量が大きいため、落下、振動、反り等によ
る応力負荷が、他の部品に比べ大きく、誘電体共振器と
誘電体フィルタ用基板との接合面で、誘電体共振器の欠
け、あるいは導体膜の剥離等の破損が生じるという問題
があった。
However, according to the conventional technique, since the dielectric resonator has a larger shape and weight than other parts constituting the dielectric filter, the stress load due to dropping, vibration, warping, etc., is different. This is larger than the parts, and there is a problem that the dielectric resonator may be chipped or the conductor film may be peeled off at the joint surface between the dielectric resonator and the dielectric filter substrate.

【0014】又、誘電体共振器は、誘電体フィルタ用基
板との接合面積が大きいので、接合強度が大きくなる反
面、リジッドな構造のために、落下衝撃、振動、反り等
が加わった際に、応力負荷も大きく、接合面で誘電体共
振器の欠け、あるいは導体膜の剥離等の破損が生じると
いう問題があった。
Further, since the dielectric resonator has a large bonding area with the dielectric filter substrate, the bonding strength is increased, but due to the rigid structure, when a drop impact, vibration, warpage or the like is applied. However, the stress load is large, and there is a problem that the dielectric resonator is broken or the conductor film is peeled off at the joint surface.

【0015】更に、インダクタ、コンデンサ、誘電体共
振器は、半田等の手段によって、絶縁基板上に形成され
た導体パターンと電気的に接続されるが、落下衝撃、振
動、反り等により、外部応力が負荷されると、インダク
タ、コンデンサの電極が剥離したり、半田にひびが入る
等、電気的、機械的に破損しやすいという問題があっ
た。
Further, the inductor, the capacitor, and the dielectric resonator are electrically connected to the conductor pattern formed on the insulating substrate by means of solder or the like, but are subjected to external stress due to drop impact, vibration, warpage or the like. However, there is a problem in that the electrodes of the inductor and the capacitor are easily peeled off, the solder is cracked, and the like, which is easily electrically and mechanically damaged.

【0016】又、誘電体フィルタが実装されたマザー基
板に、反り等の外部応力が負荷されると、入出力端子及
び接地端子の半田接合面に応力が集中し、入出力端子及
び接地端子に形成されている導体が剥離したり、半田に
ひびが入る等の問題があった。
When an external stress such as a warp is applied to the mother board on which the dielectric filter is mounted, the stress concentrates on the solder joint surfaces of the input / output terminal and the ground terminal, and the input / output terminal and the ground terminal are connected. There are problems such as peeling of the formed conductor and cracking of the solder.

【0017】そこで、本発明の技術的課題は、電子部品
と電子部品を実装する基板との間に、応力を緩和させる
機能を基板側に持たせることにより、落下衝撃、振動、
反り等に対する耐久性を向上させた電子部品実装用絶縁
基板を提供することにある。
Therefore, the technical problem of the present invention is to provide drop shock, vibration, and the like between the electronic parts and the board on which the electronic parts are mounted by providing the board side with a function of relieving stress.
An object of the present invention is to provide an insulating substrate for mounting electronic components, which has improved durability against warping and the like.

【0018】[0018]

【課題を解決するための手段】本発明によると、電子部
品が実装される絶縁基板の外力によって生じる応力集中
部に、1以上のスリット状の抜き穴、及び1以上の切り
欠きの少なくともいずれかからなる欠損部が形成されて
いることを特徴とする電子部品実装用絶縁基板が得られ
る。
According to the present invention, at least one of one or more slit-shaped holes and one or more notches is formed in a stress concentration portion generated by an external force of an insulating substrate on which electronic components are mounted. It is possible to obtain an insulating substrate for mounting electronic parts, which is characterized in that a defective portion made of is formed.

【0019】又、本発明によると、複数の前記欠損部
が、所定の間隔を置いて形成されていることを特徴とす
る電子部品実装用絶縁基板が得られる。
Further, according to the present invention, there can be obtained an insulating substrate for mounting electronic parts, characterized in that a plurality of the defective portions are formed at a predetermined interval.

【0020】又、本発明によると、複数の前記欠損部
が、互いに交差していることを特徴とする電子部品実装
用絶縁基板が得られる。
Further, according to the present invention, there can be obtained an insulating substrate for mounting electronic parts, wherein a plurality of the defective portions intersect each other.

【0021】又、本発明によると、前記欠損部が第一の
欠損部と、分岐した第二の欠損部からなっていることを
特徴とする電子部品実装用絶縁基板が得られる。
According to the present invention, there is also obtained an insulating substrate for mounting electronic parts, characterized in that the defective portion comprises a first defective portion and a branched second defective portion.

【0022】又、本発明によると、屈曲した欠損部が形
成されていることを特徴とする電子部品実装用絶縁基板
が得られる。
Further, according to the present invention, there can be obtained an insulating substrate for mounting electronic parts, which is characterized in that a bent defect portion is formed.

【0023】又、本発明によると、欠損部のエッジの角
が任意の曲率を持って形成されていることを特徴とする
電子部品実装用絶縁基板が得られる。
Further, according to the present invention, there can be obtained an insulating substrate for mounting electronic parts, characterized in that the corners of the edges of the defective portion are formed with an arbitrary curvature.

【0024】又、本発明によると、前記絶縁基板に設け
られた欠損部近傍の互いに対向する面に形成された導体
が、前記欠損部の基板厚さ方向の側面の少なくとも一部
に導体を形成することにより、互いに電気的に短絡する
ことを特徴とする電子部品実装用絶縁基板が得られる。
Further, according to the present invention, the conductors formed on the surfaces of the insulating substrate, which face each other in the vicinity of the defective portion and are opposed to each other, form the conductor on at least a part of the side surface of the defective portion in the substrate thickness direction. By doing so, it is possible to obtain an insulating substrate for electronic component mounting, which is electrically short-circuited with each other.

【0025】[0025]

【発明の実施の形態】本発明の電子部品実装用絶縁基板
の実施の形態を誘電体フィルタによって説明する。
BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of an insulating substrate for mounting electronic parts of the present invention will be described with a dielectric filter.

【0026】図1(a)は、基板16を用いた誘電体フ
ィルタ20の外観図である。図1(b)は、本発明によ
る基板16の部品面から見た図、図1(c)は、半田面
から見た図である。
FIG. 1A is an external view of a dielectric filter 20 using the substrate 16. FIG. 1B is a view seen from the component side of the board 16 according to the present invention, and FIG. 1C is a view seen from the solder side.

【0027】入出力用端子7、接地用端子9、誘電体共
振器接地用導体3a,3b、及び電気素子接続用導体6
が形成されていることは、従来の技術で述べたと同様で
あるが、本発明による基板16は、更に、同軸型誘電体
共振器2,2’と基板16上に設けられた接地用導体3
aとの接合部に隣接するように、細長い切り口(スリッ
ト状)の抜き穴17が形成されている。
Input / output terminal 7, grounding terminal 9, dielectric resonator grounding conductors 3a and 3b, and electric element connecting conductor 6
However, the substrate 16 according to the present invention further includes the coaxial dielectric resonators 2 and 2'and the grounding conductor 3 provided on the substrate 16.
An elongated cut-out (slit-shaped) hole 17 is formed so as to be adjacent to the joint with a.

【0028】この抜き穴17の形成方法としては、ドリ
ルで二つの穴を開け、カッターで二つの穴をつなぐよう
に形成するか、量産性を考慮すれば、プレスによって打
ち抜く等の方法がある。又、抜き穴17の両端の角の断
面形状は、四角形状であっても構わないが、応力が負荷
された時に、クラックの起源になる恐れがあるため、円
形状の方が有効である。
As the method of forming the punched holes 17, there are a method of forming two holes with a drill and connecting the two holes with a cutter, or a method of punching in consideration of mass productivity. The cross-sectional shape of the corners at both ends of the punched hole 17 may be square, but a circular shape is more effective because it may cause cracks when stress is applied.

【0029】又、基板16上に、誘電体共振器2,2’
を接地する場合には、抜き穴17を避けて接地されるた
め、互いに隣合う誘電体共振器2,2’は、抜き穴17
の間隔を置いて接地される。そのため、各誘電体共振器
2,2’の間は、応力的にフレキシブルに構成されてお
り、誘電体フィルタの落下衝撃、振動、反り等に対し、
耐久性が向上する。
Further, on the substrate 16, the dielectric resonators 2, 2 '
When grounding, the holes 17 are avoided and grounded, so that the dielectric resonators 2 and 2'adjacent to each other are
It is grounded at intervals. Therefore, the space between the dielectric resonators 2 and 2'is configured to be flexible in terms of stress, and against the drop impact, vibration, warpage, etc. of the dielectric filter,
The durability is improved.

【0030】更に、抜き穴17の基板厚さ方向の側面に
導体18を形成することによって、基板16の両対向面
に形成された接地用導体3a,3bが、互いに短絡する
ので、従来の技術で述べたスルーホール4の機能を兼ね
備えることも可能である。従来のスルーホールは、ドリ
ルによって径の小さい穴を多数あける必要があり、ドリ
ルの消耗が激しく、コストが高くなるという問題があっ
たが、本発明の抜き穴17をスルーホールとして利用す
る場合、プレスによる打ち抜きで形成できるので、コス
トを低く抑えられるという利点がある。
Further, by forming the conductor 18 on the side surface of the punched hole 17 in the substrate thickness direction, the grounding conductors 3a and 3b formed on both opposing surfaces of the substrate 16 are short-circuited to each other. It is also possible to combine the function of the through hole 4 described above. The conventional through hole has a problem that it is necessary to make a large number of holes having a small diameter with a drill, and the wear of the drill is severe and the cost is high. However, when using the punched hole 17 of the present invention as a through hole, Since it can be formed by punching with a press, there is an advantage that the cost can be kept low.

【0031】又、切り欠き19を入出力端子7、接地用
端子9の近傍に設けることによって、マザー基板に外部
応力が負荷されても、切り欠き19によって、応力が緩
和されるので、入出力端子6及び接地用端子9とマザー
基板(図4の符号24参照)との半田接合部の落下衝
撃、振動、反り等に対する耐久性が向上する。
Further, by providing the notch 19 near the input / output terminal 7 and the grounding terminal 9, the stress is relieved by the notch 19 even if external stress is applied to the mother board. The durability of the solder joint between the terminal 6 and the grounding terminal 9 and the mother board (see reference numeral 24 in FIG. 4) against drop impact, vibration, warpage, etc. is improved.

【0032】この切り欠き19の形成方法としては、ル
ータによって形成するか、量産性を考慮すれば、プレス
によって打ち抜く等の方法がある。又、切り欠き19の
角は、四角形状であっても、もちろん構わないが、負荷
応力によるクラックの起源になる恐れがあるため、円形
状の方が効果があるのは、抜き穴の場合と同様である。
As a method of forming the notch 19, there is a method of forming it by a router or punching it by a press in consideration of mass productivity. The corners of the notch 19 may be square, of course, but the circular shape is more effective than the case of the punched hole because it may cause cracks due to load stress. It is the same.

【0033】具体的には、誘電体フィルタ用基板16の
外形寸法は、従来の技術と同様に、11×11×0.8
mm3(L×W×T)で、スリット状の抜き穴17は、
長さ5mm×幅0.6mm、切り欠き19は、長さ2m
m×幅0.3mmである。
Specifically, the external dimensions of the dielectric filter substrate 16 are 11 × 11 × 0.8, as in the conventional technique.
mm 3 (L × W × T), the slit-shaped hole 17 is
Length 5 mm x width 0.6 mm, notch 19 is 2 m long
m × width 0.3 mm.

【0034】その他、フィルタ回路構成、部品構成、及
び素子値等は、従来の技術の説明で述べたと同様であ
る。電気特性的には、従来と同等の特性が得られ、又、
図7に示したように、フィルタ20の上面から応力を負
荷した場合、試験基板15のAの部分が約7mm反るま
で誘電体共振器2,2’と基板16との間に剥離が見ら
れなかった。この状態を図2に示している。誘電体共振
器2,2’と基板16との接合面、及び入出力端子7、
接地用端子9に架かる負荷応力の集中が、抜き穴17及
び切り欠き19(図2では図示していない)によって、
緩和され、反り強度においては、従来よりも約3mmの
改善が見られた。
Other than that, the filter circuit configuration, the component configuration, the element value and the like are the same as those described in the description of the conventional technique. In terms of electrical characteristics, the same characteristics as conventional ones can be obtained, and
As shown in FIG. 7, when stress is applied from the upper surface of the filter 20, peeling is observed between the dielectric resonators 2, 2 ′ and the substrate 16 until the portion A of the test substrate 15 warps by about 7 mm. I couldn't do it. This state is shown in FIG. A joint surface between the dielectric resonators 2, 2'and the substrate 16 and the input / output terminal 7,
The concentration of the load stress applied to the grounding terminal 9 is prevented by the holes 17 and the notches 19 (not shown in FIG. 2).
It was alleviated, and the warp strength was improved by about 3 mm over the conventional one.

【0035】又、同軸型共振器以外のインダクタ、コン
デンサ等の電気素子5に隣接して、抜き穴17を形成す
れば、半田接合部近傍の外部応力負荷による応力が緩和
され、半田接合部の落下衝撃、振動、反り等の耐久性が
向上する。
Further, if the hole 17 is formed adjacent to the electric element 5 such as an inductor or a capacitor other than the coaxial resonator, the stress due to the external stress load in the vicinity of the solder joint is relieved, and the solder joint is removed. Improves durability against drop impact, vibration, warpage, etc.

【0036】又、図3(a)に示すように、他の実施例
として、比較的長い部品の場合には、二つ以上の複数の
抜き穴を連続して形成すると、更に、効果は増大する。
又、抜き穴の形状も、図3(b)L型(21)、図3
(c)+型(22)、図3(d)T型(23)等、部品
の形状や応力の分布によって、最適の形状を選択し、
又、組み合せることによって、基板の機械的自由度が増
し、更に、負荷応力の緩和効果は増大する。又、このこ
とは、切り欠き19についても同様である。
As shown in FIG. 3 (a), as another embodiment, in the case of a relatively long component, if two or more punched holes are continuously formed, the effect is further enhanced. To do.
Also, the shape of the punched hole is as shown in FIG.
(C) + type (22), FIG. 3 (d) T type (23), etc., select the optimum shape according to the shape of the part and the distribution of stress,
Further, by combining them, the mechanical flexibility of the substrate is increased, and the effect of relaxing the load stress is increased. This also applies to the cutout 19.

【0037】更に、他の実施例として、図4に示すよう
に、抜き穴17及び切り欠き19をマザー基板24に形
成してもよく、特に、携帯電話機用の基板のように、細
長い形状のマザー基板の場合には、長手方向の剛性が弱
いため、特に、効果が大きい。なお、図4では、簡単な
ため、各部品引き回しのための導体パターンの図示を略
している。更に、実装部品(実施例では誘電体フィル
タ)とマザー基板の両方に形成すれば、更に、負荷応力
の緩和効果は増大する。
Further, as another embodiment, as shown in FIG. 4, the holes 17 and the notches 19 may be formed in the mother substrate 24, and in particular, as in the case of a substrate for a mobile phone, it has an elongated shape. In the case of the mother substrate, the rigidity in the longitudinal direction is weak, so that the effect is particularly large. Note that, in FIG. 4, for simplicity, illustration of conductor patterns for routing each component is omitted. Further, if it is formed on both the mounted component (dielectric filter in the embodiment) and the mother substrate, the effect of alleviating the load stress is further increased.

【0038】本実施例は、本発明による一例を示したの
であって、抜き穴及び切り欠きの形状、数、組み合せ、
及び形成場所は、応力の集中を緩和することを目的とす
るものであり、本実施例に限定されないのはいうまでも
ない。
This embodiment shows an example according to the present invention, in which the shapes, numbers, and combinations of punch holes and notches,
Needless to say, the formation location is for the purpose of relieving the concentration of stress and is not limited to this embodiment.

【0039】[0039]

【発明の効果】以上に述べたように、本発明では、基板
に抜き穴と切り欠きを形成することによって、外部応力
負荷による応力集中を緩和することができ、落下衝撃、
振動、反り等の耐久性に優れた基板、及びそれに実装さ
れた電子部品実装用絶縁基板を提供することができた。
As described above, according to the present invention, by forming a hole and a notch in a substrate, stress concentration due to an external stress load can be relieved, and drop impact,
It was possible to provide a substrate having excellent durability against vibration, warpage, etc., and an insulating substrate for mounting electronic components mounted thereon.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明による基板を用いた誘電体フィルタを示
す図、図1(a)は、フィルタの外観を示す斜視図、図
1(b)は、本発明による基板の部品面から見た図、図
1(c)は、本発明による基板の半田面から見た図。
FIG. 1 is a diagram showing a dielectric filter using a substrate according to the present invention, FIG. 1 (a) is a perspective view showing the appearance of the filter, and FIG. 1 (b) is seen from the component side of the substrate according to the present invention. FIG. 1C is a view seen from the solder surface of the substrate according to the present invention.

【図2】本発明による基板を使用した誘電体フィルタの
反りの状態を示す図。
FIG. 2 is a diagram showing a warped state of a dielectric filter using a substrate according to the present invention.

【図3】本発明による抜き穴、切り欠きの形状を示す
図、図3(a)は抜き穴が3個縦に並んだ図、図3
(b)はL字形の抜き穴を示す図、図3(c)は十字形
の抜き穴を示す図、図3(d)はT字形の抜き穴を示す
図。
FIG. 3 is a diagram showing the shape of a punch hole and a notch according to the present invention, FIG. 3 (a) is a diagram showing three punch holes arranged vertically, and FIG.
FIG. 3B is a diagram showing an L-shaped hole, FIG. 3C is a diagram showing a cross-shaped hole, and FIG. 3D is a diagram showing a T-shaped hole.

【図4】本発明による欠損部(抜き穴、切り欠き)をマ
ザー基板に適用した図。
FIG. 4 is a diagram in which a defective portion (a hole, a notch) according to the present invention is applied to a mother substrate.

【図5】従来の基板を用いたフィルタを示す図、図5
(a)は外観を示す斜視図、図5(b)は、従来の基板
の部品面から見た図。図5(c)は、従来の基板の半田
面から見た図。
FIG. 5 is a diagram showing a filter using a conventional substrate, FIG.
FIG. 5A is a perspective view showing the appearance, and FIG. 5B is a view seen from the component side of a conventional board. FIG. 5C is a view seen from the solder surface of the conventional substrate.

【図6】誘電体フィルタの周波数特性を示す図。FIG. 6 is a diagram showing frequency characteristics of a dielectric filter.

【図7】誘電体フィルタの反り試験方法を示す図。FIG. 7 is a diagram showing a method of warping a dielectric filter.

【符号の説明】[Explanation of symbols]

1 (従来の)基板 2,2’ 同軸型誘電体共振器 3a,3b,3c 接地用導体 4 スルーホール 5 電気素子 6 電気素子接続用導体 7 入出力端子 8a,8b,8c 入出力端子用導体 9 接地用端子 10 (従来構成による)誘電体フィルタ 11 (同軸型誘電体共振器の)外導体 12 (同軸型誘電体共振器の)内導体 14 ケース 15 (反り試験用)試験基板 16 (本発明による)基板 17 抜き穴 18 抜き穴側面の導体 19 切り欠き 20 (本発明による基板を用いた)誘電体フィルタ 21 L型の抜き穴 22 +型の抜き穴 23 T型の抜き穴 24 マザー基板 25,26,27,28,29 高周波部品 H フィルタの高さ L 基板の長さ W 基板の幅 T 基板の厚さ 1 (conventional) substrate 2, 2'coaxial dielectric resonator 3a, 3b, 3c grounding conductor 4 through hole 5 electric element 6 electric element connecting conductor 7 input / output terminals 8a, 8b, 8c input / output terminal conductor 9 grounding terminal 10 (according to conventional configuration) dielectric filter 11 outer conductor (of coaxial type dielectric resonator) 12 inner conductor (of coaxial type dielectric resonator) 14 case 15 (for warpage test) test board 16 (this) (According to the invention) substrate 17 punched hole 18 conductor on the side of the punched hole 19 cutout 20 dielectric filter 21 (using the substrate according to the invention) 21 L-shaped punched hole 22 + type punched hole 23 T-shaped punched hole 24 mother board 25, 26, 27, 28, 29 High frequency components H Filter height L Substrate length W Substrate width T Substrate thickness

Claims (7)

【特許請求の範囲】[Claims] 【請求項1】 電子部品が実装される絶縁基板の外力に
よって生じる応力集中部に、1以上の抜き穴、及び1以
上の切り欠きの少なくともいずれかからなる欠損部を形
成したことを特徴とする電子部品実装用絶縁基板。
1. A stress concentrating portion generated by an external force of an insulating substrate on which an electronic component is mounted is formed with at least one cutout hole and at least one cutout portion as a defect portion. Insulation board for mounting electronic components.
【請求項2】 請求項1記載の欠損部が、所定の間隔を
置いて形成されていることを特徴とする電子部品実装用
絶縁基板。
2. An insulating substrate for mounting electronic parts, wherein the defective portions according to claim 1 are formed at a predetermined interval.
【請求項3】 請求項1記載の欠損部が、互いに交差し
て形成されていることを特徴とする電子部品実装用絶縁
基板。
3. An insulating substrate for mounting electronic parts, wherein the defective portions according to claim 1 are formed so as to intersect each other.
【請求項4】 請求項1記載の欠損部が、第一の欠損部
と、該欠損部から分岐した第二の欠損部からなることを
特徴とする電子部品実装用絶縁基板。
4. The insulating substrate for mounting electronic parts, wherein the defective portion according to claim 1 comprises a first defective portion and a second defective portion branched from the defective portion.
【請求項5】 請求項1記載の欠損部が、屈曲した形状
に形成されていることを特徴とする電子部品実装用絶縁
基板。
5. The insulating substrate for mounting electronic parts, wherein the defect portion according to claim 1 is formed in a bent shape.
【請求項6】 請求項1記載の欠損部の縁端部の角が任
意の曲率を持って形成されていることを特徴とする電子
部品実装用絶縁基板。
6. An insulating board for electronic component mounting, wherein the corners of the edge of the defect portion according to claim 1 are formed with an arbitrary curvature.
【請求項7】 請求項1記載の絶縁基板に設けられた欠
損部近傍の互いに対向する面に形成された導体が、前記
欠損部の基板厚さ方向側面の少なくとも一部に導体を形
成することにより、互いに電気的に短絡していることを
特徴とする電子部品実装用絶縁基板。
7. The conductor formed on the mutually opposing surfaces in the vicinity of the defective portion provided on the insulating substrate according to claim 1, forms a conductor on at least a part of the side surface of the defective portion in the substrate thickness direction. Are electrically short-circuited with each other, the insulating substrate for mounting electronic components.
JP35195695A 1995-12-26 1995-12-26 Insulating board for mounting electronic component Pending JPH09181403A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP35195695A JPH09181403A (en) 1995-12-26 1995-12-26 Insulating board for mounting electronic component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP35195695A JPH09181403A (en) 1995-12-26 1995-12-26 Insulating board for mounting electronic component

Publications (1)

Publication Number Publication Date
JPH09181403A true JPH09181403A (en) 1997-07-11

Family

ID=18420782

Family Applications (1)

Application Number Title Priority Date Filing Date
JP35195695A Pending JPH09181403A (en) 1995-12-26 1995-12-26 Insulating board for mounting electronic component

Country Status (1)

Country Link
JP (1) JPH09181403A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6490165B2 (en) 2000-11-14 2002-12-03 Nec Corporation Deformation-resistant mounting structure of portable device
JP2009164560A (en) * 2007-12-14 2009-07-23 Epson Imaging Devices Corp Mounting structure, electrooptical device, and electronic apparatus
JP2009267234A (en) * 2008-04-28 2009-11-12 Tdk Corp Electronic device
US7619168B2 (en) 2005-08-18 2009-11-17 Tdk Corporation Flexible substrate, mounted structure, display unit, and portable electronic apparatus

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6490165B2 (en) 2000-11-14 2002-12-03 Nec Corporation Deformation-resistant mounting structure of portable device
US6762944B2 (en) 2000-11-14 2004-07-13 Nec Corporation Deformation-resistant mounting structure of portable device
CN1333625C (en) * 2000-11-14 2007-08-22 日本电气株式会社 Deformation-resistant mounting for a circuit board in a portable device
CN1333624C (en) * 2000-11-14 2007-08-22 日本电气株式会社 Deformation-resistant mounting for a circuit board in a portable device
CN100340142C (en) * 2000-11-14 2007-09-26 日本电气株式会社 Deformation-resistant mounting for a circuit board in a portable device
US7619168B2 (en) 2005-08-18 2009-11-17 Tdk Corporation Flexible substrate, mounted structure, display unit, and portable electronic apparatus
JP2009164560A (en) * 2007-12-14 2009-07-23 Epson Imaging Devices Corp Mounting structure, electrooptical device, and electronic apparatus
JP2009267234A (en) * 2008-04-28 2009-11-12 Tdk Corp Electronic device
KR101035843B1 (en) * 2008-04-28 2011-05-20 티디케이가부시기가이샤 Electronic device
US8212152B2 (en) 2008-04-28 2012-07-03 Tdk Corporation Electronic device

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