JPH09121102A - Surface mount structure for layered dielectric filter - Google Patents
Surface mount structure for layered dielectric filterInfo
- Publication number
- JPH09121102A JPH09121102A JP30052595A JP30052595A JPH09121102A JP H09121102 A JPH09121102 A JP H09121102A JP 30052595 A JP30052595 A JP 30052595A JP 30052595 A JP30052595 A JP 30052595A JP H09121102 A JPH09121102 A JP H09121102A
- Authority
- JP
- Japan
- Prior art keywords
- pattern
- dielectric filter
- laminated dielectric
- corners
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、積層誘電体フィル
タを基板上に面実装する構造に関し、更に詳しく述べる
と、実装基板の構造を工夫することにより、基板実装時
に積層誘電体フィルタ単体では得られない良好な特性を
発現させ得るようにした積層誘電体フィルタの面実装構
造に関するものである。この技術は、例えばマイクロ波
帯で用いる各種のコードレス電話などに用いられる。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure in which a laminated dielectric filter is surface-mounted on a substrate. More specifically, by devising the structure of the mounting substrate, a laminated dielectric filter alone can be obtained at the time of mounting on the substrate. The present invention relates to a surface mounting structure of a laminated dielectric filter capable of exhibiting excellent characteristics that cannot be obtained. This technique is used, for example, in various cordless telephones used in the microwave band.
【０００２】[0002]
【従来の技術】誘電体材料を使用するマイクロ波用フィ
ルタの一つに、共振器をストリップ線路で構成するもの
がある。例えば、誘電体材料の内部にストリップ線路型
の共振器内導体を設けて、その一端が誘電体材料の外表
面の外部アース導体に短絡される短絡端となり、他端が
開放端となるように構成する。ここで共振器内導体は、
共振波長の１／４の奇数倍の長さに対応する。誘電体材
料の内部で、このような共振器内導体を複数個、フィル
タ特性に対応した結合度が得られるように所定の間隔で
所定の向きに並設することによって、バンドパス・フィ
ルタ特性が得られる。この種の誘電体フィルタは、近年
の通信機器の小型化に伴い一層の小型化が要求され、そ
れに対応すべく一部で積層構造が採用されている。これ
は多数の誘電体シート（グリーンシート）を積層し加圧
して一体焼結するものである。2. Description of the Related Art One of microwave filters using a dielectric material has a resonator formed of a strip line. For example, a stripline type intracavity conductor is provided inside the dielectric material, one end of which is a short-circuited end shorted to an external ground conductor on the outer surface of the dielectric material, and the other end is an open end. Configure. Where the intracavity conductor is
This corresponds to a length that is an odd multiple of 1/4 of the resonance wavelength. By arranging a plurality of such intracavity conductors in parallel in a predetermined direction at predetermined intervals so as to obtain a coupling degree corresponding to the filter characteristic, the bandpass filter characteristic is improved. can get. This type of dielectric filter is required to be further downsized with downsizing of communication equipment in recent years, and in order to meet the demand, a laminated structure is partially adopted. This is a method in which a large number of dielectric sheets (green sheets) are laminated, pressed and integrally sintered.
【０００３】２段インターデジタル型フィルタの一例を
図７に示す。Ａは底面（基板実装面に対向する端子面）
側から見た外観を示しており、Ｂは内部の共振器内導体
の形状とその外部アース導体との接続状態を示してい
る。この積層誘電体フィルタ１０は、誘電体チップ１２
の内部に配置した一端開放で他端短絡の２個の共振器内
導体１４と、誘電体チップ１２の外表面に設けた共振器
外導体となる外部アース導体１６と、両共振器内導体と
結合する入出力電極１８を有する。ここで共振器内導体
１４は、誘電体チップ１２の一方の側面からそれに対向
する他方の側面に達するように設けられ、一端が開放状
態（外部アース導体１６に接続されない）であって、他
端が短絡状態（外部アース導体１６に接続される）であ
る。これによってトリプレート形共振回路を構成してい
る。入出力電極１８は、誘電体チップ１２の両側に位置
し、底面から側面へと延びるＬ形状である。An example of a two-stage interdigital filter is shown in FIG. A is the bottom surface (terminal surface facing the board mounting surface)
The external view is shown from the side, and B shows the shape of the internal resonator conductor and the connection state with the external ground conductor. This laminated dielectric filter 10 includes a dielectric chip 12
Two intra-resonator conductors 14 opened inside and short-circuited at the other end, an external earth conductor 16 serving as a resonator outer conductor provided on the outer surface of the dielectric chip 12, and both intra-resonator conductors. It has an input / output electrode 18 to be coupled. Here, the in-resonator conductor 14 is provided so as to reach from one side surface of the dielectric chip 12 to the other side surface facing the dielectric chip 12, and one end is in an open state (not connected to the external ground conductor 16) and the other end. Is a short-circuited state (connected to the external ground conductor 16). This constitutes a triplate resonance circuit. The input / output electrodes 18 are located on both sides of the dielectric chip 12 and have an L shape extending from the bottom surface to the side surfaces.
【０００４】従来、ストリップ線路型誘電体フィルタを
面実装するための基板は、図６のＡに示すような構造で
ある。即ち、実装面に入出力パターン（入力側パターン
２０と出力側パターン２２）を形成し、その周辺にアー
スパターン２４を設け、裏面は全面アースとなってい
て、実装面のアースパターン２４と裏面の全面アースと
が多数のスルーホール部２６（白丸で示す部分）によっ
て導通している構造である。スルーホール部２６は、誘
電体フィルタを基板上に搭載したときに該誘電体フィル
タによって隠れる実装面のアースパターン部分（一点鎖
線で示す領域）にも入力側と出力側とを分離するように
数個（ここでは３個）形成されており、それと共に誘電
体フィルタによっては隠れない周囲の部分にも多数スル
ーホール部２６が形成されている。このような基板構造
は、チップ型の積層誘電体フィルタを面実装する場合も
同じである。Conventionally, a substrate for surface-mounting a strip line type dielectric filter has a structure as shown in A of FIG. That is, an input / output pattern (input side pattern 20 and output side pattern 22) is formed on the mounting surface, a ground pattern 24 is provided around the input / output pattern, and the entire back surface is grounded. This is a structure in which the entire surface ground is electrically connected by a large number of through holes 26 (portions indicated by white circles). The through-hole portion 26 is formed so as to separate the input side and the output side also in the ground pattern portion (the area indicated by the alternate long and short dash line) of the mounting surface which is hidden by the dielectric filter when mounted on the substrate. The number of the through holes 26 is three (three in this case), and a large number of through holes 26 are also formed in the peripheral portion that is not hidden by the dielectric filter. Such a substrate structure is the same when the chip-type laminated dielectric filter is surface-mounted.
【０００５】積層誘電体フィルタは、その端子レイアウ
トを図８に示すように、通常、入力電極ＩＮと出力電極
ＯＵＴ、及び四隅部分（Ｓ−ＧＮＤとＯ−ＧＮＤ）の合
計６箇所で半田付けされる。即ち、上記の例では四隅の
全てでアースパターンに接続される。このような基板に
積層誘電体フィルタを面実装したときに得られるフィル
タ特性は、図６のＢに示す如きものとなり、積層誘電体
フィルタ単体の特性が現れている。中心周波数ｆ0 は１
９０７ＭＨz であり、ｆ0 −２４０ＭＨz での減衰量は
３０．５ｄＢであった。As shown in FIG. 8, the laminated dielectric filter is usually soldered at a total of six places of the input electrode IN and the output electrode OUT and the four corners (S-GND and O-GND). It That is, in the above example, all four corners are connected to the ground pattern. The filter characteristics obtained when the laminated dielectric filter is surface-mounted on such a substrate are as shown in FIG. 6B, which shows the characteristics of the laminated dielectric filter alone. The center frequency f 0 is 1
A 907MHz, attenuation at f 0 -240MHz was 30.5DB.
【０００６】[0006]
【発明が解決しようとする課題】このように従来の技術
では、積層誘電体フィルタの特性を忠実に反映し得るよ
うに、基板の入力側パターン２０と出力側パターン２２
間にスルーホール部２６を設けて入出力間での直接結合
を排除し、且つ誘電体フィルタのアースを十分にとって
接地静電容量をなくすような方向で対策が採られ面実装
が行われていた。しかし積層誘電体フィルタのように、
フィルタの小型化に伴い、Ｑを十分大きくできなくなる
と、フィルタ単体のみの改良では従来のような高性能を
発現させるのが困難となってきている。As described above, in the conventional technique, the input side pattern 20 and the output side pattern 22 of the substrate are provided so that the characteristics of the laminated dielectric filter can be faithfully reflected.
A through-hole portion 26 is provided between them to eliminate direct coupling between the input and output, and to prevent grounding capacitance by sufficiently grounding the dielectric filter, the surface mounting is performed. . But like a laminated dielectric filter,
If the Q cannot be made sufficiently large with the downsizing of the filter, it becomes difficult to achieve the conventional high performance only by improving the filter alone.
【０００７】本発明の目的は、積層誘電体フィルタ単体
では得られない高性能のフィルタ特性を、実装基板の構
造を改善し、フィルタと実装基板との組み合わせによっ
て得ることができるように工夫した積層誘電体フィルタ
の面実装構造を提供することである。An object of the present invention is to provide a high-performance filter characteristic which cannot be obtained by a single laminated dielectric filter by improving the structure of the mounting board and by combining the filter and the mounting board. It is to provide a surface mounting structure of a dielectric filter.
【０００８】[0008]
【課題を解決するための手段】本発明は、積層誘電体フ
ィルタを基板上に面実装する構造である。ここで積層誘
電体フィルタは、トリプレート形共振回路を有する一体
焼結構造のチップ部品であり、両側に底面から側面へと
延びるＬ形の入出力電極が設けられ、それ以外の外表面
の大部分が外部アース導体で覆われている。他方、基板
は、実装面に入出力パターンが形成されると共に、その
周辺にアースパターンが設けられ、裏面は全面アースと
なっていて、実装面のアースパターンと裏面の全面アー
スとの間が多数の導通部で接続されている構造である。
上記の積層誘電体フィルタを基板の実装面上に載置し、
入出力電極を入出力パターンに、外部アース導体をアー
スパターンに半田付けすることで面実装する。The present invention is a structure in which a laminated dielectric filter is surface-mounted on a substrate. Here, the laminated dielectric filter is a chip component of a monolithic sintered structure having a tri-plate type resonance circuit, which is provided with L-shaped input / output electrodes extending from the bottom surface to the side surfaces on both sides and has a large outer surface other than that. Part is covered by an external ground conductor. On the other hand, the board has an input / output pattern formed on the mounting surface and a ground pattern provided around the mounting surface, and the entire back surface is grounded. There are many gaps between the ground pattern on the mounting surface and the entire ground surface on the back surface. It is a structure in which they are connected by the conducting part of.
Place the above laminated dielectric filter on the mounting surface of the substrate,
Surface mounting is performed by soldering the input / output electrodes to the input / output pattern and the external ground conductor to the ground pattern.
【０００９】本発明の特徴は、積層誘電体フィルタを基
板の実装面上に載置したときに、該積層誘電体フィルタ
によって隠れない周辺のアースパターンには、裏面の全
面アースとの導通部が設けられているが、該積層誘電体
フィルタによって隠れるアースパターン部分の入力側と
出力側との間には、裏面の全面アースとの導通部が設け
られていない点である。また本発明の他の特徴は、積層
誘電体フィルタを基板の実装面上に載置したときに、該
積層誘電体フィルタの四隅のうち共振器短絡端（又は開
放端）側の二隅に対応する基板実装面部分に周囲のアー
スパターンと導通しない島状の浮きパターンを設け、積
層誘電体フィルタの共振器短絡端（又は開放端）側の二
隅近傍を浮きパターンに半田付けし、共振器開放端（又
は短絡端）側の二隅近傍をアースパターンに半田付けす
る点である。勿論、それらを組み合わせた構成は、最も
特性が向上する。A feature of the present invention is that when a laminated dielectric filter is placed on a mounting surface of a substrate, a peripheral earth pattern that is not hidden by the laminated dielectric filter has a conductive portion to the entire back surface ground. Although it is provided, a conductive portion to the whole ground on the back surface is not provided between the input side and the output side of the ground pattern portion hidden by the laminated dielectric filter. Another feature of the present invention is that when a laminated dielectric filter is placed on a mounting surface of a substrate, it corresponds to two corners on the resonator short-circuited end (or open end) side among the four corners of the laminated dielectric filter. An island-shaped floating pattern that does not conduct with the surrounding earth pattern is provided on the board mounting surface part, and the two corners on the resonator short-circuited end (or open end) side of the laminated dielectric filter are soldered to the floating pattern to form a resonator. The point is to solder the two corners on the open end (or short-circuit end) side to the ground pattern. Of course, the characteristic that the combination of them is most improved.
【００１０】基板としては、ガラスエポキシ基板（ガラ
ス布基材エポキシ樹脂銅張積層板）を使用するのが望ま
しい。積層誘電体フィルタとしては、例えば積層し接合
された多数の誘電体シートが焼結一体化された誘電体チ
ップと、該誘電体チップの内部に配置した一端開放で他
端短絡の２個の共振器内導体と、該誘電体チップの外表
面に設けた共振器外導体となる外部アース導体と、両共
振器内導体と結合するように両側に設けた入出力電極を
有し、短絡端と開放端が交互に位置する構造の２段イン
ターデジタル型フィルタを使用する。As the substrate, it is desirable to use a glass epoxy substrate (glass cloth base material epoxy resin copper clad laminate). The laminated dielectric filter includes, for example, a dielectric chip in which a large number of laminated and joined dielectric sheets are sintered and integrated, and two resonances arranged inside the dielectric chip and open at one end and short-circuited at the other end. An internal conductor, an external ground conductor serving as an external conductor of the resonator provided on the outer surface of the dielectric chip, and input / output electrodes provided on both sides so as to be coupled to the internal conductors of the resonator, and a short-circuited end A two-stage interdigital filter having a structure in which open ends are alternately located is used.
【００１１】[0011]
【発明の実施の態様】積層構造の誘電体フィルタは、多
数の誘電体シート（グリーンシート）を積層して加圧一
体化し、焼結する方法によって製造する。内部の共振器
内導体を導体ペーストのスクリーン印刷で誘電体シート
上に形成し、それを含めて誘電体シートを多数積層して
圧着一体化する。そして外部アース導体と入出力電極を
形成して焼結する。この種の積層誘電体フィルタにおい
ては、通常、多数個取りができるように、大きな誘電体
シートを使用し、圧着一体化した後に縦横に切断してチ
ップ状に分離し、チップ側面の必要部分に導電材料を付
着して焼結する製法が採用される。このようにして製造
する積層誘電体フィルタは、最近では縦横数mmの非常に
小さなチップ部品となっている。BEST MODE FOR CARRYING OUT THE INVENTION A laminated structure dielectric filter is manufactured by a method in which a large number of dielectric sheets (green sheets) are laminated, integrated under pressure, and sintered. The internal resonator conductor is formed on the dielectric sheet by screen printing of a conductor paste, and a large number of dielectric sheets including this are laminated and pressure-bonded and integrated. Then, an external earth conductor and an input / output electrode are formed and sintered. In this type of laminated dielectric filter, a large dielectric sheet is usually used so that a large number of them can be taken. A manufacturing method in which a conductive material is attached and sintered is adopted. The multilayer dielectric filter manufactured in this manner has recently become a very small chip component measuring several mm in length and width.
【００１２】このような小型の積層誘電体フィルタを基
板に面実装する場合に、基板の入出力パターンの間で実
装面のアースパターンと裏面の全面アース間を接続する
導通部を無くしたり、アースパターンの一部を浮かせる
と、現象的にはフィルタ特性における両側の減衰極が通
過域に接近するような特性曲線となり、結果的に減衰特
性が良好となる。つまり、フィルタ単体の機能と実装基
板の構造との組み合わせによって、実装時に良好な減衰
特性が発現するのである。なお、短絡端側の二隅を浮か
せる場合と開放端側の二隅を浮かせる場合は、ほぼ同等
の特性を呈することが判明している。When such a small laminated dielectric filter is surface-mounted on a substrate, a conducting portion for connecting the ground pattern on the mounting surface and the entire ground on the back surface between the input / output patterns of the substrate can be eliminated or grounded. When a part of the pattern is floated, the characteristic curve is such that the attenuation poles on both sides of the filter characteristic approach the pass band, and as a result, the attenuation characteristic becomes good. In other words, good attenuation characteristics are exhibited during mounting, depending on the combination of the function of the filter alone and the structure of the mounting board. It has been found that the two corners on the short-circuit end side and the two corners on the open end side have almost the same characteristics.
【００１３】[0013]
【実施例】以下、実施例のために使用した基板の実装面
のパターンと、それに積層誘電体フィルタを搭載したと
きのフィルタ特性の関係について説明する。ここで使用
した積層誘電体フィルタは、図７に示した如きものであ
り、その底面（端子面）のパターンを図８に示す。これ
は２段インターデジタル型フィルタであり、両側に入力
電極ＩＮと出力電極ＯＵＴが設けられ、それらと四隅近
傍の合計６点で実装基板に半田付けされる。四隅のうち
短絡端側の二隅をＳ−ＧＮＤで表し、開放端側の二隅を
Ｏ−ＧＮＤで表す。EXAMPLES The relationship between the pattern on the mounting surface of the substrate used for the examples and the filter characteristics when the laminated dielectric filter is mounted on the pattern will be described below. The laminated dielectric filter used here is as shown in FIG. 7, and the pattern of the bottom surface (terminal surface) thereof is shown in FIG. This is a two-stage interdigital filter, in which an input electrode IN and an output electrode OUT are provided on both sides, and these are soldered to a mounting board at a total of 6 points near the four corners. Of the four corners, two corners on the short-circuit end side are represented by S-GND, and two corners on the open end side are represented by O-GND.
【００１４】図１は第１の実施例を示しており、入出力
端の静電容量結合を調整する例である。基板の実装面パ
ターンは、入力側パターン２０と出力側パターン２２、
及びその周辺にアースパターン２４が設けられ、裏面は
全面アースとなっている。そして実装面のアースパター
ン２４と裏面の全面アースとの間は多数のスルーホール
部２６によって導通している。この第１の実施例は、図
１のＡに示すように、積層誘電体フィルタ１０を基板の
実装面上に載置したときに、該積層誘電体フィルタによ
って隠れる実装面のアースパターン部分（その部分を一
点鎖線で示す）の入力側と出力側との間に、裏面の全面
アースと導通するスルーホール部を設けない構造とした
ものである。積層誘電体フィルタを載置したときに隠れ
ない実装面のアースパターン部分には、多数のスルーホ
ール部２６を設けて裏面の全面アースと導通する構造と
なっている。FIG. 1 shows the first embodiment, which is an example of adjusting the capacitive coupling at the input and output ends. The mounting surface pattern of the board is the input side pattern 20 and the output side pattern 22,
And the ground pattern 24 is provided around it and the back surface is grounded entirely. The ground pattern 24 on the mounting surface and the entire ground on the back surface are electrically connected by a large number of through holes 26. In the first embodiment, as shown in FIG. 1A, when the laminated dielectric filter 10 is placed on the mounting surface of a substrate, the ground pattern portion of the mounting surface hidden by the laminated dielectric filter (that (The portion is indicated by the one-dot chain line) between the input side and the output side is not provided with a through hole portion which is electrically connected to the entire ground on the back surface. A large number of through holes 26 are provided in the ground pattern portion of the mounting surface which is not hidden when the laminated dielectric filter is placed, and the structure is such that the entire surface of the back surface is electrically connected to the ground.
【００１５】このような基板に積層誘電体フィルタ１０
を載置する。そして積層誘電体フィルタ１０の入力電極
を入力側パターン２０に、出力側電極を出力側パターン
２２に、また積層誘電体フィルタ１０の四隅近傍（２箇
所のＳ−ＧＮＤと２箇所のＯ−ＧＮＤ）をアースパター
ン２４に、合計６箇所で半田付けする。このように面実
装したときに得られるフィルタ特性を図１のＢに示す。
使用した積層誘電体フィルタは図６と同じであるので、
中心周波数ｆ0 は１９０７ＭＨz である。この面実装に
よるｆ0 −２４０ＭＨz での減衰量は、３４．４ｄＢで
あった。A laminated dielectric filter 10 is formed on such a substrate.
Is placed. The input electrode of the laminated dielectric filter 10 is the input side pattern 20, the output side electrode is the output side pattern 22, and the vicinity of the four corners of the laminated dielectric filter 10 (two S-GND and two O-GND). Are soldered to the ground pattern 24 at a total of 6 points. The filter characteristic obtained when the surface mounting is performed is shown in B of FIG.
Since the laminated dielectric filter used is the same as that in FIG. 6,
The center frequency f 0 is 1907 MHz. The amount of attenuation at f 0 -240 MHz by this surface mounting was 34.4 dB.
【００１６】図２は本発明の第２の実施例を示してお
り、基板のアースパターンによる調整例である。基板の
実装面パターンは、前記実施例と同様、入力側パターン
２０と出力側パターン２２、及びその周辺にアースパタ
ーン２４が設けられ、裏面は全面アースとなっている。
そして、実装面のアースパターン２４と裏面の全面アー
スとの間は多数のスルーホール部２６によって導通して
いる。この第２の実施例において、基板の実装面パター
ンは図２のＡに示すような形状である。つまり、積層誘
電体フィルタ１０を基板の実装面上に載置したときに、
該積層誘電体フィルタの四隅のうち短絡端側の二隅Ｓ−
ＧＮＤに対応する基板実装面部分に周囲のアースパター
ン２４と導通しない島状の浮きパターン２８を設ける。
但し、第１の実施例とは異なり、入力側パターン２０と
出力側パターン２２との間に複数のスルーホール部２６
を設けてアースパターン２４と裏面の全面アースとが導
通するようにしている。FIG. 2 shows a second embodiment of the present invention, which is an example of adjustment by the ground pattern of the substrate. The mounting surface pattern of the substrate is provided with an input side pattern 20, an output side pattern 22 and a ground pattern 24 around the same, as in the above-described embodiment, and the back surface is entirely grounded.
The ground pattern 24 on the mounting surface and the entire ground on the back surface are electrically connected by a number of through holes 26. In the second embodiment, the mounting surface pattern of the substrate has a shape as shown in A of FIG. That is, when the laminated dielectric filter 10 is placed on the mounting surface of the substrate,
Of the four corners of the laminated dielectric filter, the two corners S- on the short-circuit end side
An island-shaped floating pattern 28 that is not electrically connected to the surrounding earth pattern 24 is provided on the board mounting surface portion corresponding to GND.
However, unlike the first embodiment, a plurality of through hole portions 26 are provided between the input side pattern 20 and the output side pattern 22.
Is provided so that the ground pattern 24 and the entire ground on the back surface are electrically connected.
【００１７】このような基板に積層誘電体フィルタ１０
を載置する。そして積層誘電体フィルタ１０の入力電極
を入力側パターン２０に、出力側電極を出力側パターン
２２に、また積層誘電体フィルタ１０の四隅のうち２箇
所のＳ−ＧＮＤを浮きパターン２８に、更に２箇所のＯ
−ＧＮＤをアースパターンに、合計６箇所で半田付けす
る。このように面実装したときに得られる特性を図２の
Ｂに示す。中心周波数ｆ0 は１９０７ＭＨz であり、ｆ
0 −２４０ＭＨz での減衰量は、３４．５ｄＢであっ
た。A laminated dielectric filter 10 is formed on such a substrate.
Is placed. The input electrode of the laminated dielectric filter 10 is used as the input side pattern 20, the output side electrode is used as the output side pattern 22, and the S-GND at two locations among the four corners of the laminated dielectric filter 10 is used as the floating pattern 28. Part O
-Sold the GND to the ground pattern at a total of 6 points. The characteristics obtained by such surface mounting are shown in B of FIG. The center frequency f 0 is 1907 MHz, and f
The amount of attenuation at 0-240 MHz was 34.5 dB.
【００１８】図３は本発明の第３実施例を示している。
基板の実装面パターンは、前記実施例と同様、入力側パ
ターン２０と出力側パターン２２、及びその周辺にアー
スパターン２４が設けられ、裏面は全面アースとなって
いる。そして実装面のアースパターン２４と裏面の全面
アースとの間は多数のスルーホール部２６によって導通
している。この第３の実施例は、図３のＡに示すよう
に、上記第１実施例と第２実施例とを組み合わせたもの
に相当する。つまり積層誘電体フィルタ１０を基板の実
装面上に載置したときに、該積層誘電体フィルタによっ
て隠れる実装面のアースパターン部分（一点鎖線で囲ま
れている領域）に、裏面の全面アースと導通するスルー
ホール部が設けられていないような入出力端の静電容量
結合を調整する技術と、誘電体フィルタの四隅のうち短
絡端側の二隅に対応する基板実装面部分に島状の浮きパ
ターン２８を設け、積層誘電体フィルタの短絡端側の二
隅近傍Ｓ−ＧＮＤを浮きパターン２８に半田付けし、開
放端側の二隅近傍Ｏ−ＧＮＤをアースパターン２４に半
田付けする基板のアースパターン調整例を組み合わせた
ものである。FIG. 3 shows a third embodiment of the present invention.
The mounting surface pattern of the substrate is provided with an input side pattern 20, an output side pattern 22 and a ground pattern 24 around the same, as in the above-described embodiment, and the back surface is entirely grounded. The ground pattern 24 on the mounting surface and the entire ground on the back surface are electrically connected by a large number of through holes 26. The third embodiment corresponds to a combination of the first embodiment and the second embodiment as shown in A of FIG. That is, when the laminated dielectric filter 10 is placed on the mounting surface of the substrate, the entire surface of the back surface is electrically connected to the ground pattern portion (the area surrounded by the one-dot chain line) of the mounting surface which is hidden by the laminated dielectric filter. The technology to adjust the capacitive coupling at the input and output ends, which does not have through-holes, and the island-shaped floats on the board mounting surface corresponding to the two corners of the dielectric filter on the short-circuit end side. A pattern 28 is provided, S-GND near the two corners on the short-circuited end side of the laminated dielectric filter is soldered to the floating pattern 28, and O-GND near the two corners on the open end side is soldered to the ground pattern 24. This is a combination of pattern adjustment examples.
【００１９】このような基板に積層誘電体フィルタ１０
を載置する。そして積層誘電体フィルタ１０の入力電極
を入力側パターン２０に、出力側電極を出力側パターン
２２に、積層誘電体フィルタ１０の四隅近傍のうち２箇
所のＳ−ＧＮＤを浮きパターン２８に、更に２箇所のＯ
−ＧＮＤをアースパターン２４に、合計６箇所で半田付
けする。このように面実装したときに得られる特性を図
３のＢに示す。中心周波数ｆ0 は１９０７ＭＨz であ
り、ｆ0 −２４０ＭＨz での減衰量は、３８．２ｄＢと
いう極めて良好な値が得られる。A laminated dielectric filter 10 is formed on such a substrate.
Is placed. The input electrode of the laminated dielectric filter 10 is used as the input side pattern 20, the output side electrode is used as the output side pattern 22, and the S-GND at two locations in the vicinity of the four corners of the laminated dielectric filter 10 is used as the floating pattern 28 and further 2 Part O
Solder the GND to the ground pattern 24 at a total of 6 places. The characteristics obtained by such surface mounting are shown in B of FIG. The center frequency f 0 is 1907 MHz, and the attenuation amount at f 0 -240 MHz is 38.2 dB, which is a very good value.
【００２０】図４は本発明の第４の実施例を示してお
り、基板のアースパターンによる調整例である。基板の
実装面パターンは、前記実施例と同様、入力側パターン
２０と出力側パターン２２、及びその周辺にアースパタ
ーン２４が設けられ、裏面は全面アースとなっている。
そして、実装面のアースパターン２４と裏面の全面アー
スとの間は多数のスルーホール部２６によって導通して
いる。この第４の実施例において、基板の実装面パター
ンは図４のＡに示すような形状である。つまり、積層誘
電体フィルタ１０を基板の実装面上に載置したときに、
該積層誘電体フィルタの四隅のうち開放端側の二隅Ｏ−
ＧＮＤに対応する基板実装面部分に周囲のアースパター
ン２４と導通しない島状の浮きパターン２８を設ける。
これは短絡端側を浮きパターンに接続する第２の実施例
（図２）と丁度逆の関係である。FIG. 4 shows a fourth embodiment of the present invention, which is an example of adjustment by the ground pattern of the substrate. The mounting surface pattern of the substrate is provided with an input side pattern 20, an output side pattern 22 and a ground pattern 24 around the same, as in the above-described embodiment, and the back surface is entirely grounded.
The ground pattern 24 on the mounting surface and the entire ground on the back surface are electrically connected by a number of through holes 26. In the fourth embodiment, the mounting surface pattern of the substrate has a shape as shown in A of FIG. That is, when the laminated dielectric filter 10 is placed on the mounting surface of the substrate,
Of the four corners of the laminated dielectric filter, two corners on the open end side O-
An island-shaped floating pattern 28 that is not electrically connected to the surrounding earth pattern 24 is provided on the board mounting surface portion corresponding to GND.
This is just the opposite relationship to the second embodiment (FIG. 2) in which the short-circuited end side is connected to the floating pattern.
【００２１】このような基板に積層誘電体フィルタ１０
を載置する。そして積層誘電体フィルタ１０の入力電極
を入力側パターン２０に、出力側電極を出力側パターン
２２に、また積層誘電体フィルタ１０の四隅のうち２箇
所のＯ−ＧＮＤを浮きパターン２８に、更に２箇所のＳ
−ＧＮＤをアースパターンに、合計６箇所で半田付けす
る。このように面実装したときに得られる特性を図４の
Ｂに示す。中心周波数ｆ0 は１９０７ＭＨz であり、ｆ
0 −２４０ＭＨz での減衰量は、３４．４ｄＢであっ
た。A laminated dielectric filter 10 is formed on such a substrate.
Is placed. The input electrode of the laminated dielectric filter 10 is used as the input side pattern 20, the output side electrode is used as the output side pattern 22, and two O-GND of the four corners of the laminated dielectric filter 10 are used as the floating pattern 28. S of the place
-Sold the GND to the ground pattern at a total of 6 points. The characteristics obtained by such surface mounting are shown in FIG. 4B. The center frequency f 0 is 1907 MHz, and f
The amount of attenuation at 0-240 MHz was 34.4 dB.
【００２２】図５は本発明の第５実施例を示している。
基板の実装面パターンは、前記実施例と同様、入力側パ
ターン２０と出力側パターン２２、及びその周辺にアー
スパターン２４が設けられ、裏面は全面アースとなって
いる。そして実装面のアースパターン２４と裏面の全面
アースとの間は多数のスルーホール部２６によって導通
している。この第５の実施例は、図５のＡに示すよう
に、上記第１実施例と第４実施例とを組み合わせたもの
に相当する。つまり積層誘電体フィルタ１０を基板の実
装面上に載置したときに、該積層誘電体フィルタによっ
て隠れる実装面のアースパターン部分（一点鎖線で囲ま
れている領域）に、裏面の全面アースと導通するスルー
ホール部が設けられていないような入出力端の静電容量
結合を調整する技術と、誘電体フィルタの四隅のうち開
放端側の二隅に対応する基板実装面部分に島状の浮きパ
ターン２８を設け、積層誘電体フィルタの開放端側の二
隅近傍Ｏ−ＧＮＤを浮きパターン２８に半田付けし、短
絡端側の二隅近傍Ｓ−ＧＮＤをアースパターン２４に半
田付けする基板のアースパターン調整例を組み合わせた
ものである。FIG. 5 shows a fifth embodiment of the present invention.
The mounting surface pattern of the substrate is provided with an input side pattern 20, an output side pattern 22 and a ground pattern 24 around the same, as in the above-described embodiment, and the back surface is entirely grounded. The ground pattern 24 on the mounting surface and the entire ground on the back surface are electrically connected by a large number of through holes 26. The fifth embodiment corresponds to a combination of the first embodiment and the fourth embodiment as shown in A of FIG. That is, when the laminated dielectric filter 10 is placed on the mounting surface of the substrate, the entire surface of the back surface is electrically connected to the ground pattern portion (the area surrounded by the one-dot chain line) of the mounting surface which is hidden by the laminated dielectric filter. The technology to adjust the capacitive coupling at the input and output ends, which does not have through-holes, and the island-shaped float on the board mounting surface corresponding to the two open-side corners of the four corners of the dielectric filter. A pattern 28 is provided, and O-GND near the two corners on the open end side of the laminated dielectric filter is soldered to the floating pattern 28, and S-GND near the two corners on the short-circuit end side is soldered to the ground pattern 24. This is a combination of pattern adjustment examples.
【００２３】このような基板に積層誘電体フィルタ１０
を載置する。そして積層誘電体フィルタ１０の入力電極
を入力側パターン２０に、出力側電極を出力側パターン
２２に、積層誘電体フィルタ１０の四隅近傍のうち２箇
所のＯ−ＧＮＤを浮きパターン２８に、更に２箇所のＳ
−ＧＮＤをアースパターン２４に、合計６箇所で半田付
けする。このように面実装したときに得られる特性を図
５のＢに示す。中心周波数ｆ0 は１９０７ＭＨz であ
り、ｆ0 −２４０ＭＨz での減衰量は、３８．１ｄＢと
いう極めて良好な値が得られる。A laminated dielectric filter 10 is formed on such a substrate.
Is placed. The input electrode of the laminated dielectric filter 10 is used as the input side pattern 20, the output side electrode is used as the output side pattern 22, two O-GNDs in the vicinity of the four corners of the laminated dielectric filter 10 are used as the floating pattern 28, and two more. S of the place
Solder the GND to the ground pattern 24 at a total of 6 places. The characteristics obtained by such surface mounting are shown in B of FIG. The center frequency f 0 is 1907 MHz, and the attenuation amount at f 0 -240 MHz is 38.1 dB, which is a very good value.
【００２４】以上の結果をまとめると、表１のようにな
る。本発明は従来技術に比べて、４〜８ｄＢもの大幅な
特性の改善が見られる。また各特性線図を対比すると、
本発明では通過域の両側に形成されている減衰極が通過
域に接近し、それによって減衰カーブが急峻となり減衰
特性が向上しているのが判る。また、短絡端側の二隅を
浮かせる場合（第２及び第３の実施例）と開放端側の二
隅を浮かせる場合（第４及び第５の実施例）で、ほぼ同
等の特性を呈することも判る。The above results are summarized in Table 1. The present invention shows a significant improvement in characteristics of 4 to 8 dB as compared with the prior art. Also, comparing each characteristic diagram,
In the present invention, it can be seen that the attenuation poles formed on both sides of the pass band approach the pass band, which makes the attenuation curve steep and improves the attenuation characteristics. In addition, the two corners on the short-circuited end side should be floated (second and third embodiments) and the two corners on the open end side should be floated (fourth and fifth embodiments), and should have almost the same characteristics. I also understand.
【００２５】[0025]
【表１】 [Table 1]
【００２６】上記の各実施例は２段のインターデジタル
型フィルタを用いた場合であるが、本発明はそれ以外の
タイプの積層誘電体フィルタにも適応できることは言う
までもない。なお本発明で使用する積層誘電体フィルタ
は、その一辺が１０mm以下のチップ形状をしたものであ
る。Although each of the above-described embodiments uses a two-stage interdigital filter, it goes without saying that the present invention can be applied to other types of laminated dielectric filters. The laminated dielectric filter used in the present invention has a chip shape whose one side is 10 mm or less.
【００２７】[0027]
【発明の効果】本発明は上記のように、実装基板の積層
誘電体フィルタを載置したときに隠れるアースパターン
部分の入出力間に、裏面の全面アースとの導通部を設け
ない構造としたことにより、入出力端の静電容量結合が
調整され、通過特性に現れる減衰極が通過域に近づくこ
とで減衰特性が改善される。また積層誘電体フィルタの
四隅のうち短絡端（又は開放端）側の二隅に対応する部
分に島状の浮きパターンを設け、誘電体フィルタの開放
端（又は短絡端）側の二隅近傍のみでアースパターンに
半田付けし、短絡端（又は開放端）側の二隅近傍を浮か
せる構成としたことにより、上記と同様の作用が得ら
れ、通過特性に現れる減衰極が通過域に近づいて減衰特
性が改善される。更に、両者の組み合わせで、減衰特性
は更に良好となる。これらのことにより本発明では、積
層誘電体フィルタ単体では得られない良好な特性を、実
装基板との組み合わせによって発現させることができ
る。As described above, the present invention has a structure in which a conducting portion to the whole ground on the back surface is not provided between the input and output of the ground pattern portion which is hidden when the laminated dielectric filter of the mounting substrate is mounted. As a result, the capacitive coupling at the input and output ends is adjusted, and the attenuation pole appearing in the pass characteristic approaches the pass band, so that the attenuation characteristic is improved. In addition, an island-shaped floating pattern is provided in the four corners of the laminated dielectric filter corresponding to the two corners on the short-circuited (or open end) side, and only near the two corners on the open-end (or short-circuited) side of the dielectric filter. By soldering to the ground pattern with, and floating around the two corners on the short-circuited end (or open end) side, the same action as above can be obtained, and the attenuation pole appearing in the pass characteristic is attenuated as it approaches the passband. The characteristics are improved. Furthermore, the combination of the two makes the attenuation characteristics even better. As a result, in the present invention, good characteristics that cannot be obtained by the laminated dielectric filter alone can be exhibited by combining with the mounting substrate.
【図１】本発明の一実施例を示す基板の実装面パターン
とそれに面実装した積層誘電体フィルタの特性例を示す
説明図。FIG. 1 is an explanatory view showing a mounting surface pattern of a substrate showing an embodiment of the present invention and a characteristic example of a laminated dielectric filter surface-mounted on the mounting surface pattern.
【図２】本発明に係る基板の実装面パターンの他の例と
それに面実装した積層誘電体フィルタの特性例を示す説
明図。FIG. 2 is an explanatory view showing another example of a mounting surface pattern of a substrate according to the present invention and a characteristic example of a laminated dielectric filter surface-mounted on it.
【図３】本発明に係る基板の実装面パターンの他の例と
それに面実装した積層誘電体フィルタの特性例を示す説
明図。FIG. 3 is an explanatory view showing another example of the mounting surface pattern of the substrate according to the present invention and an example of characteristics of the laminated dielectric filter surface-mounted on the mounting surface pattern.
【図４】本発明に係る基板の実装面パターンの他の例と
それに面実装した積層誘電体フィルタの特性例を示す説
明図。FIG. 4 is an explanatory view showing another example of the mounting surface pattern of the substrate according to the present invention and a characteristic example of the laminated dielectric filter surface-mounted on the mounting surface pattern.
【図５】本発明に係る基板の実装面パターンの更に他の
例とそれに面実装した積層誘電体フィルタの特性例を示
す説明図。FIG. 5 is an explanatory view showing still another example of the mounting surface pattern of the substrate according to the present invention and a characteristic example of the laminated dielectric filter surface-mounted thereon.
【図６】従来の基板の実装面パターンとそれに面実装し
た積層誘電体フィルタの特性例を示す説明図。FIG. 6 is an explanatory diagram showing a characteristic example of a conventional mounting surface pattern of a substrate and a laminated dielectric filter surface-mounted on the mounting surface pattern.
【図７】実施例で用いた積層誘電体フィルタの説明図。FIG. 7 is an explanatory diagram of a laminated dielectric filter used in the examples.
【図８】その積層誘電体フィルタの底面の説明図。FIG. 8 is an explanatory diagram of a bottom surface of the laminated dielectric filter.
１０ 積層誘電体フィルタ １２ 誘電体チップ １４ 共振器内導体 １６ 外部アース導体 １８ 入出力電極 ２０ 入力側パターン ２２ 出力側パターン ２４ アースパターン ２６ スルーホール部 ２８ 浮きパターン 10 Multilayer Dielectric Filter 12 Dielectric Chip 14 Resonator Inner Conductor 16 External Earth Conductor 18 Input / Output Electrode 20 Input Side Pattern 22 Output Side Pattern 24 Earth Pattern 26 Through Hole 28 Floating Pattern
Claims (7)
る構造であって、積層誘電体フィルタは、トリプレート
形共振回路を有する一体焼結構造のチップ部品であり、
両側に底面から側面へと延びるＬ形の入出力電極が設け
られ、それ以外の外表面の大部分が外部アース導体で覆
われており、基板は、実装面に入出力パターンが形成さ
れると共に、その周辺にアースパターンが設けられ、裏
面は全面アースとなっていて、実装面のアースパターン
と裏面の全面アースとの間が多数の導通部で接続されて
いる構造をなし、積層誘電体フィルタを基板の実装面上
に載置し、入出力電極を入出力パターンに、外部アース
導体をアースパターンに半田付けすることで面実装する
構造において、 積層誘電体フィルタを基板の実装面上に載置したとき
に、該積層誘電体フィルタによって隠れない周辺のアー
スパターンには、裏面の全面アースとの導通部が設けら
れているが、該積層誘電体フィルタによって隠れるアー
スパターン部分の入力側と出力側との間には、裏面の全
面アースとの導通部が設けられていないことを特徴とす
る積層誘電体フィルタの面実装構造。1. A structure in which a laminated dielectric filter is surface-mounted on a substrate, wherein the laminated dielectric filter is a chip component having an integral sintered structure having a triplate resonance circuit,
L-shaped input / output electrodes extending from the bottom surface to the side surfaces are provided on both sides, and most of the other outer surface is covered with an external ground conductor, and the board has an input / output pattern formed on the mounting surface. , A ground pattern is provided around it, the back surface is grounded all over, and the ground pattern on the mounting surface and the ground surface on the back surface are connected by a large number of conducting parts. Is mounted on the mounting surface of the board, and the surface mounting is performed by soldering the input / output electrodes to the input / output pattern and the external ground conductor to the ground pattern.In this structure, the laminated dielectric filter is mounted on the mounting surface of the board. The surrounding ground pattern, which is not hidden by the laminated dielectric filter when it is placed, is provided with a conductive portion to the entire ground on the back surface, but the ground pattern hidden by the laminated dielectric filter is provided. A surface mounting structure for a laminated dielectric filter, characterized in that a conducting portion for conducting the entire ground on the back surface is not provided between the input side and the output side of the turn portion.
る構造であって、積層誘電体フィルタは、トリプレート
形共振回路を有する一体焼結構造のチップ部品であり、
両側に底面から側面へと延びるＬ形の入出力電極が設け
られ、それ以外の外表面の大部分が外部アース導体で覆
われており、基板は、実装面に入出力パターンが形成さ
れると共に、その周辺にアースパターンが設けられ、裏
面は全面アースとなっていて、実装面のアースパターン
と裏面の全面アースとの間が多数の導通部で接続されて
いる構造をなし、積層誘電体フィルタを基板の実装面上
に載置し、入出力電極を入出力パターンに、外部アース
導体をアースパターンに半田付けすることで面実装する
構造において、 積層誘電体フィルタを基板の実装面上に載置したとき
に、該積層誘電体フィルタの四隅のうち共振器短絡端側
の二隅に対応する基板実装面部分に周囲のアースパター
ンと導通しない島状の浮きパターンを設け、積層誘電体
フィルタの共振器短絡端側の二隅近傍を浮きパターンに
半田付けし、共振器開放端側の二隅近傍をアースパター
ンに半田付けすることを特徴とする積層誘電体フィルタ
の面実装構造。2. A structure in which a laminated dielectric filter is surface-mounted on a substrate, wherein the laminated dielectric filter is a chip component having an integral sintered structure having a tri-plate type resonance circuit,
L-shaped input / output electrodes extending from the bottom surface to the side surfaces are provided on both sides, and most of the other outer surface is covered with an external ground conductor, and the board has an input / output pattern formed on the mounting surface. , A ground pattern is provided around it, the back surface is grounded all over, and the ground pattern on the mounting surface and the ground surface on the back surface are connected by a large number of conducting parts. Is mounted on the mounting surface of the board, and the surface mounting is performed by soldering the input / output electrodes to the input / output pattern and the external ground conductor to the ground pattern.In this structure, the laminated dielectric filter is mounted on the mounting surface of the board. When placed, an island-shaped floating pattern that does not conduct to the surrounding earth pattern is provided on the board mounting surface portion corresponding to the two corners on the resonator short-circuit end side of the four corners of the laminated dielectric filter. A surface mounting structure for a laminated dielectric filter, characterized in that the two corners of the resonator on the resonator short-circuit end side are soldered to a floating pattern, and the two corners of the resonator open end on the ground pattern are soldered.
載置したときに、該積層誘電体フィルタの四隅のうち共
振器短絡端側の二隅に対応する基板実装面部分に周囲の
アースパターンと導通しない島状の浮きパターンを設
け、積層誘電体フィルタの共振器短絡端側の二隅近傍を
浮きパターンに半田付けし、共振器開放端側の二隅近傍
をアースパターンに半田付けする請求項１記載の積層誘
電体フィルタの面実装構造。3. When the laminated dielectric filter is placed on a mounting surface of a substrate, a surrounding earth is attached to a portion of the laminated surface of the laminated dielectric filter corresponding to two corners on the resonator short-circuit end side among four corners of the laminated dielectric filter. Provide an island-shaped floating pattern that does not connect to the pattern, solder the two corners of the laminated dielectric filter near the resonator short-circuit end to the floating pattern, and solder the two corners near the resonator open end to the ground pattern. The surface mounting structure of the laminated dielectric filter according to claim 1.
る構造であって、積層誘電体フィルタは、トリプレート
形共振回路を有する一体焼結構造のチップ部品であり、
両側に底面から側面へと延びるＬ形の入出力電極が設け
られ、それ以外の外表面の大部分が外部アース導体で覆
われており、基板は、実装面に入出力パターンが形成さ
れると共に、その周辺にアースパターンが設けられ、裏
面は全面アースとなっていて、実装面のアースパターン
と裏面の全面アースとの間が多数の導通部で接続されて
いる構造をなし、積層誘電体フィルタを基板の実装面上
に載置し、入出力電極を入出力パターンに、外部アース
導体をアースパターンに半田付けすることで面実装する
構造において、 積層誘電体フィルタを基板の実装面上に載置したとき
に、該積層誘電体フィルタの四隅のうち共振器短開放側
の二隅に対応する基板実装面部分に周囲のアースパター
ンと導通しない島状の浮きパターンを設け、積層誘電体
フィルタの共振器開放端側の二隅近傍を浮きパターンに
半田付けし、共振器短絡端側の二隅近傍をアースパター
ンに半田付けすることを特徴とする積層誘電体フィルタ
の面実装構造。4. A structure in which a laminated dielectric filter is surface-mounted on a substrate, wherein the laminated dielectric filter is a chip component having an integral sintered structure having a triplate resonance circuit,
L-shaped input / output electrodes extending from the bottom surface to the side surfaces are provided on both sides, and most of the other outer surface is covered with an external ground conductor, and the board has an input / output pattern formed on the mounting surface. , A ground pattern is provided around it, the back surface is grounded all over, and the ground pattern on the mounting surface and the ground surface on the back surface are connected by a large number of conducting parts. Is mounted on the mounting surface of the board, and the surface mounting is performed by soldering the input / output electrodes to the input / output pattern and the external ground conductor to the ground pattern.In this structure, the laminated dielectric filter is mounted on the mounting surface of the board. When placed, an island-shaped floating pattern that does not conduct to the surrounding earth pattern is provided on the board mounting surface portion corresponding to the two corners of the short-side resonator opening of the four corners of the multilayer dielectric filter. A surface mounting structure for a laminated dielectric filter, characterized in that two corners of the resonator on the resonator open end side are soldered to a floating pattern, and two corners of the resonator short-circuited end side are soldered to an earth pattern.
載置したときに、該積層誘電体フィルタの四隅のうち共
振器開放端側の二隅に対応する基板実装面部分に周囲の
アースパターンと導通しない島状の浮きパターンを設
け、積層誘電体フィルタの共振器開放端側の二隅近傍を
浮きパターンに半田付けし、共振器短絡端側の二隅近傍
をアースパターンに半田付けする請求項１記載の積層誘
電体フィルタの面実装構造。5. When the laminated dielectric filter is placed on a mounting surface of a substrate, a surrounding earth is attached to a portion of the mounting surface of the substrate corresponding to two corners of the laminated dielectric filter on the resonator open end side. Provide an island-shaped floating pattern that does not connect to the pattern, solder the two corners near the resonator open end of the multilayer dielectric filter to the floating pattern, and solder the two corners near the resonator short-circuit end to the ground pattern. The surface mounting structure of the laminated dielectric filter according to claim 1.
する請求項１乃至５記載の積層誘電体フィルタの面実装
構造。6. The surface mounting structure for a laminated dielectric filter according to claim 1, wherein a glass epoxy substrate is used as the substrate.
された多数の誘電体シートが焼結一体化された誘電体チ
ップと、該誘電体チップの内部に配置した一端開放で他
端短絡の２個の共振器内導体と、該誘電体チップの外表
面に設けた共振器外導体となる外部アース導体と、両共
振器内導体と結合するように両側に設けた入出力電極を
有し、短絡端と開放端が交互に位置する構造の２段イン
ターデジタル型フィルタを使用する請求項１乃至６記載
の積層誘電体フィルタの面実装構造。7. A laminated dielectric filter comprising a dielectric chip in which a large number of laminated and joined dielectric sheets are sintered and integrated, and one end open and the other end short-circuited arranged inside the dielectric chip. A plurality of resonator internal conductors, an external ground conductor serving as a resonator external conductor provided on the outer surface of the dielectric chip, and input / output electrodes provided on both sides so as to be coupled to both resonator internal conductors, 7. The surface mounting structure for a laminated dielectric filter according to claim 1, wherein a two-stage interdigital filter having a structure in which short-circuited ends and open ends are alternately arranged is used.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30052595A JPH09121102A (en) | 1995-10-25 | 1995-10-25 | Surface mount structure for layered dielectric filter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30052595A JPH09121102A (en) | 1995-10-25 | 1995-10-25 | Surface mount structure for layered dielectric filter |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH09121102A true JPH09121102A (en) | 1997-05-06 |
Family
ID=17885876
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP30052595A Pending JPH09121102A (en) | 1995-10-25 | 1995-10-25 | Surface mount structure for layered dielectric filter |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH09121102A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004247980A (en) * | 2003-02-14 | 2004-09-02 | Hitachi Ltd | Connection structure and method of transmission line |
| EP1484948A1 (en) * | 2002-01-24 | 2004-12-08 | Mitsubishi Materials Corporation | Printed-circuit board, electronic part having shield structure, and radio communication apparatus |
-
1995
- 1995-10-25 JP JP30052595A patent/JPH09121102A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1484948A1 (en) * | 2002-01-24 | 2004-12-08 | Mitsubishi Materials Corporation | Printed-circuit board, electronic part having shield structure, and radio communication apparatus |
| EP1484948A4 (en) * | 2002-01-24 | 2009-03-18 | Mitsubishi Materials Corp | Printed-circuit board, electronic part having shield structure, and radio communication apparatus |
| JP2004247980A (en) * | 2003-02-14 | 2004-09-02 | Hitachi Ltd | Connection structure and method of transmission line |
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