JPH09180956A - Multilayer ceramic capacitor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a multilayered ceramic capacitor which is small in size, low in weight and cost, high in reliability, large in capacitance, and high in breakdown voltage (high rated-voltage type). SOLUTION: An intermediate layer 11 which relaxes stress induced in a dielectric body due to the reverse piezoelectric effect is provided between layers 10 which make up a capacitance in a multilayered ceramic capacitor, whereby the multilayered ceramic capacitor high in breakdown voltage can be obtained even if it is increased in the number of layers. The intermediate layer 11 is an insulating layer formed of the same material with dielectric body used in a capacitor forming part and serves to relax the expansion of dielectric body due to the reverse piezoelectric effect so as to restrain cracking from occurring.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a laminated ceramic capacitor having a laminated structure having a large capacity and a high withstand voltage.

[0002]

2. Description of the Related Art In a multilayer ceramic capacitor, a large capacity can be obtained by stacking dielectric layers forming a capacity, so that it is possible to provide a small-sized and low-cost capacitor, which generally has a large capacity. Used in ceramic capacitors.

Further, the dielectrics constituting the ceramic capacitors are roughly classified into two types according to their properties. One is a low-dielectric constant dielectric containing titanium oxide or the like as a main component, which is used for temperature compensation, and the other is a high-dielectric dielectric dielectric containing barium titanate or the like as a main component.

The low dielectric constant type dielectric material has a dielectric constant of 50 to 20.
Although it is as low as about 0, it has a feature that the temperature dependence of the capacitance is extremely small. Here, the low dielectric constant is
It is considered that since the crystal structure of these dielectrics is tetragonal, it is difficult to form a dipole that has a small anisotropy and affects the dielectric constant. On the other hand, a high dielectric constant type dielectric has a dielectric constant of 2
It is extremely high at about 000 to 20,000, but this is because the crystal structure has a large strain to facilitate the formation of dipoles, and when a large-capacity multilayer ceramic capacitor is manufactured, it is used as a dielectric. The use of these high dielectric constant materials is an essential condition.

Further, a high rated voltage (rated voltage AC100
(V) or more, DC500 (V) or more) type monolithic ceramic capacitors
As disclosed in Japanese Patent Laid-Open Publication No. 2004-242242, there is a structure in which an internal electrode is divided into a large number of pieces on the same surface and the electrode pieces are superposed so as to form an electrically equivalent series circuit.

However, when a high dielectric constant type dielectric is used as the dielectric of these multilayer ceramic capacitors, a piezoelectric phenomenon or an inverse piezoelectric phenomenon, so-called electrostriction phenomenon (here, the piezoelectric phenomenon is mechanical When the number of layers is increased to increase the capacity, cracks occur before the breakdown voltage is reached. (Mechanical destruction) occurs. Therefore, there arises a problem that breakdown voltage and withstand voltage decrease.

In order to overcome the drawbacks of the above problems, Japanese Patent Laid-Open Nos. 4-188810 and 4-188 are known.
As shown in Japanese Patent No. 811, a multilayer ceramic capacitor in which a plurality of capacitors having a small number of layers are stacked is compatible with a large capacity and a high rated voltage.

[0008]

However, it is very difficult to reduce the size, the weight, and the cost of the above-mentioned multilayer ceramic capacitor because the number of manufacturing steps and the number of parts are increased.

Therefore, an object of the present invention is to have a large capacity, a high breakdown voltage, and a high withstand voltage that are small in size, light in weight, low in cost, and capable of preventing the generation of cracks due to mechanical stress caused by the reverse piezoelectric phenomenon. It is intended to provide a (high rated voltage type) multilayer ceramic capacitor. Other objects and effects of the present invention will be clarified by the following detailed description.

[0010]

According to the present invention, by forming an intermediate layer between layers for forming a capacitor, a laminate having high breakdown voltage and high withstand voltage characteristics even when the number of laminated layers is increased. -Type ceramic capacitor can be provided. TECHNICAL FIELD The present invention relates to a multilayer ceramic capacitor having an intermediate layer between layers forming a capacitance that relieves stress of a dielectric substance caused by an inverse piezoelectric phenomenon. The present invention
Further, the following preferred embodiments are included. (1) In the multilayer ceramic capacitor according to the present invention, the layer forming the capacitance includes seven or more internal electrode layers. The internal electrode layer includes a first electrode layer and a second electrode layer, the first electrode layer has two or more electrodes, and the second electrode layer is the first electrode layer. Has one or more electrodes facing each other. The first electrode layer and the second electrode layer form two or more capacitive components connected in series. (2) In the multilayer ceramic capacitor of the present invention and the embodiment (1), the intermediate layer has a thickness of 75 μm to 900 μm.
It has a thickness of m. (3) In the multilayer ceramic capacitor of the present invention and Examples (1) and (2) above, the intermediate layer has a plurality of internal electrodes having a structure that does not form a capacitance.

Here, the intermediate layer is an insulating layer whose purpose is to alleviate the expansion of the dielectric due to the reverse piezoelectric phenomenon and to suppress the occurrence of cracks. Further, it is preferable that the material is made of the same material as the dielectric used in the capacitance forming portion, and the internal electrodes in contact with the layer are arranged so as not to form a capacitance. Even if the internal electrodes are arranged to form a capacitance, the expansion due to the reverse piezoelectric phenomenon is hardly observed, such as the small overlapping area and the sufficiently large inter-electrode thickness.

The layers forming the capacitance have seven or more internal electrode layers, that is, six or more dielectric layers, two or more electrodes are formed on the first electrode layer, and two or more electrodes are formed on the second electrode layer. May have one or more electrodes commonly facing the first electrode layer, and two or more capacitive components connected in series may be formed by the first and second electrode layers. preferable. With such an electrode arrangement, the breakdown voltage and the withstand voltage are increased. In the case of the conventional multilayer ceramic capacitor having no intermediate layer, when the number of internal electrode layers is 7 or more, the breakdown voltage is considerably lowered due to the reverse piezoelectric phenomenon of the dielectric. According to the present invention, it is possible to effectively eliminate the above-mentioned problems associated with the conventional multilayer ceramic capacitor having seven or more internal electrode layers.

The thickness of the intermediate layer is 75 μm to 900 μm.
m is preferable. Here, the thickness is 75 μm
If it does not satisfy the above condition, the stress concentration due to the inverse piezoelectric expansion of the capacitance forming layer becomes difficult to be alleviated. On the other hand, if it exceeds 900 μm, the thickness of the laminate increases, which is against the desired size reduction.

Further, an internal electrode having a structure that does not form a capacitance component may be provided on the same surface in the intermediate layer. this is,
This is because the electrostriction phenomenon occurs in the layer that forms the capacitance, that is, where the electric field is applied, and thus the electrostriction phenomenon is not affected even if an electrode having a structure that does not form the capacitance component is provided.

As shown in FIG. 1, in the multilayer ceramic capacitor using the high dielectric constant type dielectric layer 1, each capacitance forming layer 4 expands vertically when a voltage is applied. This is because, as described above, expansion occurs due to the reverse piezoelectric phenomenon, and the greater the applied voltage, the greater the degree. Further, since no voltage is applied to the margin portions 5 and 6 (portions without the internal electrodes 2), they do not expand. From these facts, the above-mentioned multilayer ceramic capacitor used at a high applied voltage in order to cope with a high rated voltage is likely to cause cracks in the dielectric and easily cause insulation deterioration. Further, when the number of stacked layers is increased in order to increase the capacity, the tendency becomes remarkable. However, by disposing the intermediate layer, that is, the non-expanding layer between the expanding layers, the expansion of the dielectric can be relaxed and the stress with the margin portion can be dispersed. As a result, it is possible to provide a multilayer ceramic capacitor that supports multiple layers, that is, a large capacity and a high rated voltage.

[0016]

BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be described in more detail below by showing specific examples of the present invention.

1. Multilayer Ceramic Capacitor (Embodiment 1) As shown in FIG. 2, the multilayer ceramic capacitor of Embodiment 1 has 6 layers of dielectric layers 10 forming a capacitance, and 4 blocks are stacked, and between each block. , A layer 11 (which is an intermediate layer) made of the same material as the dielectric layer and having a thickness of 75 μm is provided, an insulating layer 7 is provided as the outermost layer, and an end electrode 9 that is electrically connected to the internal electrode 8 is provided. It has a different structure.

Here, the internal electrode of the layer forming the capacitor is
As described above, by dividing each of the capacitance forming portions on the same surface and arranging them in series, the structure is designed in consideration of the withstand voltage.

Further, the above capacitor was manufactured by the following procedure.

First, a ceramic dielectric sheet having a predetermined thickness is prepared by adding a required organic solvent and a resin to a ceramic dielectric powder containing barium titanate as a main component and making it into a slurry by a doctor blade method. did.
Next, a Pd electrode paste is printed on this sheet in a predetermined pattern by a screen printing method, the dielectric sheet and the dielectric sheet on which the electrodes are printed are laminated to have a predetermined thickness and the number of layers, and a predetermined size (5. 5 mm x 4.0 mm)
Cut into pieces. The degreasing process (40
0-700 ° C, 30 minutes), firing process (1200-130)
It was made into a sintered body through 0 ° C., 2 hours, in air). Further, silver was baked on the end faces, and tin and solder plating were applied to produce the intended multilayer ceramic capacitor.

(Embodiment 2) The embodiment 2 is a multilayer ceramic capacitor having the same structure as that of the embodiment 1 except that the intermediate layer has a thickness of 150 μm.

The above capacitor was manufactured by the same procedure as in Example 1.

(Third Embodiment) The third embodiment is a multilayer ceramic capacitor having the same structure as that of the first embodiment except that the intermediate layer has a thickness of 300 μm.

The above capacitor was manufactured by the same procedure as in Example 1.

(Embodiment 4) As shown in FIG.
In the monolithic ceramic capacitor of No. 2, two dielectric layers 10 forming a capacitance are formed as one block, and two blocks are stacked, an intermediate layer 11 of 300 μm is provided, and an insulating layer 7 is provided as the outermost layer. An end electrode 9 that is electrically connected to is provided, and the electrode structure thereof is the same as that of the first embodiment.

The above capacitor was manufactured by the same procedure as in Example 1.

(Embodiment 5) The embodiment 5 is a multilayer ceramic capacitor having the same structure as that of the embodiment 1 except that the intermediate layer has a thickness of 900 μm.

The above capacitor was manufactured by the same procedure as in Example 1.

(Embodiment 6) The embodiment 6 is a multilayer ceramic capacitor having the same structure as that of the embodiment 4 except that the number of dielectric layers forming the capacitance is eight.

The above capacitor was manufactured by the same procedure as in Example 1.

(Embodiment 7) In Embodiment 7, as shown in FIG. 4, the electrode layer 12 which does not form a capacitance in the intermediate layer is used.
A multilayer ceramic capacitor having the same structure as that of Example 6 except that the (dummy electrode) is provided.

The above capacitor was manufactured by the same procedure as in Example 1.

Comparative Example 1 In Comparative Example 1, as shown in FIG. 5, a dielectric layer 1 containing barium titanate as a main component was used.
3 and the internal electrode 14 of Pd are alternately laminated and formed,
The end electrodes 15 made of silver or the like are connected to the internal electrodes. Further, the internal electrode is divided, and the respective capacitance forming portions are arranged in series, so that the multilayer ceramic capacitor has a structure considering the withstand voltage.

Here, in the multilayer ceramic capacitor having the above electrode structure, the number of dielectric layers forming the capacitance is two.
There are four layers, and the thickness of one layer is 75 μm.

The above-mentioned capacitor was manufactured by the same procedure as in each example.

(Comparative Example 2) Comparative Example 2 is the same as Comparative Example 1 except that the number of dielectric layers forming the capacitor is 16.
It is a multilayer ceramic capacitor having the same structure as.

2. The measurement results of the breakdown voltage of Evaluation Examples 1, 2, 3, 4, 5 and Comparative Example 1 are shown in FIG.

Here, the breakdown voltage is measured by applying a voltage at a boosting rate of 1 kV / sec (AC 50 Hz) and applying a current of 1
The breakdown voltage was defined as the point at which it became 0 mA.

From this, it can be seen that the AC breakdown voltage levels of all the examples having the intermediate layer are higher than those of the comparative examples.

FIG. 7 shows the results of evaluating the DC withstand voltage levels of Examples 1, 2, 3, 4, 5 and Comparative Example 1.

Here, the withstand voltage was measured by applying a predetermined voltage (DC voltage) for 5 seconds, and letting the withstand voltage be defective when a current of 1 mA or more was applied.

Normally, a high rated voltage type capacitor is
Depending on the surge voltage and pulse voltage generated from the equipment, D
Withstand voltage of C6kV or higher is required. In Comparative Example 1, when a 6 kV DC withstanding voltage test is performed, 70% of defects occur, but in Example 1 having an intermediate layer, no defects occur even when the same 6 kV is applied. Furthermore, in Example 3 in which the thickness of the intermediate layer was quadrupled as compared with Example 1, 6.5 kV was obtained.
No defect occurs even when applied. Further, in Example 4 in which the number of intermediate layers is reduced as compared with Example 3, the DC withstand voltage level is lower than in Example 3, but the level is equivalent to that in Example 1. Further, the thickness of the intermediate layer is 3 in comparison with Example 4.
The DC withstanding voltage level is also improved in the fifth embodiment.

By providing the intermediate layer, the DC withstand voltage,
The following can be considered to be effective for the AC breakdown voltage.

The multilayer ceramic capacitor is manufactured by cofiring the dielectric and the internal electrode, but since the respective sintering behaviors are different, internal distortion and defects occur. It is known that this phenomenon becomes more prominent as the number of dielectric layers increases, that is, as the ratio of the internal electrodes to the dielectric increases. Since the multilayer ceramic capacitor according to the present invention has the intermediate layer, the ratio of the internal electrode to the dielectric is relatively small, and it can be considered that the DC withstand voltage and the AC breakdown voltage are increased.

Therefore, the alternating current is applied to Example 7 in which the internal electrode having no capacitance is provided in the intermediate layer and the ratio of the internal electrode is increased, and Example 6 and Comparative Example 2 in which the internal electrode is not provided in the intermediate layer. The result of measuring the breakdown voltage is shown in FIG.

From this, it can be seen that there is no difference in the value of the AC breakdown voltage depending on the presence or absence of the internal electrode, and the influence of the electrode ratio does not appear. However, in both cases, the AC breakdown voltage is improved as compared with Comparative Example 2.

From this result, the intermediate layer does not have the effect of alleviating the internal defects due to the difference in the sintering behavior of the dielectric and the internal electrode, but the effect of dispersing the stress due to the expansion due to the reverse piezoelectric phenomenon of the capacitance forming layer. It is thought that there is. When the capacitance forming layers are continuously formed in multiple layers, the individual strains are added to cause a large stress. However, by reducing the number of layers of the capacitance forming layers and distributing them, the stress applied to the margin is reduced. Therefore, it is considered that the occurrence of defects is suppressed.

From the above, the multilayer ceramic capacitor having the intermediate layer according to the present invention can have a capacitance which could not be realized due to the occurrence of a withstand voltage defect in the related art.

[0049]

As described in detail above, according to the present invention, a layer not forming a capacitance is provided as an intermediate layer between dielectric layer blocks forming a capacitance, thereby providing a large capacitance and a high withstand voltage. , Reliable, and
It is possible to provide a small-sized, lightweight, low-cost multilayer ceramic capacitor.

[Brief description of the drawings]

FIG. 1 is a conceptual diagram of a multilayer ceramic capacitor expanded by an inverse piezoelectric phenomenon.

FIG. 2 is a cross-sectional view of a multilayer ceramic capacitor according to the present invention having a plurality of layers that do not form a capacitance.

FIG. 3 is a cross-sectional view of a multilayer ceramic capacitor according to the present invention having one layer that does not form a capacitor.

FIG. 4 is a cross-sectional view of a multilayer ceramic capacitor according to the present invention, which has an electrode layer (dummy electrode) that does not form a capacitance in a layer that does not form a capacitance.

FIG. 5 is a cross-sectional view of a conventional large capacity, high withstand voltage multilayer ceramic capacitor.

FIG. 6 is a graph showing AC breakdown voltage levels of a comparative example and an example.

FIG. 7 is a graph showing DC withstand voltage levels of a comparative example and an example.

FIG. 8 is a graph showing AC breakdown voltage levels of a comparative example and an example.

[Explanation of symbols]

1,13 Dielectric layer 2,8,14 Internal electrode 3 Expanded part 4,10 Capacitance layer 5,6 Margin part 7 Insulating layer 9,15 End electrode 11 No capacitance layer (intermediate layer) 12 Capacitance Electrode layer (dummy electrode) that does not form

Claims (4)

[Claims] 1. A multilayer ceramic capacitor, a multilayer ceramic capacitor, characterized in that between the layers forming the capacitor, is provided an intermediate layer to relax the stress of the dielectric caused by the inverse piezoelectric phenomenon. 2. The number of internal electrode layers is seven or more, two or more electrodes are formed on the first electrode layer, and the second electrode layer is
One or more electrodes commonly facing the first electrode layer are formed, and two or more capacitive components connected in series are formed by the first and second electrode layers. The multilayer ceramic capacitor according to claim 1. 3. The multilayer ceramic capacitor according to claim 1, wherein the intermediate layer has a thickness of 75 μm to 900 μm. 4. The multilayer ceramic capacitor according to claim 1, further comprising an internal electrode having a structure that does not form a capacitance on the same surface in the intermediate layer.