JPH09166866A - Mark for aligning photomask and semiconductor device - Google Patents

Mark for aligning photomask and semiconductor device

Info

Publication number
JPH09166866A
JPH09166866A JP32931195A JP32931195A JPH09166866A JP H09166866 A JPH09166866 A JP H09166866A JP 32931195 A JP32931195 A JP 32931195A JP 32931195 A JP32931195 A JP 32931195A JP H09166866 A JPH09166866 A JP H09166866A
Authority
JP
Japan
Prior art keywords
alignment
alignment mark
caliper
calipers
photomask
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP32931195A
Other languages
Japanese (ja)
Other versions
JP2870461B2 (en
Inventor
Takami Hiruma
貴美 比留間
Norifumi Satou
記史 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP32931195A priority Critical patent/JP2870461B2/en
Priority to TW085115508A priority patent/TW410457B/en
Priority to US08/767,846 priority patent/US5721619A/en
Priority to KR1019960067276A priority patent/KR100242503B1/en
Publication of JPH09166866A publication Critical patent/JPH09166866A/en
Application granted granted Critical
Publication of JP2870461B2 publication Critical patent/JP2870461B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605Workpiece metrology
    • G03F7/70616Monitoring the printed patterns
    • G03F7/70633Overlay, i.e. relative alignment between patterns printed by separate exposures in different layers, or in the same layer in multiple exposures or stitching

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

PROBLEM TO BE SOLVED: To make it possible to rapidly measure misalignment in a θ direction together with misregistration in X- and Y directions with high accuracy by composing the marks of X- and Y vernier calipers for measuring the alignment in the X- and Y directions and θ vernier calipers for measuring the alignment in the B direction inclined with both of X, Y. SOLUTION: The respective marks are composed of the X vernier calipers 1 arranged in the X direction, the Y vernier calipers 2 arranged in the Y direction orthogonal therewith and the θ1 vernier calipers 3 arranged in the 61 direction inclined at a prescribed angle with both of the X direction and Y direction. The marks 1A to 3A to be aligned which constitute the respective vernier calipers 1 to 3 are formed of plural pieces of graduations of a large width. On the other hand, the aligning marks 1B to 3B are formed of the graduations of the small width of the same number as the number of the marks 1A to 3A to be aligned. The measurement of the misalignment in the X- and Y directions and in the θ1 direction by the respective vernier calipers 1 to 3 is made possible by observing these marks with an optical microscope.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は半導体装置の製造工
程の一つであるフォトリソグラフィ技術において用いら
れるフォトマスクの目合わせマーク技術に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a photomask alignment mark technique used in a photolithography technique, which is one of the manufacturing processes of semiconductor devices.

【0002】[0002]

【従来の技術】半導体装置の製造工程においては、ウェ
ハ上への配線層、コンタクトホール、イオン注入領域
等、様々な個別要素の形成をそれぞれマスク、フォトレ
ジスト、及び縮小投影露光装置を用いたフォトマスク工
程によって行っている。このような製造工程では、先に
形成されたパターンと、後に形成されるパターンとの位
置合わせを高精度に行う必要があり、そのために先のパ
ターン形成と同時に目合わせマークをウェハに形成して
おき(被目合わせマーク)、後のパターン形成時には、
先に形成されている被目合わせマークを検出し、この被
目合わせマークに対して次に形成されるパターンのマー
ク(目合わせマーク)を利用した目合わせを行ってウェ
ハに対する位置ずれを補正しながら露光を行っている。
2. Description of the Related Art In the process of manufacturing a semiconductor device, various individual elements such as a wiring layer, a contact hole, and an ion implantation region are formed on a wafer by using a mask, a photoresist, and a photolithography apparatus using a reduction projection exposure apparatus. The mask process is used. In such a manufacturing process, it is necessary to accurately align the pattern previously formed with the pattern to be formed later. Therefore, the alignment mark is formed on the wafer at the same time when the pattern is formed earlier. Every time (alignment mark), when forming the pattern later,
The previously formed alignment mark is detected, and alignment using the mark (alignment mark) of the pattern to be formed next is performed for this alignment mark to correct the misalignment with respect to the wafer. While doing the exposure.

【0003】しかしながら、このように形成されるパタ
ーンといえども、繰り返し行われるショット投影露光で
は、ある確率で十分に位置合わせされていないものが発
生してしまう。これのずれの程度が許容範囲を超えたも
のであれば、完成される半導体チップは、例えば配線層
とコンタクトホールとの電気的ショートにより不良品と
なってしまう。そのため、現像後には目合わせずれの検
査を行い、その結果許容できない程度のずれが検出され
たウェハは、フォトレジストを除去し、再びフォトマス
ク工程を行うか、あるいは抜き取り排気を行う必要があ
る。
However, even with the pattern formed in this way, in the shot projection exposure which is repeatedly performed, there is a certain probability that the pattern is not sufficiently aligned. If the degree of deviation exceeds the permissible range, the completed semiconductor chip will be a defective product due to, for example, an electrical short circuit between the wiring layer and the contact hole. Therefore, after the development, it is necessary to inspect the misalignment, and for the wafer in which an unacceptable misalignment is detected, the photoresist is removed and the photomask process is performed again, or it is necessary to extract and exhaust the wafer.

【0004】このようなフォトマスク工程における目合
わせずれの検査を容易に光学顕微鏡での観察によって行
うために、目合わせマークとしてノギス目盛りを用いる
技術が提案されている。この種のノギス目盛りは図4の
ように、ウェハ平面上の一方向のノギス目盛り(Xノギ
ス目盛り、以下、Xノギス)11と、それに直交する方
向の目盛り(Yノギス目盛り、以下、Yノギス)12と
が一組みとされた構成となっている。これらXノギス1
1とYノギス12のうち、11A,12Aは次の工程で
形成される被目合わせマークとしてのノギスであり、1
1B,12Bは先の工程で形成されている目合わせマー
クとしてのノギスである。両ノギスはそのピッチが幾分
相違しており、通常では被目合わせノギスのピッチに対
して、目合わせノギスのピッチは幾分狭いピッチで構成
されている。
In order to easily carry out the inspection of the misalignment in such a photomask process by observing with an optical microscope, a technique using a caliper scale as an alignment mark has been proposed. This kind of caliper scale is, as shown in FIG. 4, a caliper scale in one direction on the wafer plane (X caliper scale, hereinafter X caliper) 11 and a scale in a direction orthogonal to it (Y caliper scale, hereinafter Y caliper). 12 and 12 are configured as one set. These X calipers 1
Of the 1 and Y calipers 12, 11A and 12A are calipers as alignment marks to be formed in the next step.
1B and 12B are calipers as the alignment marks formed in the previous process. The two calipers have slightly different pitches, and normally the pitch of the calipers to be aligned is configured to be slightly narrower than the pitch of the calipers to be aligned.

【0005】なお、前記した被目合わせノギスは、マス
ク上の被目合わせノギスがウェハ上のフォトレジスト図
形として転写され、このフォトレジストを用いてエッチ
ング処理を行うことで、その後にフォトレジスト除去後
にもウェハ上に被目合わせノギスが残存される。そし
て、以降のフォトマスク工程において、マスク上の目合
わせノギスがウェハ上のフォトレジスト図形として転写
され、これが目合わせノギスとなり、被目合わせノギス
上に重ねられて目合わせが行われる。
In the above-mentioned calipers to be aligned, the calipers to be aligned on the mask are transferred as a photoresist pattern on the wafer, and an etching process is performed using this photoresist, after which the photoresist is removed. Also, the calipers to be aligned are left on the wafer. Then, in the subsequent photomask process, the alignment caliper on the mask is transferred as a photoresist pattern on the wafer, and this becomes the alignment caliper, which is superposed on the caliper to be aligned and aligned.

【0006】ここで、同図では目合わせずれが全くない
状態を示しており、目合わせノギス11B,12Bの中
央の目盛りは被目合わせノギス11A,12Aの中央の
目盛りの略中央に位置された状態となる。また、目合わ
せずれがある場合には、目合わせノギスの中央以外の目
盛りが被目合わせノギスの中央以外の目盛りの略中央に
位置された状態となる。したがって、光学顕微鏡によっ
て目合わせノギスのいずれの目盛りが被目合わせノギス
のいずれの目盛りの中央に位置されているか、かつ各ノ
ギスのピッチ寸法を考慮することにより、目合わせずれ
量を測定することができる。
Here, the figure shows a state in which there is no misalignment, and the center graduations of the alignment calipers 11B and 12B are located substantially in the center of the center graduations of the calipers 11A and 12A to be calibrated. It becomes a state. Further, when there is misalignment, the scales other than the center of the caliper to be aligned are positioned substantially at the center of the scales other than the center of the caliper to be aligned. Therefore, it is possible to measure the misalignment amount by considering which scale of the caliper to be aligned is located at the center of which scale of the caliper to be aligned and the pitch dimension of each caliper with an optical microscope. it can.

【0007】[0007]

【発明が解決しようとする課題】このような従来のXノ
ギスとYノギスを用いた目合わせでは、X方向とY方向
の各目合わせは可能ではあるが、X方向とY方向のいず
れにも所定の角度で傾斜した方向、ここではθ方向と称
する方向の目合わせを光学顕微鏡観察を用いて行い、そ
のずれ量を高精度に測定することは難しいという問題が
ある。例えば、図5(a)はθ方向の目合わせずれが厳
しく要求される半導体スタチックメモリ回路の例であ
り、ワード線WLと、ビット信号取り出しのためのコン
タクトホールCHと、駆動トランジスタのゲート電極G
とが、それぞれ斜め方向にd11,d12及びd13の
間隔で配置され、d11とd12は同じ長さに設計され
ている。ここで、これらワード線WL、ゲート電極G,
コンタクトホールCHとは異なるフォトマスク工程で形
成されるため、θ方向の目合わせずれが生じるとこれら
の間隔に誤差が生じ、ずれ量が大きくなると相互にショ
ートされてしまい、不良品となる。また、図5(b)は
同様に半導体スタチックメモリ回路の電源配線BLと、
記憶ノードのコンタクトホールCH1,CH2の例であ
るが、θ方向の目合わせずれによって間隔d21,d2
2にずれが生じると、相互間でのショートが生じる場合
がある。
In the conventional alignment using the X calipers and the Y calipers, it is possible to perform the alignment in each of the X direction and the Y direction, but it is possible to perform the alignment in both the X direction and the Y direction. There is a problem in that it is difficult to perform the alignment in a direction inclined at a predetermined angle, which is referred to as the θ direction here, by using an optical microscope and measure the deviation amount with high accuracy. For example, FIG. 5A is an example of a semiconductor static memory circuit in which the misalignment in the θ direction is strictly required, and includes a word line WL, a contact hole CH for extracting a bit signal, and a gate electrode of a drive transistor. G
Are arranged in the diagonal direction at intervals of d11, d12 and d13, respectively, and d11 and d12 are designed to have the same length. Here, these word lines WL, gate electrodes G,
Since the contact hole CH is formed by a photomask process different from that of the contact hole CH, if misalignment in the θ direction occurs, an error occurs in these intervals, and if the amount of misalignment increases, they are short-circuited with each other and become defective. Similarly, FIG. 5B shows a power supply line BL of the semiconductor static memory circuit,
In the example of the contact holes CH1 and CH2 of the storage node, the gaps d21 and d2 are caused by misalignment in the θ direction.
If there is a shift in 2, a short circuit may occur between them.

【0008】このようなθ方向の目合わせずれの測定
は、図4に示したXノギスとYノギスを用いて行うこと
も不可能ではない。例えば、X方向及びY方向に対して
45°方向の目合わせずれを測定する場合には、X方
向、Y方向それぞれのずれ量、仮にそれぞれに0.1μ
mの目合わせずれが生じていたとすると、斜め45°の
目合わせずれ量は0.1μm×√2≒0.14μmのず
れとなる。斜め45°以外のθ方向のずれ量は、同様な
原理から、測定されたX方向とY方向の各ずれ量を平方
し、その和の平方根を計算すればずれ量の絶対値は測定
できる。
It is not impossible to measure such misalignment in the θ direction using the X calipers and the Y calipers shown in FIG. For example, when measuring the misalignment in the 45 ° direction with respect to the X direction and the Y direction, the misregistration amount in each of the X direction and the Y direction, and 0.1 μ for each
If there is a misalignment of m, the misalignment amount at an angle of 45 ° is 0.1 μm × √2≈0.14 μm. With respect to the deviation amount in the θ direction other than the oblique 45 °, the absolute value of the deviation amount can be measured by squaring the measured deviation amounts in the X direction and the Y direction and calculating the square root of the sum based on the same principle.

【0009】しかしながら、この方法では、X方向とY
方向のそれぞれの目合わせずれ量を測定し、かつこれら
を用いて前記した計算を行う必要があるために、目合わ
せずれ検査の時間の増大をまねき、半導体装置を量産す
る上では不都合となる。たとえば、前記した例におい
て、目合わせずれの限界を±0.1μmとし、これに合
わせてXノギスとYノギスの管理限界をそれぞれ±0.
1μmと設定した場合、X方向とY方向のずれ量をそれ
ぞれ個々に利用して目合わせずれを判断していたので
は、θ(45°)方向のずれが0.14μmとなって±
0.1μm以内に収まらないことが生じた場合でも、顕
微鏡による目視では直ちに判断することができず、計算
を待たなければならず、検査時間が長いものとなる。
However, in this method, the X direction and the Y direction are
Since it is necessary to measure the misalignment amount in each direction and to perform the above-mentioned calculation using these, the misalignment inspection time is increased, which is inconvenient for mass production of semiconductor devices. For example, in the above-mentioned example, the limit of misalignment is ± 0.1 μm, and the control limits of the X caliper and the Y caliper are ± 0.
When 1 μm is set, the misalignment amount is determined individually by using the misalignment amounts in the X direction and the Y direction, and the misalignment in the θ (45 °) direction is 0.14 μm.
Even if the thickness does not fall within 0.1 μm, it cannot be immediately judged by visual observation with a microscope, the calculation must be waited, and the inspection time becomes long.

【0010】なお、特開平1−193743号公報で
は、X方向及びY方向以外の目合わせずれを測定する技
術が記載されているが、これはショット単位での回転ず
れを検査するための専用パターンを設けたものであり、
専用パターンをレチクル外周部に配置し、隣接ショット
との重なり具合で回転ずれを検査するようにしたもので
ある。したがって、前記したようなθ方向の目合わせず
れの問題を解消することはできない。
Japanese Patent Laid-Open No. 1-193743 discloses a technique for measuring misalignment in directions other than the X and Y directions. This is a dedicated pattern for inspecting rotational misalignment in shot units. Is provided,
The dedicated pattern is arranged on the outer peripheral portion of the reticle, and the rotation deviation is inspected by the degree of overlap with the adjacent shot. Therefore, the problem of misalignment in the θ direction as described above cannot be solved.

【0011】本発明の目的は、X方向及びY方向の目合
わせずれと共に、θ方向の位置ずれを高精度にかつ迅速
に測定することを可能にしたフォトマスクの目合わせマ
ークとこの目合わせマークを有する半導体装置を提供す
ることにある。
An object of the present invention is to provide a photomask alignment mark and this alignment mark capable of measuring the positional deviation in the θ direction together with the misalignment in the X and Y directions with high accuracy and speed. It is to provide a semiconductor device having the following.

【0012】[0012]

【課題を解決するための手段】本発明の目合わせマーク
は、一のフォトマスクに形成された第1の目合わせマー
クと、これに目合わせされる他のフォトマスクに形成さ
れた第2の目合わせマークとはそれぞれX方向の目合わ
せを測定するXノギスと、Y方向の目合わせを測定する
Yノギスと、X方向とY方向の両方に対して傾斜された
θ方向の目合わせを測定するθノギスとで構成されてい
ることを特徴とする。
Means for Solving the Problems An alignment mark according to the present invention comprises a first alignment mark formed on one photomask and a second alignment mark formed on another photomask aligned with the first alignment mark. The alignment marks are the X calipers that measure the alignment in the X direction, the Y calipers that measure the alignment in the Y direction, and the alignment in the θ direction that is inclined with respect to both the X and Y directions. It is characterized in that it is composed of θ calipers.

【0013】例えば、XノギスはX方向に配列された複
数本の目盛りで構成され、YノギスはY方向に配列され
た複数本の目盛りで構成され、θノギスはθ方向に配列
された複数本の目盛りで構成される。また、θノギスは
X方向またはY方向に配列された複数本の目盛りで構成
されてもよい。さらに、θノギスは、それぞれ異なる傾
斜角のθ方向の目合わせを測定する複数のθノギスで構
成されてもよい。
For example, the X caliper is composed of a plurality of scales arranged in the X direction, the Y caliper is composed of a plurality of scales arranged in the Y direction, and the θ caliper is a plurality of scales arranged in the θ direction. It is composed of scales. The θ caliper may be composed of a plurality of scales arranged in the X direction or the Y direction. Furthermore, the θ caliper may be composed of a plurality of θ calipers for measuring the alignment in the θ direction with different inclination angles.

【0014】[0014]

【発明の実施の形態】次に、本発明の実施形態を図面を
参照して説明する。図1は本発明の第1の実施形態にお
ける被目合わせマークと目合わせマークの各パターン構
成図であり、各マークはX方向に配列されたXノギス1
と、これと直交するY方向に配列されたYノギス2と、
X方向とY方向のいずれにも所定の角度、ここでは45
°で傾斜されたθ1方向に配列されたθ1ノギス3とで
構成されている。そして、前記各ノギス1〜3を構成す
る被目合わせマーク1A,1B,1Cは複数本の太幅の
目盛りで形成され、各目盛りは所定のピッチ間隔で形成
される。一方、各ノギス1,2,3を構成する目合わせ
マーク1B,2B,3Bは被目合わせマーク1A,2
A,3Aと同数本の細幅の目盛りで形成され、各目盛り
は被目合わせマークの目盛りよりも若干小さいピッチ間
隔で形成される。例えば、被目合わせマーク1A,2
A,3Aのピッチ間隔を1μmとし、目合わせマーク1
B,2B,3Bのピッチ間隔を0.95μmとして形成
する。
Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a pattern configuration diagram of an alignment mark and an alignment mark according to the first embodiment of the present invention. Each mark is an X caliper 1 arranged in the X direction.
And Y calipers 2 arranged in the Y direction orthogonal to this,
Predetermined angle in both X and Y directions, here 45
It is composed of θ1 calipers 3 arranged in the θ1 direction inclined at an angle of °. The alignment marks 1A, 1B, 1C forming each of the calipers 1 to 3 are formed of a plurality of wide-width graduations, and each graduation is formed at a predetermined pitch interval. On the other hand, the alignment marks 1B, 2B, 3B that form the calipers 1, 2, 3 are the alignment marks 1A, 2
The graduations are formed in the same number as A and 3A, and each graduation is formed at a pitch interval slightly smaller than the graduation of the alignment mark. For example, the alignment marks 1A, 2
A, 3A pitch interval is 1 μm, and alignment mark 1
The pitch intervals of B, 2B and 3B are set to 0.95 μm.

【0015】このような被目合わせマークと目合わせマ
ークは、これまでと同様に、被目合わせマーク1A,2
A,3Aは先のフォトマスク工程でウェハに形成され、
目合わせマーク1B,2B,3Bは後のフォトマスク工
程でウェハに形成される。そして、光学顕微鏡によりこ
れらのマークを観察することで、目合わせが実行でき
る。例えば、同図では、目合わせマーク1B,2B,3
Bの中央の目盛りが被目合わせマーク1A,2A,3A
の中央の目盛りの中央に位置しており、この状態では両
マーク間での目あわせずれが生じていないことを示して
いる。
The alignment marks and the alignment marks as described above are the same as the conventional ones.
A and 3A are formed on the wafer in the previous photomask process,
The alignment marks 1B, 2B, 3B are formed on the wafer in a photomask process which will be performed later. Then, by observing these marks with an optical microscope, alignment can be performed. For example, in the figure, the alignment marks 1B, 2B, 3
The scale at the center of B is the alignment marks 1A, 2A, 3A
It is located at the center of the graduation in the center of, and in this state, there is no misalignment between the marks.

【0016】一方、図示は省略するが、目合わせマーク
1B,2B,3Bの中央以外の目盛りが被目合わせマー
ク1A,2A,3Aの中央以外の目盛りの中央に位置し
ている場合には、両マークに目合わせずれが生じている
ことになる。そして、この目合わせずれ量は、両マーク
のピッチ寸法の差、すなわちここでは1−0.95=
0.05μm単位で測定することができる。したがっ
て、両マークを観察したときに、各マークの中央の目盛
りから何番目の目盛りにおいて両マークの中央が重ねら
れているかを確認し、その目盛りの番数と、前記測定単
位の0.05μmとからそのずれ量を測定することがで
きる。なお、この実施形態では、各マークがそれぞれ7
個の目盛りで構成されているため、±0.15μmの範
囲の目合わせずれが測定できる。
On the other hand, although not shown, when the scales other than the center of the alignment marks 1B, 2B, 3B are located at the center of the scales other than the center of the alignment marks 1A, 2A, 3A, There is a misalignment between the marks. This misalignment amount is the difference between the pitch dimensions of both marks, that is, 1-0.95 =
It can be measured in units of 0.05 μm. Therefore, when observing both marks, it is confirmed at what number scale from the center scale of each mark the centers of both marks are overlapped, and the number of the scale and the measurement unit of 0.05 μm. Therefore, the amount of deviation can be measured. In this embodiment, each mark is 7
Since it is composed of individual scales, misalignment in the range of ± 0.15 μm can be measured.

【0017】したがって、この実施形態では、Xノギス
1によって両マークのX方向の目合わせずれが、Yノギ
ス2によってY方向の目合わせずれがそれぞれ測定で
き、さらにθ1ノギス3によってθ1方向の目合わせず
れが測定できる。そして、各方向では、それぞれのノギ
スによって前記した0.05μm単位でのずれが測定で
きるため、両マーク、すなわち先のフォトマスクと後の
フォトマスクの各パターンの目合わせずれをX方向、Y
方向及びθ1方向にそれぞれ測定することができる。こ
れにより、θ1方向に目合わせ精度が厳しく要求される
半導体装置の製造においても、高精度の目合わせが実現
できる。したがって、θ方向におけるパターン設計のマ
ージンを小さくでき、半導体装置の高集積化を図る上で
有利となる。また、θ1方向の目合わせも光学顕微鏡の
観察により一目で確認できるため、迅速な目合わせが可
能となる。
Therefore, in the present embodiment, the X caliper 1 can measure the misalignment of both marks in the X direction, the Y caliper 2 can measure the misalignment in the Y direction, and the θ1 caliper 3 can measure the misalignment in the θ1 direction. Deviation can be measured. In each direction, since the above-mentioned deviation in 0.05 μm units can be measured by each caliper, the misalignment between both marks, that is, the respective patterns of the preceding photomask and the following photomask, can be measured in the X direction and the Y direction.
Direction and the θ1 direction, respectively. As a result, highly accurate alignment can be realized even in the manufacture of a semiconductor device in which alignment precision is strictly required in the θ1 direction. Therefore, the margin of the pattern design in the θ direction can be reduced, which is advantageous in achieving high integration of the semiconductor device. Further, since the alignment in the θ1 direction can be confirmed at a glance by observing with an optical microscope, rapid alignment can be performed.

【0018】図2は本発明の第2の実施形態を示す図で
あり、図1と等価な部分には同一符号を付してある。こ
の実施形態ではY方向には同じでX方向には逆の方向に
傾斜したθ2方向に沿って被目合わせマーク4Aと目合
わせマーク4Bで構成されるθ2ノギス4を配設した例
であり、このθ2方向が図1のθ1方向と異なるほかは
他の構成は同じであり、図1の実施形態と同様にθ2方
向の目合わせずれを微細な測定単位で迅速に測定するこ
とができ、迅速な目合わせが可能となる。
FIG. 2 is a diagram showing a second embodiment of the present invention, in which parts equivalent to those in FIG. 1 are designated by the same reference numerals. This embodiment is an example in which the θ2 caliper 4 composed of the alignment mark 4A and the alignment mark 4B is arranged along the θ2 direction that is the same in the Y direction and is opposite to the X direction, Other than this θ2 direction is different from the θ1 direction in FIG. 1, the other configurations are the same, and as in the embodiment of FIG. 1, misalignment in the θ2 direction can be quickly measured in a fine measurement unit, and the speed can be increased. It is possible to make precise alignment.

【0019】また、図3は本発明の第3の実施形態を示
す図であり、Xノギス1及びYノギス2と共にθ1ノギ
ス3とθ2ノギス4を併せて配設し、互いに直交するθ
1方向とθ2方向の目合わせをも同時に行うことができ
るように構成したものである。この実施形態では、θ1
ノギス3とθ2ノギス4の各目盛りは、それぞれ図1、
図2に示された各ノギスの目盛りをY方向に平行移動す
ることにより、θ1方向、θ2方向に所定のピッチ間隔
を有してX方向に配列されているが、その原理は前記各
実施形態と全く同じであり、θ1方向とθ2方向の目合
わせずれを同様にして測定することができる。したがっ
て、X方向、Y方向、θ1方向、θ2方向の各目合わせ
ずれを迅速にかつ高精度で測定することができる。ま
た、このようにθ1ノギスとθ2ノギスの各目盛りをX
方向に配列することで、θ1及びθ2ノギスのY方向の
長さを短くでき、目合わせマーク全体が占める占有面積
を極力小さくでき、半導体装置の高集積化に対応でき
る。また、θ1ノギスとθ2ノギスを並べて配置してい
るため、θ1方向とθ2方向の目合わせずれを対比観察
することができ、観察作業効率を向上することも可能で
ある。
FIG. 3 is a diagram showing a third embodiment of the present invention, in which X1 calipers 1 and Y calipers 2 as well as θ1 calipers 3 and θ2 calipers 4 are arranged together, and they are orthogonal to each other.
The configuration is such that the alignment in one direction and the θ2 direction can be performed at the same time. In this embodiment, θ1
The scales of calipers 3 and θ2 calipers 4 are shown in Fig. 1, respectively.
By moving the scales of each caliper shown in FIG. 2 in parallel in the Y direction, the calipers are arranged in the X direction with a predetermined pitch interval in the θ1 direction and the θ2 direction. And the misalignment in the θ1 direction and the θ2 direction can be measured in the same manner. Therefore, each misalignment in the X direction, Y direction, θ1 direction, and θ2 direction can be measured quickly and with high accuracy. Also, in this way, each scale of θ1 caliper and θ2 caliper is X
By arranging them in the directions, the lengths of the θ1 and θ2 calipers in the Y direction can be shortened, the area occupied by the entire alignment mark can be minimized, and high integration of the semiconductor device can be achieved. Further, since the θ1 calipers and the θ2 calipers are arranged side by side, the misalignment in the θ1 direction and the θ2 direction can be observed in contrast, and the observation work efficiency can be improved.

【0020】ここで、前記各実施形態ではθ1方向、θ
2方向はX方向及びY方向に45°で傾斜している例を
示しているが、これ以外の角度、例えばX方向に対して
30°、60°で傾斜される場合においても本発明を同
様に適用できる。また、各θノギスの目盛りはY方向に
並べて配置することも可能である。また、場合によって
は、Xノギスの目盛りをY方向に並べて配置し、Yノギ
スの目盛りをX方向に並べて配置するように構成しても
よく、ウェハにおけるスペースの大きさと形状に合わせ
て適宜に配列を変更することが可能である。また、各ノ
ギスの目盛りのピッチや本数は前記実施形態の値に限ら
れるものでないことは言うまでもない。
Here, in each of the above embodiments, the θ1 direction, θ
Although the two directions show an example in which the two directions are inclined at 45 ° in the X direction and the Y direction, the present invention is also applicable to the case of being inclined at other angles, for example, 30 ° and 60 ° with respect to the X direction. Applicable to Further, the scales of the θ calipers can be arranged side by side in the Y direction. In some cases, the X calipers may be arranged side by side in the Y direction and the Y calipers may be arranged side by side in the X direction. Can be changed. Further, it goes without saying that the pitch and the number of scales of each caliper are not limited to the values in the above embodiment.

【0021】[0021]

【発明の効果】以上説明したように本発明の目合わせマ
ークは、X方向の目合わせを測定するXノギスと、Y方
向の目合わせを測定するYノギスと、X方向とY方向の
両方に対して傾斜されたθ方向の目合わせを測定するθ
ノギスとで構成されているので、X方向とY方向の目合
わせずれを光学顕微鏡等により観察して容易に測定でき
ることは勿論のこと、θノギスを同様に観察することで
θ方向の目合わせずれを迅速にしかも高精度で測定する
ことができる。これにより、θ方向の目合わせ精度が厳
しく要求される半導体装置での目合わせずれを高精度に
測定でき、θ方向の設計マージンクを小さくし、半導体
装置の高集積化を図ることができる。
As described above, the alignment mark of the present invention can be applied to both the X caliper for measuring the alignment in the X direction, the Y caliper for measuring the alignment in the Y direction, and the X caliper for both the X direction and the Y direction. Θ to measure the alignment in the θ direction inclined to
Since it is composed of calipers, it is of course possible to easily measure misalignment in the X and Y directions by observing it with an optical microscope, etc. Can be measured quickly and with high accuracy. As a result, it is possible to measure the misalignment in the semiconductor device, which requires strict alignment accuracy in the θ direction with high accuracy, reduce the design margin in the θ direction, and achieve high integration of the semiconductor device.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の第1の実施形態の目合わせマークの構
成図である。
FIG. 1 is a configuration diagram of an alignment mark according to a first embodiment of the present invention.

【図2】本発明の第2の実施形態の目合わせマークの構
成図である。
FIG. 2 is a configuration diagram of an alignment mark according to a second embodiment of the present invention.

【図3】本発明の第3の実施形態の目合わせマークの構
成図である。
FIG. 3 is a configuration diagram of an alignment mark according to a third embodiment of the present invention.

【図4】従来の目合わせマークの構成図である。FIG. 4 is a configuration diagram of a conventional alignment mark.

【図5】従来のθ方向に目合わせ精度が要求される半導
体装置のパターンの一例を示す図である。
FIG. 5 is a diagram showing an example of a pattern of a conventional semiconductor device that requires alignment accuracy in the θ direction.

【符号の説明】[Explanation of symbols]

1 Xノギス 2 Yノギス 3 θ1ノギス 4 θ2ノギス 1A,2A,3A,4A 被目合わせマーク 1B,2B,3B,4B 目合わせマーク 1 X caliper 2 Y caliper 3 θ1 caliper 4 θ2 caliper 1A, 2A, 3A, 4A Alignment mark 1B, 2B, 3B, 4B Alignment mark

Claims (7)

【特許請求の範囲】[Claims] 【請求項1】 一のフォトマスクに形成された第1の目
合わせマークと、他のフォトマスクに形成された第2の
目合わせマークとを相対比較して両フォトマスクの目合
わせを行うための目合わせマークにおいて、前記第1の
目合わせマークと第2の目合わせマークとはそれぞれX
方向の目合わせを測定するXノギスと、Y方向の目合わ
せを測定するYノギスと、X方向とY方向の両方に対し
て傾斜されたθ方向の目合わせを測定するθノギスとで
構成されていることを特徴とするフォトマスクの目合わ
せマーク。
1. A first alignment mark formed on one photomask and a second alignment mark formed on another photomask are relatively compared to align the two photomasks. In the alignment mark, the first alignment mark and the second alignment mark are each X.
It is composed of an X caliper that measures the alignment in the direction, a Y caliper that measures the alignment in the Y direction, and a θ caliper that measures the alignment in the θ direction that is inclined with respect to both the X direction and the Y direction. The alignment mark on the photomask.
【請求項2】 XノギスはX方向に配列された複数本の
目盛りで構成され、YノギスはY方向に配列された複数
本の目盛りで構成され、θノギスはθ方向に配列された
複数本の目盛りで構成されてなる請求項1のフォトマス
クの目合わせマーク。
2. The X caliper is composed of a plurality of scales arranged in the X direction, the Y caliper is composed of a plurality of scales arranged in the Y direction, and the θ caliper is a plurality of scales arranged in the θ direction. The alignment mark of the photomask according to claim 1, wherein the alignment mark comprises a scale.
【請求項3】 θノギスはX方向またはY方向に配列さ
れた複数本の目盛りで構成される請求項1のフォトマス
クの目合わせマーク。
3. The alignment mark of the photomask according to claim 1, wherein the θ caliper is composed of a plurality of scales arranged in the X direction or the Y direction.
【請求項4】 θノギスは、それぞれ異なる傾斜角のθ
方向の目合わせを測定する複数のθノギスで構成される
請求項1ないし3のいずれかのフォトマスクの目合わせ
マーク。
4. The θ calipers are θ of different inclination angles.
The alignment mark of the photomask according to any one of claims 1 to 3, which is composed of a plurality of calipers for measuring the alignment of directions.
【請求項5】 第1の目合わせマークと、第2の目合わ
せマークとは目盛りの幅寸法が相違され、両マークの重
なり位置が観察可能に構成されてなる請求項1ないし4
のいずれかのフォトマスクの目合わせマーク。
5. The first alignment mark and the second alignment mark are different in the width dimension of the scale, and the overlapping positions of both marks are observable.
Alignment mark on one of the photo masks.
【請求項6】 第1の目合わせマークが先のフォトマス
ク工程で用いられるフォトマスクに形成され、第2の目
合わせマークが後のフォトマスク工程で用いられるフォ
トマスクに形成されてなる請求項1ないし5のいずれか
のフォトマスクの目合わせマーク。
6. The first alignment mark is formed on a photomask used in a previous photomask process, and the second alignment mark is formed on a photomask used in a subsequent photomask process. Alignment mark on the photomask of any one of 1 to 5.
【請求項7】 請求項1ないし6のいずれかの目合わせ
マークが設けられた半導体装置。
7. A semiconductor device provided with the alignment mark according to claim 1.
JP32931195A 1995-12-18 1995-12-18 Photomask alignment mark and semiconductor device Expired - Lifetime JP2870461B2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP32931195A JP2870461B2 (en) 1995-12-18 1995-12-18 Photomask alignment mark and semiconductor device
TW085115508A TW410457B (en) 1995-12-18 1996-12-16 Misergistration detecting marks for pattern formed on semiconductor substrate
US08/767,846 US5721619A (en) 1995-12-18 1996-12-17 Misregistration detecting marks for pattern formed on semiconductor substrate
KR1019960067276A KR100242503B1 (en) 1995-12-18 1996-12-18 Misregistration detecting marks for pattern formen on semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP32931195A JP2870461B2 (en) 1995-12-18 1995-12-18 Photomask alignment mark and semiconductor device

Publications (2)

Publication Number Publication Date
JPH09166866A true JPH09166866A (en) 1997-06-24
JP2870461B2 JP2870461B2 (en) 1999-03-17

Family

ID=18220048

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (4)

Country Link
US (1) US5721619A (en)
JP (1) JP2870461B2 (en)
KR (1) KR100242503B1 (en)
TW (1) TW410457B (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
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Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10177245A (en) * 1996-12-18 1998-06-30 Fujitsu Ltd Reticle, semiconductor substrate and semiconductor chip
JP3169068B2 (en) * 1997-12-04 2001-05-21 日本電気株式会社 Electron beam exposure method and semiconductor wafer
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6366846U (en) * 1986-10-22 1988-05-06
JPH01193743A (en) * 1988-01-28 1989-08-03 Nec Kyushu Ltd Reticle mask
JPH09127680A (en) * 1995-10-31 1997-05-16 Nec Corp Mask for exposure

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL7606548A (en) * 1976-06-17 1977-12-20 Philips Nv METHOD AND DEVICE FOR ALIGNING AN IC CARTRIDGE WITH REGARD TO A SEMI-CONDUCTIVE SUBSTRATE.
JPS57148347A (en) * 1981-03-09 1982-09-13 Jeol Ltd Measurement of connection accuracy for electron beam exposure
US4669866A (en) * 1985-01-28 1987-06-02 Phillips Edward H Step-and-repeat alignment and exposure system and method therefore
DE69120989D1 (en) * 1990-03-12 1996-08-29 Fujitsu Ltd Alignment mark, especially for semiconductors
US5407763A (en) * 1992-05-28 1995-04-18 Ceridian Corporation Mask alignment mark system
US5596413A (en) * 1995-08-17 1997-01-21 Lucent Technologies Inc. Sub-micron through-the-lens positioning utilizing out of phase segmented gratings

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6366846U (en) * 1986-10-22 1988-05-06
JPH01193743A (en) * 1988-01-28 1989-08-03 Nec Kyushu Ltd Reticle mask
JPH09127680A (en) * 1995-10-31 1997-05-16 Nec Corp Mask for exposure

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007504664A (en) * 2003-09-02 2007-03-01 アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド Structure for Pattern Recognition and Method for X Initiative Layout Design
JP2006184889A (en) * 2004-12-01 2006-07-13 Nikon Corp Alignment adjustment method, method for forming alignment mark, base material, and method for manufacturing transmissive optical element
JP2009188404A (en) * 2008-02-01 2009-08-20 Asml Netherlands Bv Alignment mark and aligning method of substrate with alignment mark
US8208121B2 (en) 2008-02-01 2012-06-26 Asml Netherlands B.V. Alignment mark and a method of aligning a substrate comprising such an alignment mark
JP2021511532A (en) * 2018-01-12 2021-05-06 ケーエルエー コーポレイション Measurement targets and methods with an inclined periodic structure
EP3774347A4 (en) * 2018-07-02 2021-11-17 Hewlett-Packard Development Company, L.P. Alignment patterns

Also Published As

Publication number Publication date
JP2870461B2 (en) 1999-03-17
KR100242503B1 (en) 2000-03-02
US5721619A (en) 1998-02-24
TW410457B (en) 2000-11-01

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