JPH09153622A - Thin-film semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent faults by providing redundancy to wiring of a thin-film semiconductor device. SOLUTION: A thin film transistor 2, having a source area S and a drain area D, is integrated on an insulated substrate 1. The thin film transistor 2 is electrically connected by a plurality of wires including a signal wire 6 and a gate wire 3. A plurality of conductive layers assigned to the respective wires 3, 6 and the source area S/drain area D are electrically separated from each other via inter-layer insulated films 4 and 7. The signal wire 6 has a multiple structure utilizing a plurality of conductive layers at an intersection with the gate wire 3. The multiple structure comprises a main conductive layer of a metal film assigned to the signal wire 6 and a sub conductive layer basically assigned to another wire than the signal wire 6. The sub conductive layer comprises a semiconductive film 5 which belongs to the same layer of the source area S/drain area D. the main conductive layer and the sub conductive layer are inter-connected via contact holes 8 formed through the inter-layer insulated film 7 between these layers. Thus, a desired redundancy is obtained in the wiring.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film semiconductor device in which thin film transistors are integrated and formed on an insulating substrate. More specifically, the present invention relates to a redundant structure of multi-layer wiring including a signal wiring, a gate wiring, and the like that connect thin film transistors.

[0002]

2. Description of the Related Art A thin film semiconductor device in which thin film transistors are integrated and formed on an insulating substrate is applied to an active matrix type liquid crystal display device and the like, and has been actively developed in recent years. The thin film transistor is electrically connected by a plurality of wirings including a signal wiring and a gate wiring. In the conventional multilayer wiring structure, the gate wiring and the signal wiring are basically composed of a single layer film. At the intersection of the gate wiring and the signal wiring, the two are electrically separated via an interlayer insulating film.

[0003]

However, in this structure, there is a step at the intersection of the gate wiring and the signal wiring. When the wiring is composed of a single layer film, disconnection occurs due to step coverage failure or etching failure at the step. Further, if particles adhere to the conductor film forming the wiring during the film formation, defects such as patterning of the conductor film due to etching may occur, which may cause disconnection of the wiring. As a result,
When the thin film semiconductor device is applied to an active matrix type liquid crystal display device or the like, display defects and the like occur due to line defects (vertical stripe defects) in the pixel section and malfunctions in the peripheral drive circuit section.

In order to prevent these disconnection failures, there has been conventionally proposed a technique in which the wiring is composed of a multilayer film. In this case, the second-layer conductor film is continuously formed directly on the first-layer conductor film, and the laminated film is patterned and processed into wiring by collective etching. Alternatively, the wiring is formed by performing the first etching at the stage of forming the first-layer conductor film and then performing the second etching at the stage of forming the second-layer conductor film. . In these laminated structures, for example, an aluminum film having high conductivity is used for the first layer and the second layer is used.
A titanium film or the like having a relatively high mechanical strength is used for the layer. Even if a crack or the like occurs in the lower aluminum film, the titanium film in the upper layer can ensure conductivity, so that the structure is redundant to some extent. However, when particles adhere to the surface of the insulating substrate, there is a risk of disconnection when the wiring having a laminated structure is formed on the surface of the insulating substrate, and the structure is not sufficiently redundant. When this disconnection occurs, some repair processing must be performed in a later process, which is a problem to be solved in the manufacturing process.

[0005]

The following means have been taken in order to solve the above-mentioned problems of the prior art. That is, the thin film semiconductor device according to the present invention is one in which thin film transistors having source / drain regions are integrally formed on an insulating substrate, and each thin film transistor is electrically connected by a plurality of wires including a signal wire and a gate wire. ing. A plurality of conductor layers assigned to each wiring and the source / drain regions are electrically isolated from each other through an interlayer insulating film. As a characteristic feature, at least one kind of wiring has a multiple structure partially utilizing a plurality of conductor layers, and a main conductor layer originally assigned to the wiring and a sub-conductor layer originally assigned to other than the wiring. Is connected to each other through a contact hole opened in the interlayer insulating film interposed between the two.

Specifically, the crossing portion of the signal wiring in the upper layer that intersects with the gate wiring in the lower layer is given redundancy by the multiple structure. Alternatively, in the signal wiring in the upper layer that intersects with the gate wiring in the lower layer, the intermediate portion partitioned by each intersection is provided with redundancy by the multiple structure.

In one embodiment, the signal wiring has a multiple structure, the main conductor layer of which is made of a metal film, while the sub-conductor layer is patterned separately from the source / drain regions and the metal film is formed. The impurity semiconductor film is located in a lower layer. In another embodiment, the signal wiring has the multiple structure and the main conductor layer is made of a metal film, while the sub-conductor layer is patterned separately from the gate wiring and is located below the metal film. Is formed of a conductive film. In another embodiment, the signal wiring has the multiple structure, the main conductor layer of which is made of a metal film, and the sub conductor layer of which is patterned separately from the pixel electrode and which is located above the metal film. It is made of a transparent conductive film. The pixel electrode is connected to the thin film transistor via the interlayer insulating film. In still another embodiment, the signal wiring has the multiple structure and the conductor layer is made of a metal film, while the sub-conductor layer is patterned separately from a black mask which shields the thin film transistor and the metal film is formed. It is composed of a light-shielding film located in an upper layer.

The present invention includes an active matrix liquid crystal display device. This active matrix liquid crystal display device includes a pixel electrode, a thin film transistor forming a switching element for driving the pixel electrode, and a circuit board on which thin film transistors forming a peripheral drive circuit for driving the switching element are integrated, and a predetermined gap is formed on the circuit board. It is provided with a counter substrate which is bonded via the counter substrate and on which a counter electrode is formed, and a liquid crystal held in the gap. The thin film transistor has a source / drain region and is electrically connected by a plurality of wirings including a signal wiring and a gate wiring.
A plurality of conductor layers assigned to each wiring and the source / drain regions are electrically isolated from each other through an interlayer insulating film. As a characteristic feature, at least one kind of wiring has a multiple structure partially utilizing a plurality of conductor layers, and a main conductor layer originally assigned to the wiring and a sub-conductor layer originally assigned to other than the wiring. Is connected to each other through a contact hole opened in the interlayer insulating film interposed between the two.

According to the present invention, at least one kind of wiring has a multiple structure in which a plurality of conductor layers are partially used and has desired redundancy. This multi-layer structure is composed of a main conductor layer originally assigned to the wiring and a sub-conductor layer originally assigned to a wiring other than the wiring, and they are mutually connected through a contact hole opened in an interlayer insulating film interposed therebetween. It is connected. Since this multiple structure originally uses a plurality of conductor layers formed on the insulating substrate, it can be formed without any additional film forming step. Further, in the conventional laminated structure, a plurality of conductor layers are in direct contact, whereas in the multiple structure of the present invention, an interlayer insulating film is interposed between the plurality of conductor layers. Therefore, in the case of the conventional laminated structure, the disconnection of the wiring may occur if particles are attached at the film forming stage, whereas in the multiple structure of the present invention, a plurality of conductor layers are formed separately. Even if a wire break occurs due to adhesion of particles or the like on one side, the other one compensates for the wire break and ensures continuity of the entire wiring.

[0010]

BEST MODE FOR CARRYING OUT THE INVENTION The best embodiment of the thin film semiconductor device according to the present invention will be described in detail below with reference to the drawings.
FIG. 1 is a schematic sectional view showing a first embodiment of a thin film semiconductor device according to the present invention. Insulating substrate 1 as shown
A thin film transistor 2 is integratedly formed on the above. In this example, the thin film transistor 2 has a bottom gate structure. However, it is needless to say that the present invention is not limited to this, and can be applied to top gate type and planar type thin film transistors. In the bottom gate type, the semiconductor film 5 is formed on the gate electrode 3g via the gate insulating film 4 which is a kind of interlayer insulating film. The semiconductor film 5 is patterned in an island shape in accordance with the element region of the thin film transistor 2. Impurities are selectively injected into the semiconductor film 5 by ion doping or the like to form a source region S and a drain region D of the thin film transistor 2. A channel region Ch in which impurities are not implanted is left between the regions S and D.

The thin film transistor 2 is electrically connected by a plurality of wirings including a signal wiring 6 and a gate wiring 3. In this example, the signal wiring 6 is electrically connected to the source region S of the thin film transistor 2 through the contact hole 8 opened in the interlayer insulating film 7, and the portion partially extended from the gate wiring 3 is the gate of the thin film transistor 2. Electrode 3g
It has become. A plurality of conductor layers assigned to the wirings 3 and 6 and the source region S / drain region D are electrically isolated from each other through the interlayer insulating films 4 and 7. Specifically, a conductor layer made of a metal film such as aluminum is assigned to the signal wiring 6, and a conductor layer made of the impurity semiconductor film 5 is assigned to the source region S / drain region D as described above. A conductive layer made of a conductive film such as metal, silicide, polycide, or DOPOS is assigned to the gate wiring 3. The signal line 6 is covered with an interlayer insulating film 9, and a pixel electrode 10 obtained by patterning a conductor layer made of a transparent conductive film is formed thereon. The pixel electrode 10 is electrically connected to the drain region D of the thin film transistor 2 through the contact hole 8 opened in the interlayer insulating films 9 and 7.

As a characteristic feature, at least one kind of wiring has a multiple structure partially utilizing a plurality of conductor layers, and has a desired redundancy. In this multiple structure, the main conductor layer originally assigned to the wiring and the sub-conductor layer originally assigned to the wiring other than the wiring are connected to each other through a contact hole opened in an interlayer insulating film interposed therebetween. It was done. In this example, the crossing portion of the signal wiring 6 in the upper layer, which intersects the gate wiring 3 in the lower layer, is given redundancy by the multiple structure. That is, at this intersection, the main conductor layer of the signal wiring 6 is made of a metal film such as aluminum, while the sub-conductor layer is patterned separately from the source region S / drain region D and is located below the metal film. It consists of the impurity semiconductor film 5. As shown in the figure, this multi-layered structure has an interlayer in which the metal film originally assigned to the signal wiring 6 and the semiconductor film 5 originally assigned to the source region S / drain region D, which is the other wiring, are interposed between the two. It has redundancy connected to each other through a contact hole 8 opened in the insulating film 7. Although this multiple structure is applied to the signal wiring in this example, it is needless to say that the present invention is not limited to this and can be applied to other wiring such as the gate wiring 3.

Next, with reference to FIG. 2, a method of creating the multiple structure shown in FIG. 1 will be described in detail. First, as shown in (A), the gate wiring 3 is patterned on the insulating substrate 1 made of glass or the like. Further, a gate insulating film 4 made of SiO ₂ , SiN _x or the like is formed by CVD, for example, so as to cover the gate wiring 3. Further, a semiconductor film 5 made of polycrystalline silicon or the like is formed on the gate insulating film 4 by the CVD method. At this stage, impurities such as P are implanted at a high concentration by ion doping or the like, and the source region S of the thin film transistor is
And a drain region D is formed. At this time, the gate wiring 3
Impurities P are simultaneously implanted into the semiconductor film 5 located on the upper part of the semiconductor layer 5 and become n + polycrystalline silicon, so that the resistance is reduced and a desired conductor layer is formed.

Next, the semiconductor film 5 is patterned as shown in FIG. This patterning is performed at the same time when the semiconductor film is etched into an island shape in accordance with the element region of the thin film transistor. The pattern of the semiconductor film 5 left on the gate wiring 3 has an area size sufficient to open a contact hole in the vicinity of the intersection of the gate wiring / signal wiring in a later step.

Finally, as shown in (C), an interlayer insulating film 7 made of PSG or the like is deposited on the semiconductor film 5 by CVD.
A pair of contact holes 8 are opened in this interlayer insulating film 7 by etching. This contact hole opening is formed by etching simultaneously with the opening of the contact hole for the source region / drain region of the thin film transistor. Then, after depositing a metal film of aluminum or the like by sputtering, the signal wiring 6 is processed through photolithography and etching. As a result, a desired multiplex structure can be obtained at the intersection of the gate wiring 3 and the signal wiring 6. Temporarily, signal wiring 6
Even if the line is disconnected at the step at the intersection, a signal can be transmitted through the low resistance impurity semiconductor film 5 located below the interlayer insulating film 7 and a defect can be prevented, and sufficient redundancy is provided.

FIG. 3 is a schematic partial sectional view showing a second embodiment of the thin film semiconductor device according to the present invention. Basically, it is a developed version of the first embodiment shown in FIG. 1, and corresponding parts are given corresponding reference numerals to facilitate understanding. Also in this embodiment, the signal wiring 6 has a multiple structure at the intersection with the gate wiring 3. Also in the present embodiment, the signal line 6 forms a redundant structure with the lower semiconductor film 5. In addition to this, in the present embodiment, the signal line 6 has an additional redundant structure between the signal line 6 and the upper transparent conductive film 10a. Therefore, the signal wiring 6 has a triple structure redundancy. That is, the signal wiring 6 has a main conductor layer made of a metal film such as aluminum, while having two upper and lower sub-conductor layers. The upper sub-conductor layer is a transparent conductive film 10a which is patterned separately from the pixel electrode and is located above the metal film, and the lower sub-conductor layer is patterned separately from the source region / drain region and the metal film. The impurity semiconductor film 5 is located in a layer below 6. The transparent conductive film 10a is provided with a signal line 6 through a contact hole 8 opened in the interlayer insulating film 9.
The redundant structure can be strengthened. Like this
The signal wiring is not composed of a single-layer film, but has a multiple structure in which it is connected to another conductor layer through a contact hole in the interlayer insulating film. It becomes a thing.

FIG. 4 is a schematic sectional view showing a third embodiment of the thin film semiconductor device according to the present invention. The basic configuration is the same as that of the first embodiment shown in FIG. 1, and the corresponding parts are denoted by the corresponding reference numerals to facilitate understanding. In this embodiment, a black mask 11 for shielding the thin film transistor 2 from light is provided. The black mask 11 is obtained by patterning a light shielding film made of metal chromium or the like. The black mask 11 also has conductivity, and is interposed between the pixel electrode 10 and the pad electrode 6a to electrically connect the pixel electrode 10 and the drain region D of the thin film transistor 2. The pad electrode 6
a is formed of the same conductor layer as the signal wiring 6 and is patterned at the same time. The black mask 11 and the signal wiring 6 are insulated from each other by the interlayer insulating film 12.
Characteristically, the signal wiring 6 has a multiple structure at the intersection with the gate wiring 3, and the main conductor layer thereof is made of a metal film, while the sub conductor layer thereof is separated from the black mask 11 which shields the thin film transistor 2. Then, the light shielding film 11a is patterned and is located above the metal film. As compared with the second embodiment shown in FIG. 3, it can be seen that the upper sub-conductor layer is composed of the light shielding film 11a instead of the transparent conductive film 10a. Further, it is possible to use a transparent conductive film for the sub-conductor layer in addition to the light-shielding film 11a. In this case, the signal wiring 6 as a whole has a quadruple structure redundancy.

FIG. 5 is a schematic sectional view showing a fourth embodiment of the thin film semiconductor device according to the present invention. In the present embodiment, of the upper layer signal wiring that intersects with the lower layer gate wiring,
The middle part delimited by each intersection is given redundancy by a multiple structure. Further, in the multiplex structure of the signal wiring, the main conductor layer is made of a metal film, while the sub-conductor layer is made of a conductive film which is patterned separately from the gate wiring and is located below the metal film. First, as shown in (A), the gate wiring 3 is patterned on the insulating substrate 1 made of glass or the like. At the same time, the conductive film 3a is separated from the gate electrode 3 and patterned into a predetermined shape. The conductive film 3a and the gate wiring 3 belong to the same conductor layer. This conductive film 3a is patterned so as to have the same shape as the pattern of the signal wiring except for the intersection of the gate wiring / signal wiring. Next, a gate insulating film 4 is formed by CVD so as to cover the gate wiring 3 and the conductive film 3a. A semiconductor film 5 made of polysilicon or the like is formed thereon by CVD. This semiconductor film 5 is a source region of a thin film transistor /
It is used for the drain region, and impurities are implanted at a high concentration by, for example, ion doping.

Next, as shown in (B), the semiconductor film having the lowered resistance is patterned in an island shape in accordance with the element region of the thin film transistor. At the same time, in this embodiment, the semiconductor film 5 is entirely removed from the wiring region by etching in this embodiment. That is, in this embodiment, the semiconductor film is not used as the sub-conductor layer having any multiple structure. Therefore, the gate insulating film 4
An interlayer insulating film 7 is directly formed on the above. A contact hole 8 is opened in the gate insulating film 4 and the interlayer insulating film 7 which are overlaid on each other by etching. After that, a metal film such as aluminum is formed on the interlayer insulating film 7, and processed into the signal wiring 6 through a photolithography process and an etching process. As a result, the signal line 6 and the lower conductive film 3a are electrically connected to each other through the contact hole 8, and a multiple structure of the signal line having a desired redundancy is provided in an intermediate portion divided by each intersection. Since the total length of the intermediate portion is relatively long, there has been a possibility that the conventional wire breakage failure may occur. On the other hand, in the present invention, even if the metal film to be the main conductor layer is broken in the patterning process of the signal wiring 6 or in the subsequent process, the conductive film 3a located below the interlayer insulating film 7 and the gate insulating film 4 is not removed. It functions as a sub conductor layer and transmits signals. Therefore, it does not appear as a circuit defect.

FIG. 6 is a schematic process diagram showing a fifth embodiment of the thin film semiconductor device according to the present invention. Similar to the fourth embodiment shown in FIG. 5, among the signal wirings in the upper layer intersecting with the gate wirings in the lower layer, the intermediate portion partitioned by each intersection is given redundancy by the multiple structure. First, as shown in (A), the gate wiring 3 is patterned on the insulating substrate 1 made of glass or the like. Further, a gate insulating film 4 is formed so as to cover the gate wiring 3. A semiconductor film 5 made of polycrystalline silicon or the like is formed on the entire surface of the film. When impurities are implanted into the source region / drain region of the thin film transistor by ion doping or the like, the semiconductor film 5 is simultaneously implanted with the impurities and converted into n + polycrystalline silicon. As a result, sufficient conductivity is imparted to the wiring layer.

Next, as shown in (B), the semiconductor film 5 is patterned at the same time as the thin film transistor island process, and is etched so as to have the same shape as the signal wiring pattern except for the intersection of the gate wiring / signal wiring. .

As shown in (C), the patterned semiconductor film 5 is covered with an interlayer insulating film 7. Contact holes 8 reaching the semiconductor film 5 are opened at appropriate intervals in the interlayer insulating film 7. After forming a metal film such as aluminum on the interlayer insulating film 7, the signal wiring 6 is processed through a photolithography process and an etching process. As a result, the signal wiring 6 is electrically connected to the lower semiconductor film 5 through the contact hole 8. In this way, the signal wiring 6 does not have a single-layer structure, but has a multiple structure in which the metal film and the semiconductor film 5 are connected to each other through the contact hole opened in the interlayer insulating film 7, thereby making it practical. Sufficient measures against disconnection are taken.

Finally, FIG. 7 is a schematic perspective view showing an example of an active matrix liquid crystal display device assembled by using the thin film semiconductor device according to the present invention as a circuit board.
As shown in the figure, the present liquid crystal display device has a panel structure including a circuit board 101, a counter substrate 102, and a liquid crystal 103 held between them. The screen portion 10 is provided on the circuit board 101.
4 and the peripheral drive circuit section are formed integrally. The peripheral drive circuit section includes a vertical drive circuit 105 and a horizontal drive circuit 106. Further, a terminal portion 107 for external connection is formed on the upper end of the peripheral portion of the circuit board 101. Terminal part 107
Is connected to the vertical drive circuit 105 and the horizontal drive circuit 106 via the wiring 108. The screen portion 104 includes gate wirings 109 and signal wirings 110 that intersect in a matrix. A pixel electrode 111 and a switching element 112 that drives the pixel electrode 111 are formed at each intersection. The switching element 112 and the peripheral drive circuit section are composed of thin film transistors. The gate wiring 109 is the vertical drive circuit 10.
5 and the signal wiring 110 is connected to the horizontal drive circuit 106. The drain region of the thin film transistor forming the switching element 112 is connected to the corresponding pixel electrode 111, the source region is connected to the corresponding signal line 110, and the gate electrode is continuous to the corresponding gate line 109. As illustrated, the gate wiring 109 and the signal wiring 11
0 intersects. At least some of these wirings have a multiple structure according to the present invention to provide redundancy. For example, the crossing portion of the column-shaped signal wiring 110 that intersects with the gate wiring 109 in the lower layer is given redundancy by a multiple structure. Alternatively, the lower gate wiring 109
Of the signal wiring 110 in the upper layer that intersects with each other, the intermediate portion partitioned by each intersection is provided with redundancy by the multiple structure. Although not particularly shown, each drive circuit 105, 1
Even in 06, a redundant structure is ensured by adopting a multiple structure in a required wiring portion.

[0024]

As described above, according to the present invention, for example, since the signal wiring has redundancy due to the multiple structure at the intersection of the gate wiring / signal wiring, the occurrence rate of disconnection failure is low. There is an effect that. Further, not only the signal wiring but also the required wiring portion has a multi-layered structure, whereby redundancy can be secured and a failure rate due to disconnection can be suppressed to a low level. As described above, when the thin film semiconductor device according to the present invention is applied to, for example, an active matrix liquid crystal display device, it is possible to prevent line defects and the like in the screen section. Further, it is possible to prevent malfunction of the peripheral drive circuit unit, and it is possible to drastically reduce malfunctions such as display failure.

[Brief description of the drawings]

FIG. 1 is a schematic partial cross-sectional view showing a first embodiment of a thin film semiconductor device according to the present invention.

FIG. 2 is a process drawing showing the manufacturing method of the first embodiment shown in FIG.

FIG. 3 is a schematic partial cross-sectional view showing a second embodiment of a thin film semiconductor device according to the present invention.

FIG. 4 is a schematic partial sectional view showing a third embodiment of a thin film semiconductor device according to the present invention.

FIG. 5 is a process drawing showing a fourth embodiment of the thin-film semiconductor device according to the present invention.

FIG. 6 is a process drawing showing the fifth embodiment of the thin-film semiconductor device according to the present invention.

FIG. 7 is a perspective view showing an example of an active matrix liquid crystal display device assembled by using the thin film semiconductor device according to the present invention as a circuit board.

[Explanation of symbols]

 1 Insulating Substrate 2 Thin Film Transistor 3 Gate Wiring 3g Gate Electrode 4 Gate Insulating Film 5 Semiconductor Film 6 Signal Wiring 7 Interlayer Insulating Film 8 Contact Hole 9 Interlayer Insulating Film 10 Pixel Electrode 11 Black Mask

Claims (8)

[Claims] 1. A thin film transistor, which is electrically connected by a plurality of wirings including a signal wiring and a gate wiring and has source / drain regions, is integrally formed on an insulating substrate,
A thin film semiconductor device in which a plurality of conductor layers assigned to each wiring and source / drain regions are electrically separated from each other through an interlayer insulating film, and at least one kind of wiring partially uses a plurality of conductor layers. The main conductor layer originally assigned to the wiring and the sub-conductor layer originally assigned to a portion other than the wiring are interposed through contact holes opened in the interlayer insulating film. A thin film semiconductor device having redundancy connected to each other. 2. The thin film semiconductor device according to claim 1, wherein the crossing portion of the signal wiring of the upper layer intersecting the gate wiring of the lower layer is provided with redundancy by the multiple structure. 3. The thin film semiconductor according to claim 1, wherein an intermediate portion of the signal wiring of the upper layer intersecting the gate wiring of the lower layer, which is divided by each intersection, is provided with redundancy by the multiple structure. apparatus. 4. The signal wiring has the multiple structure, a main conductor layer of which is made of a metal film, and a sub conductor layer of which is patterned separately from the source / drain regions and which is a layer below the metal film. 2. The thin film semiconductor device according to claim 1, wherein the thin film semiconductor device is formed of an impurity semiconductor film located at. 5. The signal wiring has the multiple structure, the main conductor layer of which is made of a metal film, while the sub-conductor layer is patterned separately from the gate wiring and is located below the metal film. The thin film semiconductor device according to claim 1, wherein the thin film semiconductor device comprises a conductive film. 6. The signal wiring has the multiple structure, the main conductor layer of which is made of a metal film, while the sub conductor layer of which is patterned separately from the pixel electrode and which is located above the metal film. The thin film semiconductor device according to claim 1, wherein the thin film semiconductor device is formed of a transparent conductive film, and the pixel electrode is connected to the thin film transistor through an interlayer insulating film. 7. The signal wiring has the multiple structure, the main conductor layer of which is made of a metal film, and the sub conductor layer of which is patterned separately from a black mask which shields the thin film transistor, and the metal film. The thin film semiconductor device according to claim 1, wherein the thin film semiconductor device is composed of a light-shielding film located in an upper layer. 8. A circuit board on which a pixel electrode, a thin film transistor which constitutes a switching element for driving the pixel electrode, and a thin film transistor which constitutes a peripheral driving circuit for driving the switching element are integrally formed, and a predetermined gap is provided on the circuit substrate. What is claimed is: 1. An active matrix liquid crystal display device comprising: a counter substrate, which is bonded to the counter electrode, and a liquid crystal held in the gap, the circuit being electrically connected by a plurality of lines including a signal line and a gate line. A thin film transistor having a source / drain region is integrally formed on a circuit board, and a plurality of conductor layers assigned to each wiring and the source / drain region are electrically separated from each other via an interlayer insulating film. The wiring has a multiple structure that partially uses multiple conductor layers, and is originally assigned to the wiring. The active matrix is characterized in that the main conductor layer and the sub-conductor layer originally assigned to other than the wiring are mutually connected through a contact hole opened in an interlayer insulating film interposed therebetween to provide redundancy. Liquid crystal display device.