JPH09129119A - Electron emitting element and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To simplify a structure and simplify the manufacturing process for application to a flat panel display. SOLUTION: A three-layer structural body pinched with an insulating layer 53 between a lower electrode layer 52 and an upper electrode layer 54 is arranged on a glass substrate 51, a conical vertical hole having the depth at least to the lower electrode layer 52 from the upper face is formed on the three-layer structural body, and an electron emitting film 55 having an electron emitting function via excitation is formed on the wall face section of the vertical hole. When the electric field is applied between the electrodes 52, 54, surface conduction type electron emission occurs from the surface of the electron emitting film 55, and electrons fly to an opposite substrate 20. The conical vertical hole can be formed when the sand blast method is applied to the surface of the upper electrode layer 54. When this element is arranged in the matrix state on a glass substrate 51, the lower electrode layer 52 and the upper electrode layer 54 can be utilized as driving wiring layers as they are.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electron-emitting device, and more particularly, to a surface conduction electron-emitting device.

[0002]

2. Description of the Related Art As a kind of flat panel display, FED (Field Emission Display) has been energetically studied. In this FED, a cathode substrate and an anode substrate are opposed to each other, a number of electron-emitting devices are arranged on the cathode substrate, electrons are emitted from the electron-emitting devices toward the anode substrate, and a phosphor layer on the anode substrate is formed. It emits light. The electron-emitting devices formed on the cathode substrate correspond to individual pixels. The electron-emitting devices used so far generally have a sharp projection structure suitable for electron emission. For example, an electron-emitting device made of a conical metal with a sharp tip is widely used. I have.

On the other hand, in recent years, surface conduction electron-emitting devices have been receiving attention. This is an electron-emitting device utilizing a phenomenon in which an electron is emitted when a current flows through a thin film having a small area formed on a substrate in parallel with the film surface.
Such an electron emission phenomenon was described in 1965 in “Radio Engineering Electrophysics (Radio Eng.
Electron. Phys.) Volume 10, 1290-1296 "
Since then, by MI Elinson et al., Various reports have been made to date. Specifically, this surface conduction type electron emission phenomenon has been reported for SnO ₂ (Sb) thin film developed by Erinson et al., Au thin film, ITO thin film, carbon thin film and the like.

Further, recently, Japanese Patent Publication No. 6-101297
Japanese Patent Application Laid-Open No. 6-87392 discloses a technology for forming this surface conduction type electron-emitting device using an insulating layer sandwiching a surface in which fine particles are dispersed. There is disclosed a method of manufacturing an electron-emitting device having a surface conduction electron-emitting function by applying electric heating to a conductor film.

[0005]

As described above, a surface conduction electron-emitting device is expected to be used for a flat panel display such as an FED, and when applied to such a display, It is necessary to arrange a large number of devices in a matrix on a substrate so that electron emission from each device can be controlled independently. The first problem to be solved when driving a large number of electron-emitting devices arranged in a matrix in this way is to make the characteristics of the individual devices uniform. That is, in the conventional surface conduction electron-emitting device, an electron-emitting film having a small area is formed on the substrate, and electrodes for supplying current are formed on both sides of this electron-emitting film. Then, an electric current flows through the film surface of the electron emission film existing between the pair of electrodes to cause electron emission. Therefore, if the distance between both electrodes varies from element to element, the characteristics of each element become non-uniform. In other words, even if the same voltage is applied, the amount of emitted electrons differs for each element. In this way, if the characteristics of the electron-emitting devices that make up one flat panel display are non-uniform, the display state of the screen becomes uneven, and a high-quality display can no longer be realized. For this reason, high accuracy is required for the interval between the electrodes forming each electron-emitting device. However, in order to secure such high position accuracy, a high level alignment technique is required, and the manufacturing cost cannot help rising.

The second problem for application to a display is to simplify the wiring required for driving as much as possible. As described above, in order to independently control a large number of electron-emitting devices arranged in rows and columns, wiring is provided on the substrate in a vertical and horizontal direction, and by controlling voltages to these wirings, individual It must be possible to control the electron emission from the device. However, in order to provide such wiring to the conventional electron-emitting device,
It is necessary to form a considerably complicated three-dimensional wiring layer on the substrate, and the manufacturing process is inevitably complicated. For this reason, the production cost also rises.

Therefore, an object of the present invention is to provide an electron-emitting device capable of simplifying the manufacturing process by simplifying the entire structure as much as possible even when a large number of devices are arranged and used on the same substrate. To do.

[0008]

[Means for Solving the Problems]

(1) A first aspect of the present invention is an electron-emitting device,
A three-layer structure including an insulating layer sandwiched between a lower electrode layer and an upper electrode layer is arranged on a substrate, and a vertical hole having a depth from the upper surface to at least the lower electrode layer is formed on the three-layer structure. An electron emission film having a function of emitting electrons by energization is formed on the wall surface of the vertical hole.

(2) The second aspect of the present invention is the above-mentioned first aspect.
In the electron-emitting device according to the above aspect, a vertical hole having a depth that penetrates the three-layer structure and reaches the substrate is formed.

(3) A third aspect of the present invention is the above-mentioned first aspect.
Alternatively, in the electron-emitting device according to the second aspect, a deep-blocking vertical hole is formed so that the opening area becomes smaller at a deeper portion.

(4) The fourth aspect of the present invention is the above-mentioned first aspect.
In the electron-emitting device according to the third aspect, a plurality of lower electrode layers extending in the column direction are arranged in the row direction, and a plurality of upper electrode layers extending in the row direction are arranged in the column direction. A structure in which an insulating layer is sandwiched between the electrode layers at the intersection with the electrode layer, a three-layer structure is formed at each intersection, and a vertical hole and an electron emission film are formed in each three-layer structure. Is.

(5) The fifth aspect of the present invention relates to the above-described fourth aspect.
In the electron-emitting device according to the aspect, the upper electrode layer is formed on the substrate via the insulating layer, and the three-layer structure is formed in the intersection of the upper electrode layer and the lower electrode layer in the formation region of the upper electrode layer. The two-layer structure including the upper electrode layer and the insulating layer is formed in the other portions.

(6) The sixth aspect of the present invention is the above-mentioned first aspect.
~ In the method of manufacturing an electron-emitting device according to the fifth aspect, the first preparation layer is formed on an insulating substrate, and the first preparation layer is formed.
Forming a lower electrode layer by patterning the preparation layer of, forming an insulating intermediate layer on the substrate and the lower electrode layer, and forming a second preparation layer on the intermediate layer;
Patterning the second preparation layer to form an upper electrode layer; patterning an intermediate layer to form an insulating layer; and an upper surface of a three-layer structure including a lower electrode layer, an insulating layer, and an upper electrode layer. From the above, a step of forming a vertical hole having a depth reaching at least the lower electrode layer and a step of forming an electron emission film having a function of emitting electrons by energization on the wall surface of the vertical hole are performed. It is a thing.

(7) A seventh aspect of the present invention is the above-mentioned first aspect.
~ In the method for manufacturing an electron-emitting device according to the fifth aspect, the vertical holes are formed by a cutting step by etching or sandblasting.

(8) An eighth aspect of the present invention relates to the above-mentioned fourth aspect.
In the method for manufacturing an electron-emitting device according to the aspect, the lower electrode layer extending in the column direction, the upper electrode layer extending in the row direction, and the insulating layer between both electrode layers are formed on the substrate, and then the entire surface of the substrate is formed. Form a negative resist layer on, and perform back exposure by irradiating light from the lower side of the substrate, and at the time of this back exposure,
The irradiation light intensity and irradiation time are set so that only the intersection of both electrode layers becomes the non-exposed portion due to the phenomenon of light wrapping around to the upper surface side of the lower electrode layer and the upper electrode layer, and the resist layer is exposed after the exposure. By developing, the non-exposed portion is removed, an opening is formed in the resist layer at the intersection, and a vertical hole is formed using this opening.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below based on an embodiment shown in the drawings.

[0017]§1. The structure of the conventional electron-emitting device and
Operating principle  First, of the conventional general surface conduction electron-emitting device
The structure and operation principle will be described. Figure 1 is a conventional table
Structure of surface conduction electron-emitting device 10 and counter substrate 20
FIG. In this example, the electron-emitting device 10
Forms the electrodes 12 and 13 on the glass substrate 11, and further
It is constructed by forming an electron emission film 14 on it.
ing. The electron emission film 14 functions as a cathode electrode.
For example, SnO₂, In₂O₃, Pb
Metal oxides such as O, metals such as Au and Ag, carbon
Other known semiconductors such as surface conduction electron emission phenomena
What kind of material can be used if it is a known material?
Don't turn On the other hand, the counter substrate 20 is placed on the glass substrate 21.
A transparent electrode 22 and a phosphor layer 23 are formed.
You. The transparent electrode 22 is made of a material such as ITO.
And functions as an anode electrode.

FIG. 2 is a top view of the components formed on the glass substrate 11 in the electron-emitting device 10 shown in FIG. 1, and the cross section taken along the section line 1-1 in this figure is shown in FIG. It will be. The state in which the electrodes 12 and 13 face each other at a predetermined interval and the electron emission film 14 is formed therebetween is clearly shown.

Now, let us consider the phenomenon that occurs when wiring is provided to each part as shown in FIG. According to this wiring, the electrode 13 is grounded, and a negative voltage is applied to the electrode 12 from the power supply 31. The cathode / anode voltage is also applied between the electron-emitting device 10 and the counter substrate 20 by the power source 32. In the state shown in FIG. 1, however, the switch 33 is open, so that the voltage is not applied. I haven't been. Now, when a voltage is applied to both sides of the electron emission film 14 by the electrodes 12 and 13, electron emission occurs as shown by arrows in the figure on the surface of the electron emission film 14. This is a phenomenon known as surface conduction electron emission.

Here, the switch 33 is closed and the cathode /
When the voltage between the anodes is applied, the electrons emitted to the surface of the electron emission film 14 will fly to the counter substrate 20 on the anode side, as shown in FIG. The collision of electrons toward each other causes the phosphor layer 23 to emit fluorescence. Here, for convenience of explanation, only the components for one pixel are shown.
By arranging components for pixels in a matrix in a matrix, a flat panel display in which pixels are arranged on a two-dimensional plane can be realized. In such a flat panel display, it is general that the switch 33 is kept closed and the voltage applied from the power source 31 is adjusted for each pixel to control the light emitting state of each pixel. More specifically, by adjusting the value of the voltage applied to the electron emission film 14 and the application time, it is possible to control the amount of electrons flying to the counter substrate 20 side.

As described above, the technical problems in manufacturing a flat panel display using the electron-emitting device 10 are to make the characteristics of individual devices uniform and to simplify the driving wiring. Is. The variation in characteristics of each element mainly depends on the dimensional accuracy. FIG. 4 is a diagram showing the dimensions of the main part of the electron-emitting device 10. In the case of a general flat panel display, the dimensions of each part shown here are, for example, D1 = 15 μm and D2 = 80.
The values are of the order of μm, D3 = 0.2 μm, D4 = 0.5 μm (of course, these numerical values are shown as an example, and specific numerical values differ depending on individual displays). Of these dimensions, the dimension that particularly affects the device characteristics is the distance D between the electrodes 12 and 13.
It is one. The distance D1 governs the electric field strength applied to the electron emission film 14, and if the distance D1 changes, the amount of emitted electrons also changes. Therefore, in order to realize a display having uniform display characteristics over the entire surface, it is necessary to make the dimensions D1 of the individual electron-emitting devices arranged on the glass substrate 11 uniform. Therefore, in the actual manufacturing process, for example, D1 =
A predetermined dimensional accuracy of 15 μm ± 2 μm is required, and a highly accurate patterning process is required. This causes a rise in manufacturing cost, which is a major obstacle to practical use. Particularly, in the future, the demand for low-power drive type displays tends to increase more and more, and the absolute value of the interval D1 has to be set smaller and smaller.
It is expected that higher dimensional accuracy will be required.

Further, the problem of simplifying the drive wiring is
This is a difficult problem to solve in the electron-emitting device having the conventional structure. In FIGS. 1 and 3, the wiring for the electron-emitting device for one pixel is shown. However, when it is used for a display, it is provided for each of a large number of electron-emitting devices arranged vertically and horizontally on the glass substrate 11. Independent wiring is applied,
The voltage applied to the electron emission film 14 must be controlled independently for each electron emission element. In order to provide such wiring on the glass substrate 11, many patterning processes are required, and the manufacturing process must be complicated. This is also one of the factors that increase the manufacturing cost, and is an obstacle to practical use.

§2. The structure and structure of the electron-emitting device of the present invention
In accordance with the conventional structure, the electron emission film 14 is formed as a film parallel to the glass substrate 11. This is a very general method to meet the demand of "forming a thin film on a substrate". On the other hand, the structure of the present invention is characterized in that a vertical hole is formed in the three-layer structure formed on the glass substrate 11 and an electron emission film is formed on the wall surface of the vertical hole.

Now, a three-layer structure as shown in the perspective view of FIG. 5A is prepared on the substrate (the substrate is not shown in FIG. 5). This three-layer structure is a structure in which an insulating layer 53 is sandwiched between a lower electrode layer 52 and an upper electrode layer 54, and has a so-called "sandwich structure". Such a three-layer structure is prepared, a vertical hole C1 having a depth from the upper surface to the lower electrode layer 52 is formed, and a wall surface portion of the vertical hole is formed.
Electron emission film 55 having a function of emitting electrons by energization
By forming the structure, a structure as shown in the perspective view of FIG. The structure of the vertical hole C1 and the formation state of the electron emission film 55 are clearly shown in the sectional view of FIG. Fig. 6 (a)
6 shows a state in which a vertical hole C1 is formed in the three-layer structure, and FIG.
(b) shows a state in which the electron emission film 55 is formed on the wall surface of the vertical hole C1. The vertical hole C1 shown in FIG. 6 is a deep-closing vertical hole in which the opening area becomes smaller toward the deeper portion, and is a so-called “mortar-shaped” vertical hole.

In the perspective view shown in FIG. 5, the same hatching as in the sectional view shown in FIG. 6 is applied, but this hatching is not for showing the cross section, and individual constituent elements can be easily identified. To do so. In the drawings of the present application, each component is hatched as necessary even in the perspective view as described above.

The cross-sectional view of FIG. 7 shows an embodiment in which a vertical hole C2 having a depth that penetrates the three-layer structure and reaches the substrate is formed. FIG. 7A shows a state in which the vertical hole C2 is formed in the three-layer structure, and FIG. 7B shows a state in which the electron emission film 56 is formed on the wall surface of the vertical hole C2. Vertical hole C shown in FIG. 7
Reference numeral 2 is also a vertical hole having a deep-closing property such that the opening area becomes smaller at the deeper portion, which is a so-called “mortar-shaped” vertical hole, but the vertical hole C1 shown in FIG. 6 has a depth only up to the lower electrode layer 52. In contrast, the vertical hole C2 shown in FIG. 7 has a depth reaching the upper part of the glass substrate 51. Since the vertical hole in the present invention need only have a depth reaching at least the lower electrode layer 52, as in the example shown in FIG.
The vertical hole C2 having a depth reaching the glass substrate 51 may be formed. However, it is not preferable to form a vertical hole that is deep enough to penetrate the glass substrate 51, because this will hinder the manufacturing process.

The structure in which the vertical hole is formed in the three-layer structure and the electron emission film 55 is formed on the wall surface thereof functions as an electron emission element. For example, comparing the electron-emitting device 50 shown in FIG. 6 (b) with the conventional electron-emitting device shown in FIG. 3, the lower electrode layer 52 functions as the electrode 12, and the upper electrode layer 54 functions as the electrode 13. Function of
The electron emission film 55 functions as the electron emission film 14. In addition, the insulating layer 53 includes the electrodes 12 and 13
It plays a role as a spacer for maintaining the accuracy of the space between the and.

Now, with respect to the electron-emitting device 50 having such a structure, let us consider a phenomenon that occurs when wiring is provided in each part as shown in FIG. With this wiring, the upper electrode layer 54 is grounded, and a negative voltage is applied to the lower electrode layer 52 from the power supply 31. Further, the cathode / anode voltage is also applied between the electron-emitting device 50 and the counter substrate 20 by the power supply 32, but in the state shown in FIG. 8, the switch 33 is open, so that the voltage is not applied. I haven't been. Now, when a voltage is applied between the bottom portion / upper edge portion of the electron emission film 55 by the lower electrode layer 52 and the upper electrode layer 54, the film surface portion of the electron emission film 55 is
Electron emission occurs as shown by the arrow in the figure. That is,
A surface conduction type electron emission phenomenon will occur.

Here, the switch 33 is closed and the cathode /
When the voltage between the anodes is applied, as shown in FIG. 9, the electrons emitted to the surface of the electron emission film 55 fly to the counter substrate 20 on the anode side, and from such a cathode to the anode. The collision of electrons toward each other causes the phosphor layer 23 to emit fluorescence. Here, for the sake of convenience of description, only one pixel component is shown.
By arranging components for pixels in a matrix in a matrix, a flat panel display in which pixels are arranged on a two-dimensional plane can be realized. In practice, as in the conventional flat panel display using electron-emitting devices, the voltage applied from the power supply 31 is adjusted for each pixel while the switch 33 remains closed to change the light emission state for each pixel. Can be controlled.

In the example shown here, as shown in FIG. 8, by applying a negative voltage to the lower electrode layer 52 side,
On the surface of the electron emission film 55, a flow of electrons from the bottom portion to the upper edge portion is formed, but conversely, by applying a negative voltage to the upper electrode layer 54 side, the electron emission film 55 Even if a flow of electrons from the upper edge portion to the bottom portion is formed on the surface, electron emission to the counter substrate 20 side is performed without any trouble. Therefore, the lower electrode layer 52
The polarity of the applied voltage between the upper electrode layer 54 and the upper electrode layer 54 may be either.

FIG. 10 is a diagram showing the dimensions of the main part of the electron-emitting device 50. The thickness D1 of the insulating layer 53 is practically set to D1 = about 0.1 μm to 1 mm, more preferably about 1 μm to 50 μm. In addition, the lower electrode layer 52 and the upper electrode layer 54
As the thicknesses D2 and D3 of the PDP, D2, D3 = 0.
01 μm to 1 mm, more preferably 1 μm to 30
It is preferable to set it to about μm. The diameter D4 at the upper edge of the vertical hole C1 may be any value within the range of the width D5 of the three-layer structure, but if it is too small, effective electron emission cannot be obtained. Body width D
It is preferable to set the value close to 5. Width D of three-layer structure
5 may be arbitrary in consideration of the operation of electron emission, but since the three-layer structure itself acts as a capacitive element, in order to suppress the parasitic capacitance value of the element itself to improve the response speed, It is preferable to make it as small as possible, and practically, it is preferable to set D5 = about 10 μm to 100 μm. Accordingly, the diameter D4 at the upper edge of the vertical hole C1 is preferably set to D4 = about 10 μm to 100 μm. Further, the thickness D6 of the electron emission film 55 needs to be a thickness at which a surface conduction type electron emission phenomenon occurs, and it is desirable that the thickness D6 is as thin as possible in order to perform efficient electron emission. Practically, D5 = 0.01 μm
It is preferably set to about 1 μm. The optimum dimensions of the above-mentioned parts are largely dependent on the curvature of the "mortar-shaped" vertical hole C1, and actually, along the surface of the vertical hole C1 from the upper surface position to the lower surface position of the insulating layer 53. It is preferable to set the size of each part so that the distance D7 of the path becomes a value suitable for electron emission. As will be described later, this distance D7 is a distance corresponding to the distance between the electrodes 12 and 13 in the conventional electron-emitting device shown in FIG. 3, and is an important parameter for causing the surface conduction type electron emission phenomenon. .

Now, the structure of the present invention shown in FIG.
Compared with the conventional structure shown in FIG. 4, the dimension D1 which is the distance between the electrodes 12 and 13 in the conventional structure is the thickness dimension D of the insulating layer 53 measured along the vertical hole C1 in the present invention.
It turns out that it corresponds to 7. Here, both the dimension D1 in FIG. 4 and the dimension D7 in FIG. 10 correspond to the dimension between a pair of electrodes for applying an electric field to the electron emission film. The applied electric field strength will be determined. As described above, in order to realize a display having uniform display characteristics over the entire surface, it is necessary to make the inter-electrode dimensions of the individual electron-emitting devices arranged on the glass substrate uniform. is there. Here, focusing on the accuracy of the dimension between electrodes, in the conventional structure shown in FIG. 4, the accuracy is in the plane direction parallel to the substrate surface, whereas in the structure of the present invention shown in FIG. It can be seen that the accuracy is in the vertical thickness direction. That is, if the conventional structure shown in FIG. 4 is called a “horizontal structure” and the structure of the present invention shown in FIG. 10 is called a “vertical structure”, in the case of the “horizontal structure”, the accuracy of the inter-electrode dimension D1 is While it is necessary to ensure the accuracy in the plane direction, in the case of the “vertical structure”, the accuracy of the inter-electrode dimension D7 should be ensured as the accuracy in the thickness direction of the insulating layer 53 (although, It is also necessary to ensure the accuracy of the curvature of the vertical hole C1).

Generally, in a manufacturing process for forming a layer on a substrate such as a semiconductor planar process, it is easier to secure dimensional accuracy in the thickness direction than to secure dimensional accuracy in the plane direction. In other words, as shown in FIG. 4, the step of forming the electrodes 12 and 13 having the accurate predetermined distance D1 and the formation of the insulating layer 53 having the accurate predetermined thickness D1 as shown in FIG. Comparing with the process, the dimension value D
When 1 is the same, the latter process is easier than the former process. In particular, in recent years, the film forming technique on the substrate has made great progress, and it is possible to control the thickness with considerable accuracy. Therefore, the electron-emitting device having the structure of the present invention has advantages that the manufacturing process is easier and the manufacturing cost is reduced as compared with the electron-emitting device having the conventional structure.

§3. Embodiments Applied to Displays Although the structure for a single electron-emitting device has been described above, the electron-emitting device of the present invention is particularly suitable for flat panel display applications. In this case, a large number of electron-emitting devices are used by arranging them vertically and horizontally on a substrate. Hereinafter, such an embodiment will be described.

FIG. 11 is a perspective view showing a state in which four electron-emitting devices 200 are formed on the glass substrate 100.
When applied to a display, one electron-emitting device
Since the display operation for the pixels is performed, in the example shown in FIG. 11, the display for a total of 2 × 2 pixels can be performed. Of course, in an actual display, a larger number of electron-emitting devices will be arranged. In addition, in the perspective view of FIG. 11, the hatching given to each component is not for showing a cross section as mentioned above,
This is to make it easy to identify individual components. The structure of the electron-emitting device shown in FIG. 11 is as follows.

First, a plurality of lower electrode layers 110 extending in the column direction are formed in the row direction on the glass substrate 100 (in this example, 2
Book) Place. On the other hand, the upper electrode layer 130 extending in the row direction
Are arranged in the column direction (two in this example). At this time, the upper electrode layer 130 is formed on the glass substrate 100 via the insulating layer 120. That is, the insulating layer 1
20 plays a role of "bridged" so to speak to the upper electrode layer 130, and the insulating layer 1 which functions as this "bridged" at the intersection with the lower electrode layer 110.
The presence of 20 causes the upper electrode layer 130 to move to the lower electrode layer 11
It becomes a form of straddling 0. In such a structure, after all, a three-layer structure of lower electrode layer 110 / insulating layer 120 / upper electrode layer 130 is formed at the intersection with the lower electrode layer 110 in the formation region of the upper electrode layer 130. In addition, a two-layer structure of the insulating layer 120 / upper electrode layer 130 is formed on the other portions.

However, in principle, the upper electrode layer 130
It is not necessary to form the insulating layer 120 in the entire area below the
The insulating layer 12 is formed at least at the intersection with the lower electrode layer 110.
It suffices to provide 0 to form a three-layer structure. Therefore, for areas other than this intersection,
It is not always necessary to provide the insulating layer 120, and the upper electrode layer 130 may be directly formed on the upper surface of the glass substrate 100. However, in practice,
As shown in FIG. 11, the insulating layer 120 is formed over the entire area below the upper electrode layer 130 so that the upper surface of the upper electrode layer 130 forms a flat surface substantially parallel to the glass substrate 100. It is preferable for avoiding disconnection.

Now, as shown in FIG. 11, a vertical hole having a depth from the upper surface of the upper electrode layer 130 to at least the lower electrode layer 110 is formed in the three-layer structure formed at each intersection. An electron emission film 140 having a function of emitting electrons by energization is formed on the wall surface of the vertical hole. Although the structure of this vertical hole is not sufficiently expressed in the perspective view shown in FIG. 11, vertical holes C1 and C2 having the structure shown in FIG. 6 (b) or FIG. 7 (b) are dug at each intersection. The electron emission film 140 having the same structure as the electron emission films 55 and 56 is formed on the wall surface portion. Therefore, the electron emission film 140 shown in FIG. 11 is not a film formed on a plane but a film formed on the wall surface of a so-called “mortar” vertical hole, and the electron emission film 140 itself is also “mortar-shaped”. It has a shape. With such a configuration, the electron-emitting devices 200 can be formed independently for each intersection.

Now, the important point here is the lower electrode layer 11
0 and the upper electrode layer 130 are formed on the glass substrate 10 respectively.
That is, it can also function as a wiring layer that extends vertically and horizontally on 0. As described above, in order to use the display as a display, it is necessary to provide wiring for individually controlling electron emission for each electron-emitting device arranged in a matrix. In the case of the conventional "horizontal structure" electron-emitting device, it is necessary to separately prepare a layer for such wiring, so that the structure on the substrate becomes very complicated. On the other hand, in the case of the "vertical structure" electron-emitting device of the present invention,
Since the lower electrode layer 110 and the upper electrode layer 130 fulfill the function of wiring, it is not necessary to separately provide a wiring layer. That is, according to the electron-emitting device of the present invention, the problem of simplifying the wiring required for driving can be achieved.

FIG. 12 is a diagram for explaining the driving principle of the electron-emitting device according to the present invention (hatching indicates FIG. 1).
1 for showing the correspondence with each component). Here, an example in which 5 rows and 5 columns, that is, a total of 25 electron-emitting devices 200 are formed is shown. That is, five lower electrode layers 110 extending in the column direction are arranged in the row direction, five upper electrode layers 130 extending in the row direction are arranged in the column direction, and there are 25 intersections. Are formed.
Further, the electron-emitting devices 200 which are independent of each other are formed at the respective intersections, and the electron-emitting devices 200 are formed.
The electron emission from each can be controlled independently.

In order to perform such control, the selector 1
50 and a driver 160 are provided. The selector 150 is one of the five upper electrode layers 130.
Performs the function of selecting a book and grounding it. On the other hand, driver 1
60 has a function of applying a predetermined voltage signal to each of the five lower electrode layers 110. Selector 150 is 5
If the operation of sequentially selecting the upper electrode layer 130 of the book is performed,
It becomes possible to time-divisionally access five rows and sequentially access them. Then, according to the signal supplied from the driver 160,
Electron emission from the electron-emitting device 200 belonging to the row currently being accessed is controlled. For example, as shown in the figure, in a state where the selector 150 selects the first row and is grounded, from the driver 160, the lower electrode layer 110 of the first column is
If a negative voltage is applied to the electron-emitting device in the first row and the first column, the wiring shown in FIG. 9 is formed, and electron emission to the counter substrate 20 occurs.
Such a driving method is a so-called "simple matrix driving".

As described above, according to the present invention, since the lower electrode layer 110 and the upper electrode layer 130 can be used as they are as a wiring layer, the structure becomes very simple even when applied to a display, and the manufacturing process is simplified. The process is also simplified and the manufacturing cost can be reduced.

§4. When applied to a display
The forming step Finally, an example of a manufacturing process for obtaining the structure shown in FIG. 11 will be described with reference to the perspective view shown in FIGS. 13 to 19. In these perspective views as well, hatching for clarifying the correspondence with each component shown in FIG. 11 will be applied.

First, as shown in FIG. 13, the glass substrate 1
A first preparation layer 115 having conductivity is formed on the entire surface of the substrate 00 (which may be any insulating substrate) by using a general film forming method such as a vacuum evaporation method or a sputtering method. Subsequently, the first preparatory layer 115 is patterned to form the pattern shown in FIG.
As shown in FIG. 4, the lower electrode layer 110 is formed. For patterning the first preparation layer 115, general photolithography and etching techniques may be used.
Alternatively, a sandblast method may be used instead of etching. However, as the first preparation layer 115,
It is not always necessary to use a conductive layer at that time. For example, a metal particle-dispersed resist (so-called metal paste) obtained by dispersing metal fine particles in a photosensitive resin is applied on the glass substrate 100 to form a photosensitive paste layer, and this paste layer is 1 preparation layer 115
Then, by a photolithography method, this paste layer is developed and patterned after exposure, and finally a baking step is performed to remove the resin component in the paste layer.
The lower electrode layer 110 having conductivity can be obtained.
The photosensitive paste layer may be formed of an organic metal mixed resist which is a mixture of a photosensitive resin and an organic metal.

Subsequently, an insulating intermediate layer 125 is formed on the entire surface of the glass substrate 100 and the lower electrode layer 110, as shown in FIG. Further, as shown in FIG. 16, a second preparation layer 135 is formed on this intermediate layer 125.
As the second preparation layer 135, the first preparation layer 115
Similarly to the above, a conductive layer may be used, or the above-mentioned photosensitive paste layer may be used. Then, patterning is performed on the second preparation layer 135, and subsequently, the intermediate layer 1
25, the insulating layer 120 and the upper electrode layer 13 having conductivity are patterned as shown in FIG.
Form 0. The insulating layer 120 and the upper electrode layer 13
For patterning to form 0, general photolithography and etching techniques may be used. Alternatively, a sandblast method may be used instead of etching. Also, as described above, a paste layer can be used, and in this case, firing is further performed.

Of course, the patterning step of forming the insulating layer 120 and the patterning step of forming the upper electrode layer 130 may be performed separately. For example, as shown in FIG. 15, after the intermediate layer 125 is formed, the intermediate layer 125 is formed.
Is patterned to form the insulating layer 120, and then the second preparation layer 135 is formed on the entire surface of the substrate.
It is also possible to obtain the structure shown in FIG. 17 by patterning the preparatory layer 135 to form the upper electrode layer 130.

Thus, a three-layer structure including the lower electrode layer 110, the insulating layer 120, and the upper electrode layer 130 can be formed at the intersection of the lower electrode layer 110 and the upper electrode layer 130. Subsequently, as shown in FIG. 18, a vertical hole C having a depth reaching at least the lower electrode layer 110 from the upper surface of the three-layer structure, that is, the upper surface of the upper electrode layer 130 is dug. As the step of digging the vertical hole C, any processing step may be performed. For example, by performing photolithography and isotropic etching, or performing a cutting process by photolithography and sandblasting, it is possible to form the “mortar-shaped” vertical hole C. That is, after the structure shown in FIG. 17 is obtained on the glass substrate 100, a resist layer is formed on the entire surface of the substrate.
Then, a mask in which a circular pattern is arranged at a position corresponding to each intersection is prepared, and exposure is performed using this mask. When the resist layer is developed, a circular opening is formed at each intersection, and the upper surface of the upper electrode layer 130 is exposed from the circular opening while the entire surface is covered with the resist layer. . Therefore, if a predetermined etching liquid is applied from this exposed portion to perform isotropic etching, or if fine particles are sprayed onto this exposed portion and a cutting process by the sandblast method is performed, a "mortar-shaped" vertical hole C is formed.
Is formed. After that, if the resist layer on the surface is removed, the structure shown in FIG. 18 is obtained.

By the way, the present inventor has devised a very unique exposure method in the above-mentioned photolithography method, instead of exposing a circular pattern on a resist layer using a mask. In this exposure method, so-called backside exposure is performed by irradiating light from below the glass substrate 100 without using a mask. Although the glass substrate 100 has a light-transmitting property, since the lower electrode layer 110, the insulating layer 120, and the upper electrode layer 130 formed thereon have a light-shielding property,
The resist layer formed on the entire surface of the substrate is divided into a non-exposed portion shaded by each of these layers and an exposed portion other than that. Therefore, if back exposure is performed on the structure shown in FIG. 17, basically, a cross-shaped pattern (a crossing pattern of the lower electrode layer 110 and the upper electrode layer 130) as a non-exposed portion is formed in the resist layer. Will be formed.

However, when the intensity of the light emitted from below the glass substrate 100 is increased to some extent, the "behavior of the wave" of the light appears, and the light reaches around the shadow of the light-shielding object. For example, in FIG. 17, the light from the back surface also goes around both edges of the lower electrode layer 110 and both edges of the upper electrode layer 130. Then, if the intensity of the irradiation light is further increased or the irradiation time is further lengthened, the lower electrode layer 110 and the upper electrode layer 130 are formed.
Almost all the shadow of the resist layer that covers the glass substrate 100 is exposed. However, the portion where such a light wraparound phenomenon is least likely to occur is the intersection portion. This intersection is the lower electrode layer 1
This is a portion that is a shadow of both 10 and the upper electrode layer 130, and is a portion that remains without being exposed to the end even if the intensity of irradiation light is increased.

By utilizing such a phenomenon, it is possible to form a pattern required for forming vertical holes without using a mask. That is, by appropriately setting the irradiation light intensity and irradiation time for the backside exposure, the lower electrode layer 110 and the upper electrode layer 13
It is possible to realize a state in which only the resist layer located at the intersection with 0 remains without being exposed and all other portions are exposed. Therefore, if a negative resist in which the exposed portion is hardened and the non-exposed portion is removed by development is used as the resist layer, the opening can be formed only at the position corresponding to the intersection of the resist layers. In this method, it is necessary to obtain the optimum values of the irradiation light intensity and irradiation time for the backside exposure, but since no mask is required, techniques such as alignment are not needed. Pattern formation by so-called "self-alignment" becomes possible.

Finally, if an electron emission film 140 having a function of emitting electrons by energization is formed on the wall surface of the vertical hole C, an electron emission device as shown in FIG. 19 can be obtained (FIG. 19). In the perspective view of FIG. 1, the electron emission film 140 looks like a plane, but actually, it is not a plane but “a mortar shape”.
You are doing). In the step of forming the electron emission film 140, for example, a solvent prepared by dissolving a material in which a surface conduction electron emission phenomenon occurs in an organic solvent is prepared,
A method of applying this solvent to the wall surface of the vertical hole C and drying it can be adopted.

§5. Other Modifications Although the present invention has been described based on some embodiments, the present invention is not limited to these embodiments and can be implemented in various other forms. Hereinafter, some modified examples will be described.

In the above-described embodiment, the "mortar-shaped" vertical hole is formed in the three-layer structure, but the vertical hole to be formed does not necessarily have to be "mortar-shaped", and the opening area of both the shallow portion and the deep portion is large. May have the same shape (for example, a cylindrical shape), or may have any other shape. The etching for forming the vertical hole is not limited to the "isotropic etching" described in the above embodiment, and various methods such as "reactive etching" can be adopted.

According to the structure shown in FIG. 11, the insulating layer 120
Is formed along the upper electrode layer 130 and plays a role as a bridge so to speak, but conversely, the insulating layer 12 is formed.
0 may be formed along the lower electrode layer 110, and the entire lower electrode layer 110 may be covered with a so-called “buckwheat type” insulating layer 120. In other words, the lower electrode layer 11
A tubular insulating layer 120 extending in the column direction is formed so as to cover the upper surface and the side surface of 0, and a structure in which the tubular insulating layer 120 penetrates the upper electrode layer 130 like a tunnel is obtained. . In short, in the present invention,
Any structure may be used as long as a three-layer structure of lower electrode layer / insulating layer / upper electrode layer is formed and a vertical hole is formed in the three-layer structure.

[0055]

【Example】

<Example of Material> As the material of each part of the structure shown in FIG. 6 (b), the following materials are preferably used.

Lower electrode layer 52 and upper electrode layer 54: Any conductive material that functions as an electrode may be used, but it is required to have withstand voltage, heat resistance, workability, corrosion resistance, and specific resistance. It is preferable to select an appropriate material in consideration. Specifically, Al, Ni, Pd, Pb, Pt, W, Mo, C
It is preferable to use a metal material such as r, Ti, Cu, Au, and Ag.

Insulating layer 53: In particular, it is preferable to use a material having low surface conductivity, specifically, quartz glass, Si.
It is preferable to use O ₂ , Si ₃ N _4, or the like.

Electron emission film 55: Any material may be used as long as it is a material known to have a surface conduction electron emission phenomenon. Metal oxides such as SnO ₂ , In ₂ O ₃ and PbO, metals such as Au and Ag, carbon and various semiconductors are generally known materials. In addition, for example, as disclosed in Japanese Patent Publication No. 6-87392, a thin-film conductor film containing fine particles is heated by energization, and the thin-film conductor film is locally broken, deformed or altered by Joule heat. Then, the electron emission film can be formed by bringing the state into an electrically high resistance state.
Alternatively, the electron emission film may be formed by a gas deposition method as disclosed in the publication.

<Example 1 of Manufacturing Method of Electron-Emitting Element> A Cr layer having a thickness of 3 μm is deposited on a clean quartz glass substrate having a thickness of 3 mm by a sputtering method (FIG. 13). On top of that, a resist agent (“ORM manufactured by Tokyo Ohka Kogyo Co., Ltd.
85 ") is spin coated with a spinner, and is then placed in an oven for 8
Let stand for 30 minutes at 0 ° C. to dry. After air cooling, a desired pattern is exposed, the resist is developed and washed with water, and then left in an oven at 135 ° C for 30 minutes. After air cooling, Cr etching solution (“MR-DS” manufactured by Tokyo Ohka Kogyo Co., Ltd.)
To develop Cr and wash with water.

Next, the substrate was left for 5 minutes in a resist stripping solution (“Clean Stop” manufactured by Tokyo Ohka Kogyo Co., Ltd.) kept at 120 ° C., and then in a strip rinse solution at room temperature for 1 minute and isopropyl alcohol at room temperature. The resist is peeled off by immersing each in 1 minute. This substrate is washed with water and then dried. Through the above steps, the lower electrode layer 110 made of Cr is obtained (FIG. 14).

Then, the film thickness is 20 μm by the sputtering method.
Of SiO ₂ is deposited (FIG. 15), and a Cr layer having a film thickness of 3 μm is deposited thereon by a sputtering method (FIG. 16).
On top of that, a resist agent (“OR manufactured by Tokyo Ohka Kogyo Co., Ltd.
M85 ") is spin-coated with a spinner and left to dry in an oven at 80 ° C for 30 minutes. After air cooling, a desired pattern is exposed, the resist is developed and washed with water, and then left in an oven at 135 ° C for 30 minutes. After air cooling, Cr
Etching solution ("MR-D" manufactured by Tokyo Ohka Kogyo Co., Ltd.
S ") is used to develop Cr and wash with water. Thus, the upper electrode layer 130 made of Cr is obtained on the intermediate layer 125.

Next, the substrate was left for 5 minutes in a resist stripping solution kept at 120 ° C. (“Clean Stop” manufactured by Tokyo Ohka Kogyo Co., Ltd.), and was placed in a strip rinse solution at room temperature for 1 minute and isopropyl alcohol at room temperature. The resist is peeled off by immersing each in 1 minute. This substrate is washed with water and then dried. Further, reactive ion etching using CHF ₃ + O ₂ as an etchant is performed, and the exposed portion of the intermediate layer 125 is removed using the upper electrode layer 130 made of Cr as a mask. Through the above steps, the insulating layer 120 made of SiO ₂ is obtained (FIG. 1).
7).

When the three-layer structure is thus formed at the intersection, a resist film ("NCP225" manufactured by Nippon Synthetic Chemical Industry Co., Ltd.) is fused on the entire surface of the substrate, a desired pattern is exposed, and the resist film is developed and washed with water. Then, a circular opening is provided on the upper surface of the three-layer structure. Subsequently, by spraying fine particles to the openings by a sand blast method to form a “mortar-shaped” vertical hole C, the entire substrate is immersed in a NaOH solution for 3 minutes to peel off the residual resist and wash with pure water. Dry (Figure 18).

Further, an organic solvent containing an organopalladium compound (“CATA PASTE CC manufactured by Okuno Chemical Industries Co., Ltd.
P ”) ink is applied to each vertical hole C by screen printing.
Print on the upper edge of. If you leave it for 15 minutes,
The ink printed on the upper edge of the vertical hole C flows toward the bottom of the vertical hole C, and a “mortar-shaped” ink film is formed on the wall surface of the vertical hole C. Then, it is baked at about 200 ° C. for 20 minutes to obtain an electron-emitting film 140 in a “mortar-like” shape containing fine particles of Pb (FIG. 19).

Example 2 for Manufacturing Method of Electron-Emitting Element A photosensitive resist (“Fodel Au5956” manufactured by DuPont) in which fine metal particles are dispersed is spin-coated on a clean quartz glass substrate having a thickness of 3 mm by a spinner. Then, it is left in an oven at 80 ° C. for 30 minutes and dried to obtain an organometallic thin film having a thickness of 7 μm (FIG. 13). After air cooling, the desired pattern is exposed and developed with a 1% aqueous sodium hydroxide solution. This substrate is baked in a baking furnace kept at 400 ° C. for 2 hours to decompose and remove organic components, thereby obtaining an Au layer having a thickness of 3 μm. Through the above steps, the lower electrode layer 110 made of Au is obtained (FIG. 14).

Then, on this substrate, a photosensitive resist in which glass particles were dispersed (“Fodel 6 manufactured by DuPont”) was used.
050 ") is spin-coated with a spinner and left to dry in an oven at 80 ° C for 30 minutes to give a thickness of 45
An insulating layer of μm is obtained (FIG. 15). After air cooling, the desired pattern is exposed and developed with trichloroethylene. This substrate is baked for 2 hours in a baking furnace kept at 500 ° C. to decompose and remove organic components, thereby obtaining an insulating layer having a thickness of 22 μm.
This insulating layer becomes the insulating layer 120 shown in FIG. 17 (the upper electrode layer 130 is not yet formed at this point).

Further, on this substrate, a photosensitive resist in which fine metal particles are dispersed (“Fodel Au5 manufactured by DuPont”) is used.
956 ") is spin-coated with a spinner and left standing in an oven at 80 ° C for 30 minutes to dry to a thickness of 7μ.
m organometallic thin film is obtained (FIG. 15). After air cooling, the desired pattern is exposed and developed with trichlorethylene. This substrate is baked in a baking furnace kept at 400 ° C. for 2 hours to decompose and remove organic components, thereby obtaining an Au layer having a thickness of 3 μm. This Au layer becomes the upper electrode layer 130 (see FIG. 1).
7).

When the three-layer structure is thus formed at the intersection, a resist film (“NCP225” manufactured by Nippon Synthetic Chemical Industry Co., Ltd.) is fused on the entire surface of the substrate, a desired pattern is exposed, and the resist film is developed and washed with water. Then, a circular opening is provided on the upper surface of the three-layer structure. Subsequently, by spraying fine particles to the openings by a sand blast method to form a “mortar-shaped” vertical hole C, the entire substrate is immersed in a NaOH solution for 3 minutes to peel off the residual resist and wash with pure water. Dry (Figure 18).

Further, an organic solvent containing an organopalladium compound (“CATA PASTE CC manufactured by Okuno Chemical Industries Co., Ltd.
P ”) ink is applied to each vertical hole C by screen printing.
Print on the upper edge of. If you leave it for 15 minutes,
The ink printed on the upper edge of the vertical hole C flows toward the bottom of the vertical hole C, and a “mortar-shaped” ink film is formed on the wall surface of the vertical hole C. Then, it is baked at about 200 ° C. for 20 minutes to obtain an electron-emitting film 140 in a “mortar-like” shape containing fine particles of Pb (FIG. 19).

<Example of Manufacturing Method of Counter Substrate> An ITO layer having a film thickness of 1 μm is deposited by a sputtering method on a clean quartz glass substrate having a thickness of 3 mm. A phosphor layer made of ZnO: Zn having a film thickness of 20 μm was vapor-deposited thereon by an EB vapor deposition method to fabricate a counter substrate 20.

<Example of Electron Emitting Operation> 10
The cathode / anode between the counter substrate and the electron-emitting device was held by holding the electron-emitting device manufactured in each of the above-mentioned examples and the counter-substrate in parallel at a distance of 3 mm in a vacuum chamber kept at ⁻¹⁰ Pa. A voltage of 5 kV was applied. As the operating voltage of the electron-emitting device, when the upper electrode layer was kept at the ground potential and −20 V was applied to the lower electrode layer, electron emission was obtained toward the counter substrate, and good light emission characteristics were obtained. Further, when a large number of electron-emitting devices arranged in a matrix were driven by a simple matrix and a signal corresponding to predetermined image information was given, image formation was observed on the counter substrate.

[0072]

As described above, according to the present invention, since the electron-emitting device is constituted by the vertical "mortar-like" structure, it is easy to secure the dimensional accuracy, and the device electrode can be used as a wiring. As a result, even when a large number of substrates are arranged on the same substrate, the entire structure can be simplified and the manufacturing process can be simplified.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing the structure of a conventional surface conduction electron-emitting device 10 and a counter substrate 20.

2 is a top view of components formed on a glass substrate 11 in the electron-emitting device 10 shown in FIG. 1, and a cross section taken along a cutting line 1-1 in this figure is shown in FIG.

3 is a cross-sectional view showing a state where electrons are being emitted from an electron-emitting device 10 shown in FIG.

FIG. 4 is a diagram showing dimensions of a main part of the electron-emitting device 10 shown in FIG.

FIG. 5 is a perspective view showing a structure of an electron-emitting device 50 according to an embodiment of the present invention.

FIG. 6 is a sectional view showing a structure of an electron-emitting device 50 according to an embodiment of the present invention.

FIG. 7 is a sectional view showing a structure of an electron-emitting device according to another embodiment of the present invention.

8 is a cross-sectional view showing wiring for the electron-emitting device 50 shown in FIG. 6 (b).

9 is a cross-sectional view showing a state where electrons are being emitted from the electron-emitting device 50 shown in FIG. 6 (b).

10 is a diagram showing dimensions of a main part of the electron-emitting device 50 shown in FIG. 6 (b).

FIG. 11 is a perspective view showing a state in which four electron-emitting devices of the present invention are formed on a glass substrate 100.

FIG. 12 is a plan view for explaining the driving principle of the electron-emitting device according to the present invention.

13 is a perspective view showing a first stage of a manufacturing process for obtaining the structure shown in FIG.

14 is a perspective view showing a second stage of the manufacturing process for obtaining the structure shown in FIG. 11. FIG.

15 is a perspective view showing a third stage of the manufacturing process for obtaining the structure shown in FIG. 11. FIG.

16 is a perspective view showing a fourth step of the manufacturing process for obtaining the structure shown in FIG.

17 is a perspective view showing a fifth step of the manufacturing process for obtaining the structure shown in FIG. 11. FIG.

18 is a perspective view showing a sixth stage of the manufacturing process for obtaining the structure shown in FIG. 11. FIG.

FIG. 19 is a perspective view showing the final stage of a manufacturing process for obtaining the structure shown in FIG. 11.

[Explanation of Codes] 10 ... Electron Emitting Element 11 ... Glass Substrate 12 ... Electrode 13 ... Electrode 14 ... Electron Emitting Film 20 ... Counter Substrate 21 ... Glass Substrate 22 ... Transparent Electrode 23 ... Phosphor Layer 31 ... Power Supply 32 ... Power Supply 33 ... Switch 50 ... Electron emitting element 51 ... Glass substrate 52 ... Lower electrode layer 53 ... Insulating layer 54 ... Upper electrode layer 55 ... Electron emitting film 56 ... Electron emitting film 100 ... Glass substrate 110 ... Lower electrode layer 115 ... First preparation layer 120 ... Insulating layer 125 ... Intermediate layer 130 ... Upper electrode layer 135 ... Second preparation layer 140 ... Electron emitting film 150 ... Selector 160 ... Driver 200 ... Electron emitting device C, C1, C2 ... Vertical holes D1 to D7 ... Dimensions of each part

Claims (8)

[Claims] 1. A three-layer structure including an insulating layer sandwiched between a lower electrode layer and an upper electrode layer is disposed on a substrate, and the three-layer structure has a depth from the upper surface to at least the lower electrode layer. An electron-emitting device characterized in that a vertical hole having a height is formed, and an electron-emitting film having a function of emitting electrons by energization is formed on a wall surface portion of the vertical hole. 2. The electron-emitting device according to claim 1, wherein a vertical hole having a depth that penetrates the three-layer structure and reaches the substrate is formed. 3. An electron-emitting device according to claim 1, wherein a vertical hole having a deep-closing property is formed so that the opening area becomes smaller at a deeper portion. 4. The electron emitting device according to claim 1, wherein a plurality of lower electrode layers extending in the column direction are arranged in the row direction, and an upper electrode layer extending in the row direction is arranged in the column direction. A plurality of them are arranged, and an insulating layer is sandwiched between both electrode layers at the intersection of the lower electrode layer and the upper electrode layer so that a three-layer structure is formed at each of the intersections. An electron-emitting device having an electron-emitting film formed thereon. 5. The electron-emitting device according to claim 4, wherein the upper electrode layer is formed on the substrate via an insulating layer, and the upper electrode layer is formed in a region intersecting with the lower electrode layer. Is an electron-emitting device characterized in that a three-layer structure is formed and a two-layer structure composed of an upper electrode layer and an insulating layer is formed in the other portions. 6. A method for manufacturing an electron-emitting device according to claim 1, wherein a first preparation layer is formed on an insulating substrate, and the first preparation layer is patterned. To form a lower electrode layer, forming an insulating intermediate layer on the substrate and the lower electrode layer, and forming a second preparation layer on the intermediate layer; Patterning a preparation layer to form an upper electrode layer; patterning the intermediate layer to form an insulating layer; and a three-layer structure including the lower electrode layer, the insulating layer, and the upper electrode layer. Forming a vertical hole having a depth from the upper surface to at least the lower electrode layer; and forming an electron emitting film having a function of emitting electrons by energization on a wall surface portion of the vertical hole. A method for manufacturing an electron-emitting device, characterized in that 7. The method for manufacturing an electron-emitting device according to claim 1, wherein the vertical holes are formed by a cutting process by etching or sandblasting. 8. The method for manufacturing an electron-emitting device according to claim 4, wherein a lower electrode layer extending in the column direction, an upper electrode layer extending in the row direction, and an insulating layer between both electrode layers are formed on the substrate. , Respectively, a negative resist layer is formed on the entire surface of the substrate, and back exposure is performed by irradiating light from the lower side of the substrate. During this back exposure,
The irradiation light intensity and irradiation time are set so that only the intersection of both electrode layers becomes the non-exposed portion due to the phenomenon of light wrapping around to the upper surface side of the lower electrode layer and the upper electrode layer, and the resist layer is exposed after the exposure. An electron-emitting device characterized in that development is performed to remove the non-exposed portion, an opening is formed in the resist layer at the intersection, and a vertical hole is formed using the opening.