JPH09116344A - Level control circuit and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the excessive attenuation of the output signal due to the rise of the ambient temperature by controlling the detection signal via a control means to prevent the output signal from being attenuated according to the ambient temperatures. SOLUTION: An output level detection circuit 2 detects the output voice signal levels and supplies them to an electronic volume part 3 after the current amplification. The circuit 2 consists of a comparator 6 which compares the output voice signal levels with each other, a peak detection circuit 7 which amplifies the output of the comparator 6 and holds its peak, and a current amplifier circuit 8 which applies the current amplification to the signal that undergone its peak holding. The circuit 2 normally operates to limit the output signal at a fixed level or less when the amplification output is small and the chip temperature is low. When the chip temperature is high and the base-emitter voltage of transistors Q2 and Q3 of the circuit 8 are reduced, the Zehner voltage of a Zehner diode Dz is reduced. Thus the signal level has no change for control of the part 3.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a level control circuit and a semiconductor device, and more particularly to a level control circuit and a semiconductor device for controlling a recording level so as not to exceed a certain level.

[0002]

2. Description of the Related Art In a tape recorder or the like, an AL that adjusts the recording level in order to make the sound to be recorded almost constant regardless of the fluctuation of the sound at the time of recording and enable high quality recording.
C (Automatic Level Contro
l) Some were provided with a circuit.

FIG. 6 shows a conventional circuit configuration diagram. The audio signal is input from the audio signal source 41 to the terminal Tin via the capacitor C11. The terminal Tin is connected to the electronic volume section 42, and is connected from the audio signal source 41 to the capacitor C11.
The audio signal supplied via the is supplied to the electronic volume section 42.

The electronic volume section 42 has an input resistance Ri,
It is composed of a signal attenuation control circuit 43. The signal attenuation control circuit 43 is composed of NPN transistors Q16 and Q17, and has an emitter of the NPN transistor Q16 and NP.
The collector of the N transistor Q17, the collector of the NPN transistor Q16 and the emitter of the NPN transistor Q17 are connected to each other. NPN transistor Q16 emitter and NPN transistor Q17
The connection point with the collector of is connected to the terminal T via the input resistance Ri.
It is connected to in and the connection point between the collector of the NPN transistor Q16 and the emitter of the NPN transistor Q17 is
Bias voltage VB is applied. A control signal for controlling the attenuation amount of the input is supplied to the bases of the NPN transistors Q16 and Q17. The signal attenuation control circuit 43 controls the on resistance of the NPN transistors Q16 and Q17 by a control signal supplied to the bases thereof to control the attenuation amount of the input signal supplied to the terminal Tin.

The connection point between the NPN transistors Q16 and Q17 of the signal attenuation control circuit 43 and the input resistance Ri is connected to the non-inverting input terminal of the operational amplifier 44, and the non-inverting input terminal of the operational amplifier 44 is used for signal attenuation. Control circuit 43
The audio signal attenuated by is supplied. Operational amplifier 4
Bias voltage VB is applied to the inverting input terminal of No. 4 via resistor R11, and the output of operational amplifier 44 is fed back via resistor R12. The operational amplifier 44 constitutes a non-inverting amplifier together with the resistors R11 and R12, and amplifies and outputs the audio signal supplied to the terminal Tin.

The output of the operational amplifier 44 is output as a sound signal for recording and is also supplied to an attenuation control signal generation circuit 45 for generating a control signal for determining the amount of attenuation in the signal attenuation control circuit 43. The attenuation control signal generation circuit 45 generates a control signal for controlling the signal attenuation control circuit 43 so that the level of the recording audio signal output from the operational amplifier 44 becomes substantially constant.

The attenuation control signal generation circuit 45 includes an operational amplifier (or comparator) 46, a constant voltage source ES1 for applying a threshold voltage VES1 to the operational amplifier 46, a transistor Q11 connected to the output of the operational amplifier 46, a peak detection circuit 47, and an amplifier. NPN transistor Q12,
Q13, and PNP transistors Q14 and Q15 forming an output current mirror circuit. The output of the operational amplifier 44 is connected to the non-inverting input terminal of the operational amplifier 46. The inverting input terminal of the operational amplifier 46 is supplied with the threshold voltage VES1 generated by the constant voltage source ES1 with the bias voltage VB as a reference. Operational amplifier 46
Constitutes a comparator, and outputs a low level signal when the output of the operational amplifier 44 is smaller than the threshold voltage VES1 and a high level signal when it is larger than the threshold voltage VES1. At this time, in the attenuation control signal generation circuit 45, when a large peak input is supplied, the electronic volume section 42 rapidly attenuates the signal, and thereafter, even a small input signal is slowly attenuated so as to reduce the attenuation amount of the electronic volume section 42. Generate a control signal.

The output of the operational amplifier 46 is supplied to the base of the NPN transistor Q11 and is supplied to the NPN transistor Q11.
The on / off of 11 is controlled. NPN transistor Q1
A power supply voltage Vcc is supplied from the power supply 48 to the collector of 1, and the emitter is grounded via the peak detection circuit 47. The output of the operational amplifier 46 is peak-held by the peak detection circuit 47 and supplied to the base of the NPN transistor Q12.

The NPN transistor Q12 has a collector supplied with a power supply voltage Vcc from a power supply 48, and an emitter grounded via a resistor R13. The base of the NPN transistor Q13 is connected to the connection point between the emitter of the NPN transistor Q12 and the resistor R13, the emitter is grounded, and the collector is connected to the collector of the PNP transistor Q14. A power supply voltage Vcc is supplied from a power supply 48 to the emitter of the PNP transistor Q14, and the base is connected to the collector and the base of the PNP transistor Q5. The PNP transistor Q15 has its emitter supplied with the power supply voltage Vcc from the power supply 48, and its collector connected to the bases of the NPN transistors Q16 and Q17 forming the electronic volume section 42.

The signal smoothed by the peak detection circuit 17 is current-amplified by the transistors Q12 to Q15,
It is supplied to the electronic volume section 42. For example, when the output audio signal of the output of the operational amplifier 44 becomes larger than the threshold voltage VES1, the output of the operational amplifier 46 becomes high level, and when the output audio signal of the output of the operational amplifier 44 becomes smaller than the threshold voltage VES1, the output of the operational amplifier 46 becomes. The signal becomes low level, the high level and the low level are averaged by the peak detection circuit 47, the current is amplified by the transistors Q12 to Q15, and the amplified signal is supplied to the electronic volume section 42 to control the attenuation amount of the input audio signal. In the electronic volume section 42, if the current supplied from the transistor Q15 is large, the attenuation amount of the input signal is increased, and if it is small, the attenuation amount is decreased. That is, the output audio signal level is the threshold voltage V
If it becomes larger than ES1, the amount of attenuation becomes large, which lowers the output audio signal level and increases the threshold voltage VES.
When it becomes smaller than 1, the amount of attenuation becomes small, the output audio signal level is increased, and the output audio signal level is held at a constant value.

FIG. 7 shows a diagram for explaining an operation of a conventional example. 7A shows a waveform diagram of an input signal, FIG. 7B shows a signal of the peak detection circuit 7, and FIG. 7C shows a waveform diagram of an output audio signal. FIG. 7 (A)
When the amplifier output is small and the chip temperature is low, as shown in, the output level detection circuit 2 operates normally and limits the output signal to a certain value or less.

[0012]

[Problems to be Solved by the Invention] However, the above-mentioned AL
When the C circuit is formed in a one-chip semiconductor device, the capacitor C1
2 is charged, but discharge is performed with a time constant set in advance by the capacitor C12 and the resistor R13, and the output of the preamplifier and the like provided on the same chip becomes large with the capacitor C12 charged. When the chip temperature rises, as shown in FIG. 7B, the voltage V between the base and emitter of the NPN transistors Q12 and Q13
Since BE decreases, at this time, as shown in FIGS. 7A and 7C, the base currents of the transistors Q16 and Q17 of the electronic volume section 42 increase regardless of the level of the output audio signal, and the electronic volume section 42 of the electronic volume section 42 increases. There has been a problem that the amount of attenuation excessively increases and the output audio signal is excessively reduced as shown in the area a of FIG.

The present invention has been made in view of the above points, and an object of the present invention is to provide a level control circuit and a semiconductor device in which an output signal is not excessively attenuated by an increase in ambient temperature.

[0014]

According to a first aspect of the present invention, level detection means for detecting an output signal level and generating a detection signal according to the output signal level, and the detection generated by the level detection means. In a level control circuit having level adjusting means for adjusting an output signal level according to a signal, the level control circuit is provided between the level detecting means and the level adjusting means and does not attenuate the output signal in response to an increase in ambient temperature. It has a characteristic control means for controlling the detection signal in a direction.

According to the first aspect, the detection signal is controlled by the characteristic control means so that the output signal is not attenuated according to the ambient temperature, so that an excessive input signal is supplied and the level adjusting means attenuates. After that, when the output signal becomes small, for example, even if the ambient temperature rises due to the temperature rise of the chip, the detection signal becomes small by the characteristic control means, and the output signal due to the attenuation of the level adjusting means Since the amount of attenuation is small, the output signal is not excessively attenuated according to the temperature.

According to a second aspect of the present invention, the characteristic control means generates a reference voltage generating means for generating a reference voltage having a zero or positive temperature characteristic, a reference voltage generated by the reference voltage generating means and the level detecting circuit. And a differential amplification means for generating a differential signal with respect to the detection signal and supplying the differential signal to the level adjustment means.

According to the second aspect, the reference voltage does not change or increases when the ambient temperature rises, so that the differential signal does not increase. Therefore, the level adjusting means is excessively controlled. And the output signal can always be kept adjustable. According to a third aspect of the present invention, the reference voltage generating means includes a Zener diode having a zero or positive temperature characteristic.

According to the third aspect, even if the temperature fluctuates, the reference voltage does not rise and the differential signal does not increase. Therefore, the output signal is not excessively attenuated. A fourth aspect of the present invention is characterized in that the level control circuit according to any one of the first to third aspects is formed on a one-chip semiconductor substrate.

According to a fourth aspect, when the level control circuit according to any one of the first to third aspects is formed on a one-chip semiconductor substrate, the level control circuit is heated by the heat of the circuit on the same chip. The output signal does not fluctuate excessively even if the temperature rises.

[0020]

FIG. 1 is a circuit diagram of a first embodiment of the present invention. In this embodiment, an ALC (Automatic Level C) for automatically adjusting a recording level in a tape recorder or the like as a level control device.
The (ontrol) circuit will be described.

The ALC circuit 1 of this embodiment corresponds to the level control circuit of the present invention, is formed on a one-chip semiconductor substrate, and is an output level detection circuit 2 for detecting the output audio signal level. Corresponding to the level adjusting means of the electronic volume section 3 for attenuating the level of the input audio signal supplied from the signal source Ss according to the output audio signal level detected by the output level detecting circuit 2 Non-inverting amplifier circuit 4 for non-inverting amplifying the converted audio signal
It is composed of The output level detection circuit 2 detects the output audio signal level, current-amplifies it, and supplies it to the electronic volume section 3. The output level detection circuit 2 comprises a constant voltage source 5 which constitutes the level detecting means in the claims, a comparator 6 which compares the constant voltage source 5 with the threshold voltage Vs as the threshold voltage Vs, and the output of the comparator 6. Corresponding to the NPN transistor Q1 for amplifying the signal, the peak detection circuit 7 for peak-holding the signal amplified by the NPN transistor Q1, and the characteristic control means in the claims, and the signal peak-held by the peak detection circuit 7 is current-amplified. The current amplifying circuit 8 is provided. The output audio signal is supplied to the non-inverting input terminal of the comparator 6, and the threshold voltage V from the constant voltage source 5 is supplied to the inverting input terminal.
s is supplied.

The comparator 6 compares the output audio signal level with the level of the threshold voltage Vs, and becomes high level when the output audio signal level is higher than the threshold voltage Vs, and is high when the output audio signal level is lower than the threshold voltage Vs. It outputs a low-level pulse signal. The pulse signal output from the comparator 6 is supplied to the base of the NPN transistor Q1.

The NPN transistor Q1 has a collector connected to a power supply 9, a power supply voltage Vcc applied from the power supply 9, an emitter connected to the peak detection circuit 7, and a pulse signal supplied from the comparator 6 at a high level. It is turned on at times and turned off when the pulse signal supplied from the comparator 6 is at a low level. A current is supplied to the peak detection circuit 7 by switching the NPN transistor Q1. The peak detection circuit 7 is configured by connecting a capacitor C2 and a resistor R3 in parallel, approximately averages the supplied current, and supplies the averaged current to the current amplification circuit 8.

The current amplifying circuit 8 includes NPN transistors Q2 and Q3 constituting the differential amplifying means, a Zener diode Dz constituting the reference voltage generating means, and a resistor R.
3, a constant current source 10, and PNP transistors Q4 and Q5. NPN transistors Q2, Q3 and resistor R
3, a differential amplifier is configured, and a signal corresponding to the level of the output audio signal is supplied to the base of the NPN transistor Q2 and averaged by the peak detection circuit 7,
The threshold voltage Vs2 generated by the constant current source 10 and the Zener diode Dz is supplied to the base of the NPN transistor Q3. The constant current source 10 and the Zener diode Dz are connected in series, and the power source voltage Vc
Zener voltage Vz generated when the reverse current is supplied to zener diode Dz
Is supplied to the base of the NPN transistor Q3 as the threshold voltage Vs2. PNP transistor Q
4, Q5 form a current mirror circuit. PN
The emitters of the P transistors Q4 and Q5 are both the power source 9
Connected to each other, the power supply voltage Vcc is supplied, and the bases are connected to each other.
The collector and base of 4 are connected to the collector of NPN transistor Q2. Further, the collector of the PNP transistor Q5 is connected to the electronic volume section 3.

In the current amplification circuit 8, the signal averaged by the peak detection circuit 7 is compared with the Zener voltage Vz, and a current corresponding to the voltage difference from the Zener voltage Vz is supplied to the electronic volume section 3. That is, when the signal averaged by the peak detection circuit 7 increases, the voltage difference with the Zener voltage Vz also increases, the current supplied to the electronic volume unit 3 increases, and the signal averaged by the peak detection circuit 7 increases. However, when it decreases, the voltage difference from the Zener voltage Vz also decreases and the current supplied to the electronic volume unit 3 decreases.

The electronic volume section 3 includes resistors Ri and NP.
It is composed of N transistors Q6 and Q7. The resistance Ri is
One end is connected to the input terminal Tin, and the input audio signal supplied from the audio signal source Ss via the DC blocking capacitor C1 is supplied to the input terminal Tin. The NPN transistors Q6 and Q7 are connected to the emitter of the NPN transistor Q6 and the N
The collector of the PN transistor Q7, the collector of the NPN transistor Q6 and the emitter of the NPN transistor Q7 are connected to each other, and the connection point between the emitter of the NPN transistor Q6 and the collector of the NPN transistor Q7 is connected via the input resistor Ri. Is connected to the terminal Tin, and the bias voltage V is applied to the connection point between the collector of the NPN transistor Q6 and the emitter of the NPN transistor Q7.
B is applied, and the collector of the PNP transistor Q5 of the output level detection circuit 2 is connected to the bases of the NPN transistors Q6 and Q7.

In the electronic volume section 3, the output level detection circuit 2 detects an increase in the level of the output audio signal,
When the supply current to the bases of the NPN transistors Q6 and Q7 increases, the ON resistance of the NPN transistors Q6 and Q7 decreases, the voltage at the connection point between the resistor Ri and the NPN transistors Q6 and Q7 decreases, and the output level detection circuit 2 When a decrease in the level of the output audio signal is detected by and the supply current to the bases of the NPN transistors Q6 and Q7 decreases,
The ON resistance of the NPN transistors Q6 and Q7 increases, and the voltage at the connection point between the resistor Ri and the NPN transistors Q6 and Q7 increases to control the attenuation amount of the input audio signal.

The connection point between the NPN transistors Q6 and Q7 and the input resistor Ri is the operational amplifier AMP1 and the resistor R1,
It is connected to the non-inverting amplifier circuit 4 composed of R2. The connection point between the NPN transistors Q6 and Q7 and the input resistor Ri is connected to the non-inverting input terminal of the operational amplifier AMP1 of the non-inverting amplifier circuit 4, and the non-inverting input terminal of the operational amplifier AMP1 is connected to the non-inverting input terminal by the signal attenuation control circuit 3. An attenuated audio signal is provided. The bias voltage VB is applied to the inverting input terminal of the operational amplifier AMP1 via the resistor R1, and the output of the operational amplifier AMP1 is fed back via the resistor R2. The operational amplifier AMP1 constitutes a non-inverting amplifier together with the resistors R1 and R2, and amplifies and outputs the audio signal supplied to the terminal Tin.

FIG. 2 shows a temperature characteristic diagram of the Zener diode. The Zener diode Dz has a so-called positive temperature characteristic in which the Zener voltage Vz rises as the temperature T increases as shown in FIG. Therefore, the operational amplifier A
Even if the temperature of the chip rises due to the operation of MP1 or the like and the base-emitter voltage VBE of the NPN transistors Q2 and Q3 drops, the Zener voltage Vz also rises and the threshold voltage Vs2 rises as the temperature T increases. Therefore, the detected voltage of the output audio signal does not change, and the output audio signal is not attenuated by the temperature.

FIG. 3 shows an operation explanatory diagram of the first embodiment of the present invention. 3A shows a waveform diagram of an input signal, FIG. 3B shows a signal of the peak detection circuit 7, and FIG. 3C shows a waveform diagram of an output audio signal. As shown in FIG. 3A, when the amplifier output is small and the chip temperature is low, the output level detection circuit 2 operates normally,
Limit the output signal below a certain value. Further, as shown in FIG. 3 (A), the amplifier output becomes large, the chip temperature becomes high, and as shown in FIG. 3 (B), the NPN transistor Q
When the base-emitter voltage VBE of Q2 and Q3 decreases, the Zener voltage Vz of the Zener diode Dz also decreases, and the signal level for controlling the electronic volume unit 3 does not change. Therefore, the amplifier output is small and the chip It can be operated with the same attenuation as when the temperature is low.

FIG. 4 shows a circuit configuration diagram of the second embodiment of the present invention. In the figure, the same components as those in FIG. 1 are designated by the same reference numerals and the description thereof will be omitted. The present embodiment differs from the first embodiment in the configuration of the output level detection circuit. The output level detection circuit 21 of the present embodiment is the output level detection circuit 2 which includes a differential amplifier circuit including PNP transistors Q4 and Q5, a PNP transistor Q21, an NPN transistor Q22, and a constant current source 2.
2. A current amplifier circuit composed of a Zener diode Dz.

According to this embodiment, the PNP transistors Q21 and NPN due to the chip temperature rise are the same as in the first embodiment.
Even if the base-emitter voltage VBE of the transistor Q22 decreases, the decrease of the base-emitter voltage VBE of the NPN transistor Q22 can be offset by the increase of the Zener voltage Vz of the Zener diode Dz, so that it is always constant regardless of the chip temperature. The level can be controlled according to conditions.

FIG. 5 shows a circuit configuration diagram of a third embodiment of the present invention. In the figure, the same components as those in FIG. 1 are designated by the same reference numerals and the description thereof will be omitted. The present embodiment differs from the first embodiment in the configuration of the output level detection circuit. The output level detection circuit 31 of the present embodiment is the output level detection circuit 2 and is composed of a differential amplifier circuit including an operational amplifier 32, a constant current source 33, and a Zener diode Dz.

According to the present embodiment, as in the first embodiment, even when the base-emitter voltage VBE of the transistor in the operational amplifier 32 decreases due to the chip temperature rise, the Zener voltage Vz of the Zener diode Dz decreases and N
Base-emitter voltage VBE of PN transistor Q22
Since it is possible to offset the decrease in the temperature, the level control can always be performed under constant conditions regardless of the chip temperature.

[0035]

As described above, according to claim 1 of the present invention, the detection signal is controlled by the characteristic control means in accordance with the ambient temperature so that the output signal is not attenuated, so that an excessive input signal is supplied. Then, after the level adjusting means attenuates,
When the output signal becomes small, for example, even if the temperature of the chip rises and the ambient temperature rises, the detection signal is reduced by the characteristic control means, and the attenuation amount of the output signal due to the attenuation of the level adjustment means is reduced. Since the output signal becomes smaller, the output signal is prevented from being excessively attenuated according to the temperature.

According to the second aspect, the reference voltage does not change or increases when the ambient temperature rises, so that the differential signal does not increase. Therefore, the level adjusting means is excessively controlled. There is no such thing, and it has the feature that the output signal can always be maintained in an adjustable state.

According to the third aspect, even if the temperature fluctuates, the reference voltage does not rise and the differential signal does not increase. Therefore, the output signal can be always maintained in an adjustable state. . According to claim 4, when the level control circuit according to any one of claims 1 to 3 is formed on the semiconductor substrate of one chip, the temperature of the level control circuit rises due to the heat generation of the circuit on the same chip. Even if the output signal is not attenuated excessively, it has a feature.

[Brief description of the drawings]

FIG. 1 is a circuit configuration diagram of a first embodiment of the present invention.

FIG. 2 is a temperature characteristic diagram of a Zener diode.

FIG. 3 is an operation explanatory diagram of the first embodiment of the present invention.

FIG. 4 is a circuit configuration diagram of a second embodiment of the present invention.

FIG. 5 is a circuit configuration diagram of a third embodiment of the present invention.

FIG. 6 is a circuit configuration diagram of an example of the related art.

FIG. 7 is a diagram illustrating an operation of a conventional example.

[Explanation of symbols]

 1 ALC circuit 2 Output level detection circuit 3 Electronic volume section 4 Non-inverting amplification circuit 5 Constant voltage source 6 Comparator 7 Peak detection circuit 8 Current amplification circuit Dz Zener diode

Claims (4)

[Claims] 1. A level detection means for detecting an output signal level and generating a detection signal corresponding to the output signal, and a level adjustment for adjusting the output signal level according to the detection signal generated by the level detection means. In a level control circuit having means, the level adjusting means is provided between the level detecting means and the level adjusting means, and controls the detection signal in a direction in which the level adjusting means does not attenuate the output signal in response to a rise in ambient temperature. A level control circuit having a characteristic control means for controlling. 2. The characteristic control means, a reference voltage generation means for generating a reference voltage having a zero or positive temperature characteristic, a reference voltage generated by the reference voltage generation means and the level detection circuit. 2. The level control circuit according to claim 1, further comprising a differential amplifying unit that generates a differential output with respect to the detection signal and supplies the differential output to the level adjusting unit. 3. The level control circuit according to claim 2, wherein the reference voltage generating means includes a Zener diode having a zero or positive temperature characteristic. 4. A semiconductor device, wherein the level control circuit according to claim 1 is formed on a one-chip semiconductor substrate.