JPH09106936A - Manufacture of semiconductor device and semiconductor substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make it possible to form stably a diffraction grating, which is uniform in depth and form, though an interference exposure method, which is a low cost pattern formation method, is used. SOLUTION: A diffraction grating-shaped pattern is printed onto an N-type resist film 11 formed on a crystal substrate 10 and at the same time, a pattern of a contact photo mask 13 is baked onto a part, which corresponds to a flat part formation region 10b on the substrate 10, in the film 11 and thereafter, when a developing is performed on the film 11, the film 11 is left on the whole surface of the substrate 10 in the region 10b, while a diffraction grating-shaped resist pattern 15 is formed in a diffraction grating formation region 10a. When a wet etching is performed on the substrate 10 using the remaining film 11 and the pattern 15, a diffraction grating 16 and a flat part 17 are formed and when the film 11 and the pattern 15 are removed, the grating 16 and the flat part 17 are exposed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device having an interference fringe pattern portion and a flat portion in succession on a substrate and an alignment mark on the semiconductor substrate.

[0002]

2. Description of the Related Art As a semiconductor device having a continuous interference fringe pattern portion and a flat portion on a substrate, an electro-absorption type semiconductor optical modulator is known. In optical communication, mainly 1.
Signal lights in the 3 μm band and 1.55 μm band are used. When using the signal lights in these wavelength bands, the electroabsorption-type semiconductor optical modulator has a smaller wavelength chirp than the direct modulation-type semiconductor laser. In addition, since it has advantages such as high speed and high speed modulation, it is effective for high speed modulation in optical communication.

Further, since the electro-absorption type semiconductor optical modulator has a simple structure, it has a feature that it can be integrally formed with other optical semiconductor components such as a DFB laser as one waveguide. In this way, the waveguide element in which the electro-absorption type semiconductor optical modulator and the DFB laser are integrally formed is
It is called an electro-absorption optical modulator integrated DFB laser.

FIG. 8 shows an electroabsorption type optical modulator integrated DFB.
The structure of the laser is shown, and in FIG.
FB laser, 101 is a first waveguide constituting the DFB laser 100, 102 is a diffraction grating carved in the first waveguide 101, 103 is an electrode of the DFB laser 100, 10
Reference numeral 4 is a high resistance semiconductor layer formed so as to embed the first waveguide 101. In FIG. 8, 110 is an electroabsorption optical modulator, and 111 is an electroabsorption optical modulator 110.
And 112 is an electrode of the electro-absorption optical modulator 110. Electrode 103 of DFB laser 100
And the electrode 105 of the electro-absorption optical modulator 100 are electrically separated.

As described above, in the electro-absorption optical modulator integrated DFB laser, the first waveguide 101 having the diffraction grating 102 formed therein and the second waveguide 111 having the diffraction grating 102 not formed therein are formed. Are integrally formed so as to be in series with each other.

Hereinafter, the electroabsorption type optical modulator integrated type D will be described.
A general method for manufacturing an FB laser will be described with reference to FIG.

First, as shown in FIG. 9A, a diffraction grating 102 is formed on a region of the crystal substrate 120 which will be the first cladding layer in which the DFB laser 100 is to be formed, while on the crystal substrate 120. Electro-absorption type optical modulator 1
A flat portion 113 (a region where no diffraction grating is formed) is left in the region where 10 is formed.

Next, as shown in FIG. 9B, a waveguide including an active layer of the DFB laser 100 and a light absorbing layer of the electroabsorption type optical modulator 110 on the diffraction grating 102 and the flat portion 113. After the first crystal layer 121 to be a layer is formed, the second crystal layer 122 to be a second clad layer is formed over the first crystal layer 121.

Next, as shown in FIG. 9 (c), the first crystal layer 121 and the second crystal layer 122 are etched by a lithographic process to form a waveguide 123, and then on the crystal substrate 120. The high resistance semiconductor layer 104 is formed in a region forming the DFB laser 100.

Next, as shown in FIG. 9 (d), the electrode 103 of the DFB laser 100, the electrode 112 of the electro-absorption optical modulator 110, and the separating portion 124 for separating the electrodes 103, 112 from each other are provided in the waveguide 123. To form. Further, after etching the back surface side of the crystal substrate 120 to adjust the thickness of the element, the ground electrode 125 is formed on the back surface of the crystal substrate 120. End face of first waveguide 101 and second waveguide 1
An optical film 126 is formed on each of the end faces of 11.

In the method of manufacturing the electro-absorption optical modulator integrated DFB laser described above, as shown in FIG.
The diffraction grating 102 and the flat portion 113 are formed on the crystal substrate 120.
And must be formed continuously. By the way, the interference exposure method using coherent light as a light source is known as a simple method for forming the diffraction grating 102, and its feature is that the interference fringes of the diffraction grating formed of thin lines having a width smaller than the diffraction limit are inexpensive. That is, it can be transferred to the resist in a short time by the apparatus. Therefore, when selectively forming the diffraction grating,
The use of the interference exposure method is effective in reducing the manufacturing cost.

A first conventional method for selectively forming a diffraction grating using the interference exposure method will be described below with reference to FIG.

First, as shown in FIG. 10A, after the SiN film 140 is selectively formed in the region on the crystal substrate 120 where the electro-absorption type optical modulator is formed, the crystal substrate 1 is then formed.
A positive type resist film 141 is applied over the entire surface of No. 20. Thereafter, as shown in FIG. 10B, interference exposure is performed in which the coherent light beams 142 of two light beams are obliquely emitted from two directions which are opposite to each other.

Next, when the positive resist film 141 is developed, as shown in FIG. 10C, the SiN film 1 is formed.
A resist pattern 143 in the form of a diffraction grating is formed on the surface of the crystal substrate 120 including the surface of 40 by the interference of the two light beams of the coherent light beam 142.

Next, the crystal substrate 120 is etched with an etchant that does not dissolve the SiN film 140 but dissolves the crystal substrate 120.
When the etching is performed on, that is, the SiN film 1
When the crystal substrate 120 is etched using 40 as an etching mask, as shown in FIG. 10D, the diffraction grating-shaped resist pattern 143 is selected only in the region of the crystal substrate 120 not covered by the SiN film 140. Are transferred to form the diffraction grating 102 selectively.

Next, as shown in FIG. 10 (e), SiN
After removing the resist pattern 143 on the surface of the film 140 and the crystal substrate 120 with an organic cleaning liquid, the SiN film 140 is removed.
When the SiN film 140 is removed by using an etching solution that dissolves but does not dissolve the crystal substrate 120, the flat portion 113 is exposed.

A second conventional method for selectively forming a diffraction grating using the interference exposure method will be described below with reference to FIG.

First, as shown in FIG. 11A, a positive resist film 141 is formed over the entire surface of a crystal substrate 120, and then an electroabsorption type optical modulator on the positive resist film 141 is formed. With the photomask 144 in close contact with the surface of the positive resist film 141 in the region to be formed, 2
The coherent light 142 of the luminous flux is used as the positive resist film 141.
Interferometric exposure is performed.

Next, when the positive resist film 141 is developed, as shown in FIG.
A resist pattern 143 in the form of a diffraction grating due to the interference of the two light beams of the coherent light beam 142 is formed only in the region of the upper part 20 which is not covered with the photomask 144. After that, the crystal substrate 120 is formed using the positive resist film 141 and the diffraction grating-shaped resist pattern 143 as a mask.
11D, a resist pattern 143 is formed on the surface of the crystal substrate 120 as shown in FIG.
Are selectively transferred to form the diffraction grating 102 selectively.

Next, when the surface of the crystal substrate 501 is washed so as to peel off the positive resist film 141 and the resist pattern 143, the diffraction grating 102 and the flat portion 113 are exposed.

When the diffraction grating 102 is selectively formed on the crystal substrate 120 by the first or second conventional method, the diffraction grating 102 that is selectively formed and the subsequent steps are formed. It is necessary to form alignment marks in advance for alignment with other patterns.

A conventional semiconductor substrate having an alignment mark will be described below with reference to FIG.

In FIG. 12, 150 is a crystal substrate 120.
The alignment pattern 150 has a thickness of 0.25 μm and is formed so as to project on the surface of the alignment pattern 150. The alignment pattern 150 is made of a SiO ₂ film. By making the alignment pattern 150 project from the surface of the crystal substrate 120, the alignment pattern 150 can be recognized even if a resist is applied on the alignment pattern 150.

[0024]

By the way, since the resist forming the positive resist film 141 is usually supplied by the spin coating method, according to the first conventional method of selectively forming the diffraction grating, the resist is As a result of being supplied in large amounts in the vicinity of the end of the SiN film 140 on the surface of the crystal substrate 120, as shown in FIG. 10A, the vicinity of the end of the SiN film 140 in the positive resist film 141 is higher than the other part. Also the film thickness locally increases. Also, the film thickness of the positive resist film 141 is, as a whole, seen in the crystal substrate 120.
The variation is larger than that in the case where the SiN film 140 is not formed on the surface. Therefore, in the interference exposure step shown in FIG. 10B, the shape of the diffraction grating-shaped resist pattern 143 made of the positive type resist film 141 is significantly distorted or the diffraction pattern disappears.

Since the appropriate exposure time and development time are different between the relatively thick portion and the relatively thin portion of the positive resist film 141, the resist pattern 1
The height of the crests and the depth of the troughs of 43 are non-uniform on the surface of the crystal substrate 120. Further, in the vicinity of the SiN film 140, the resist pattern 143 may be completely melted during development and the crystal substrate 120 may be exposed.

Therefore, the diffraction grating 102 formed after the etching has a distorted shape and a non-uniform depth.
In particular, since the resist pattern 143 is often completely peeled off in the vicinity of the SiN film 140, the crystal substrate 120 is largely etched to be etched.

FIG. 13 shows a typical example of the diffraction grating 102 produced by the first conventional method.
As shown in (a), SiN in the resist film 141
In the diffraction grating 102 at a portion corresponding to the vicinity of the end 141a of the film 140, the portion 102a having a uniform depth.
A deeper etched portion 102b and a distorted portion 102c appear.

According to the second conventional method, when the coherent light 142 is subjected to the interference exposure, unnecessary interference noise light is generated from the end portion of the photomask 144, and the unnecessary interference noise light is the necessary diffraction grating. Is projected onto the positive resist film 141 together with the interference light. Therefore, after the development of the positive resist film 141, unnecessary noise patterns due to interference noise light appear in addition to the diffraction grating resist pattern. Further, when the output density of the interference noise light is high, the positive resist film 141 is partly peeled off, and the necessary diffraction grating interference pattern disappears from the resist pattern. Then, the crystal substrate 120
After the etching process for the crystal substrate 12, an unnecessary noise pattern other than the pattern of the diffraction grating 102 is formed.
It will be formed on 0. In addition, there is a problem that the diffraction grating pattern is not partially formed in a region on the surface of the crystal substrate 120 where the pattern of the diffraction grating 102 is required. In this case, the crystal substrate 120 is largely etched in the portion where the diffraction grating pattern does not originally exist.

FIG. 14 shows a typical example of the diffraction grating 102 manufactured by the second conventional method for selectively forming the diffraction grating. As shown in FIG.
In a region corresponding to the vicinity of the end portion 144a of the photomask 144 in, the portion 102 having a uniform depth.
A portion 102b etched deeper than a and an unnecessary pattern portion 102d caused by interference noise appear.

In the diffraction grating 102 formed by the above-mentioned first and second conventional methods, the diffraction grating 102
In many cases, a noise pattern is engraved in the vicinity of the boundary between the portion where the light is formed and the portion where the light is not formed, or a portion which is deeper than the original depth of the diffraction grating 102 is formed. When an electro-absorption optical modulator integrated DFB laser is manufactured using such a diffraction grating, the optical waveguide loss increases and the oscillation spectrum width also increases.

In the conventional method of forming the alignment mark, as shown in FIG. 15, since the alignment mark 150 is projected from the crystal substrate 120, the alignment in the resist film 141 formed on the crystal substrate 120 is performed. In the vicinity portion 141a of the mark 150, the film thickness of the resist film 141 is largely varied, and compared to a region where the alignment mark 150 is not formed,
A part having a remarkably thick film and a part having a thin film are formed. Therefore, if the resist film 141 is exposed and developed, there is a problem that good exposure and development cannot be performed.

In view of the above, although the present invention uses the interference exposure method which is a method of forming an interference fringe pattern at a low cost, the depth and shape are uniform near the boundary with the flat portion on the substrate. A first object is to enable stable formation of the interference fringe pattern portion, and a second object is to prevent variation in the film thickness in the portion on the alignment mark in the resist film.

[0033]

The solution means provided by the invention of claim 1 is directed to a method for manufacturing a semiconductor device having an interference fringe pattern portion and a flat portion in succession on a substrate, and a negative on the substrate. A negative resist film, a step of printing a pattern of interference fringes on the negative resist film by irradiating the negative resist film with coherent light of a plurality of light beams so as to interfere with each other, After covering a portion of the resist film corresponding to the interference fringe pattern portion formation region of the substrate with a photomask, the negative resist film is irradiated with one light beam of non-coherent light, and then the negative resist film is developed. As a result, a resist pattern made of the negative type resist film is formed on the interference fringe pattern portion formation region of the substrate and the flat portion formation region of the substrate is formed. The step of leaving the negative resist film, and etching the substrate using the resist pattern and the remaining negative resist film as an etching mask, thereby forming an interference fringe pattern portion on the lower side of the resist pattern on the substrate. And forming a flat portion on the lower side of the remaining negative resist film on the substrate, and removing the resist pattern and the remaining negative resist film, the interference fringe pattern portion of the substrate and And a step of exposing the flat portions, respectively.

According to the structure of claim 1, a pattern of interference fringes is printed on the negative resist film formed on the substrate, and a photomask is formed on a portion of the negative resist film corresponding to the interference fringe pattern portion forming region of the substrate. When the negative resist film is developed after the above pattern is baked, a resist pattern composed of the negative resist film is formed on the interference fringe pattern portion formation region of the substrate and the negative type resist film is formed on the flat portion formation region of the substrate. The resist film remains. When the substrate is etched using the resist pattern and the remaining negative resist film as an etching mask, an interference fringe pattern portion is formed on the lower portion of the resist pattern on the substrate and the remaining negative resist film on the substrate is removed. A flat portion is formed on the side portion.

The solution means taken by the invention of claim 2 is directed to a method of manufacturing a semiconductor device having an interference fringe pattern portion and a flat portion in succession on a substrate, and forms a positive resist film on the substrate. And a step of baking a pattern of interference fringes on the positive resist film by irradiating the positive resist film with coherent light of a plurality of light beams so as to interfere with each other, and the pattern of the interference fringes is baked. After covering a portion of the positive resist film corresponding to the interference fringe pattern portion forming region of the substrate with a photomask, the positive resist film is irradiated with one light beam of non-coherent light, and then the positive resist film is formed. By developing the resist film, a resist pattern made of the positive resist film is formed on the interference fringe pattern portion formation region of the substrate. An interference fringe pattern is formed on the lower side of the resist pattern on the substrate by removing the positive resist film on the flat portion formation region of the plate and etching the substrate using the resist pattern as an etching mask. And a step of forming a flat portion in the flat portion forming region of the substrate, and a step of removing the resist pattern to expose the interference fringe pattern portion and the flat portion of the substrate, respectively. It is what

According to the structure of claim 2, an interference fringe pattern is printed on the positive resist film formed on the substrate, and a pattern of the photomask is formed on a portion of the positive resist film corresponding to the interference fringe pattern portion forming region of the substrate. After baking, the positive type resist film is developed to form a resist pattern on the interference fringe pattern portion forming region of the substrate and remove the positive type resist film on the flat portion forming region of the substrate. When the substrate is etched using the resist pattern as an etching mask, an interference fringe pattern portion is formed on the lower portion of the resist pattern on the substrate and a flat portion is formed on the flat portion forming region of the substrate.

A solution means taken by the invention of claim 3 is directed to a method of manufacturing a semiconductor device having an interference fringe pattern portion and a flat portion in succession on a substrate, and forms a negative resist film on the substrate. And a step of covering the portion of the negative resist film corresponding to the interference fringe pattern portion formation region of the substrate with a photomask, and then irradiating the negative resist film with one light beam of non-coherent light. The step of printing the pattern of the photomask on the negative resist film, and the pattern of interference fringes are printed on the negative resist film by irradiating the negative resist film with coherent light of a plurality of light beams so as to interfere with each other. And the step of developing the negative resist film to form the negative resist film on the interference fringe pattern portion forming region of the substrate. By forming a resist pattern and leaving the negative resist film on the flat portion forming region of the substrate, and etching the substrate using the resist pattern and the remaining negative resist film as an etching mask. A step of forming an interference fringe pattern portion on a lower portion of the resist pattern on the substrate and forming a flat portion on a lower portion of the remaining negative resist film on the substrate, the resist pattern and the remaining negative die Remove the resist film,
And a step of exposing the interference fringe pattern portion and the flat portion of the substrate, respectively.

According to the structure of claim 3, a pattern of the photomask is printed on a portion of the negative resist film formed on the substrate corresponding to the interference fringe pattern portion forming region of the substrate, and the negative resist film is interfered with. When the negative resist film is developed after the stripe pattern is printed, a resist pattern made of the negative resist film is formed on the interference fringe pattern portion formation region of the substrate and a negative portion is formed on the flat portion formation region of the substrate. The mold resist film remains. When the substrate is etched using the resist pattern and the remaining negative resist film as an etching mask, an interference fringe pattern portion is formed on the lower portion of the resist pattern on the substrate and the remaining negative resist film on the substrate is removed. A flat portion is formed on the side portion.

A solution means taken by the invention of claim 4 is directed to a method for manufacturing a semiconductor device having an interference fringe pattern portion and a flat portion in succession on a substrate, and forms a positive resist film on the substrate. And a step of covering a portion of the positive resist film corresponding to the interference fringe pattern portion forming region of the substrate with a photomask pattern, and then irradiating the positive resist film with one light flux of non-coherent light. A step of baking the photomask pattern on the positive resist film, and a pattern of interference fringes on the positive resist film by irradiating the positive resist film with coherent light of a plurality of light beams so as to interfere with each other. Step, and by developing the positive resist film, the positive resist film is formed on the interference fringe pattern portion forming region of the substrate. Forming a resist pattern on the substrate and removing the positive type resist film on the flat portion forming region of the substrate; and etching the substrate using the resist pattern as an etching mask to form the resist pattern on the substrate. A step of forming an interference fringe pattern part on the lower side of the substrate and forming a flat part on the flat part formation region of the substrate, and removing the resist pattern to expose the interference fringe pattern part and the flat part of the substrate, respectively. And a step of performing the steps.

According to the structure of claim 4, a pattern of the photomask is printed on a portion of the positive resist film corresponding to the interference fringe pattern portion forming region of the substrate, and the positive fringe pattern is formed on the positive resist film formed on the substrate. After baking, the positive type resist film is developed to form a resist pattern on the interference fringe pattern portion forming region of the substrate and remove the positive type resist film on the flat portion forming region of the substrate. When the substrate is etched using the resist pattern as an etching mask, an interference fringe pattern portion is formed on the lower portion of the resist pattern on the substrate and a flat portion is formed on the flat portion forming region of the substrate.

The solution means taken by the invention of claim 5 is the first
And a step of forming a mask layer made of a second crystal on the flat part of the substrate, which is directed to a method for manufacturing a semiconductor device having an interference fringe pattern part and a flat part in succession on the substrate made of crystal. A step of forming a resist film over the entire surface of the substrate, and a step of printing a pattern of interference fringes on the resist film by irradiating the resist film with coherent light of a plurality of light beams so as to interfere with each other. , A step of forming an interference fringe-shaped resist pattern made of the resist film by developing the resist film, and etching the substrate and the mask layer using the resist pattern as an etching mask,
A step of forming an interference fringe pattern portion on each of the interference fringe pattern portion forming region of the substrate and the mask layer, and removing the resist pattern to expose each of the interference fringe pattern portions of the substrate and the mask layer, A step of removing the mask layer to expose the flat portion of the substrate.

According to the structure of claim 5, the mask layer made of the second crystal is formed on the flat portion forming region of the substrate made of the first crystal, and the resist film is formed on the substrate including the mask layer. After that, an interference fringe pattern is printed on the resist film,
Then, when the resist film is developed, a resist pattern is formed on the substrate including the mask layer. When the substrate including the mask layer is etched using the resist pattern as an etching mask, since the mask layer is made of the second crystal, the interference fringe pattern portion is continuously formed on the entire surface of the substrate including the mask layer. The pattern of interference fringes does not become discontinuous at the boundary between the region where the mask layer is formed and the region where the mask layer is not formed on the substrate. Further, since the mask layer made of the second crystal has a small thickness unlike the photomask made of SiN or the like, the resist film on the upper side of the end portion of the mask layer is less likely to vary in film thickness, and the exposure time and the development time are reduced. Differences in time are unlikely to occur, and interference noise light is less likely to occur from the end of the mask layer.

The solving means taken by the invention of claim 6 is the first
A method for manufacturing a semiconductor device having an interference fringe pattern portion and a flat portion in succession on a substrate made of a crystal, the interference fringe pattern portion being formed in the interference fringe pattern portion forming region and the flat portion forming region of the substrate, respectively. And a step of forming a mask layer made of a second crystal on the interference fringe pattern portion of the substrate, and a flat portion of the substrate is formed by performing full etching on the substrate and the mask layer. The method includes the steps of forming a flat portion in the region and removing the surface portion of the mask layer, and exposing the interference fringe pattern portion of the substrate by selectively etching the mask layer. It is to be configured.

According to the structure of claim 6, after the interference fringe pattern portions are formed in the interference fringe pattern portion formation region and the flat portion formation region of the substrate, respectively, a mask made of the second crystal is formed on the interference fringe pattern portion of the substrate. Since the interference fringe pattern part is continuously formed on the entire surface of the substrate to form the layer, the pattern of the interference fringes is formed at the boundary between the region where the mask layer is formed and the region where the mask layer is not formed on the substrate. Does not become discontinuous. Since the substrate is made of the first crystal and the mask layer is made of the second crystal, the interference fringe pattern portion and the mask layer formed in the flat portion forming region of the substrate are entirely etched to form the flat portion of the substrate. In addition, the mask layer can be selectively etched to remove the mask layer leaving the flat portion of the substrate.

According to the structure of claims 1 to 6, after the resist film is formed on the substrate and the etching mask formed on the flat portion forming region of the substrate as in the prior art, the resist film is subjected to interference fringes. Since it does not have a patterning process, the resist pattern on the upper side of the end of the etching mask has a variation in film thickness, which causes distortion of the interference fringe pattern, and the interference fringes due to the difference in exposure time and development time. It is possible to avoid the situation where the heights of the peaks and the depths of the valleys of the resist pattern are uneven, and the resist film is formed after the photomask is formed on the resist film formed on the substrate. Since there is no step of printing the pattern of the interference fringes on the substrate, it is possible to avoid a situation where the noise pattern due to the interference noise light from the end of the photomask is transferred to the resist film.

According to a seventh aspect of the present invention, a semiconductor substrate is provided with a crystal substrate and an alignment mark for exposure, which is composed of a collection portion of diffraction gratings formed on the surface of the substrate. It is to be configured.

Since the alignment mark composed of a collection of diffraction gratings formed on the surface of the substrate is provided and does not protrude from the surface of the substrate unlike the conventional alignment mark, the resist film is formed near the alignment mark on the surface of the substrate. There is no variation in film thickness.

[0048]

DETAILED DESCRIPTION OF THE INVENTION A method of manufacturing a semiconductor device according to a first embodiment of the present invention will be described below with reference to FIG.

First, as shown in FIG. 1A, a negative resist film 11 is applied on the entire surface of a crystal substrate 10 made of InP, and then the negative resist film 11 is baked, and thereafter, the negative resist film 11 is baked. , The negative resist film 11 has a wavelength of 3
Interferometric exposure is performed by irradiating two coherent light beams 12 of 25 nm, which are parallel to each other, from two mutually opposite directions at an incident angle of 54.3 °. In this step, a diffraction grating pattern is printed on the negative resist film 11.

Next, as shown in FIG. 1B, a contact photomask 13 is formed so as to be in close contact with the surface of the negative resist film 11, and then the contact photomask 1 is formed.
3, the exposure light 14 which is non-coherent parallel light having a wavelength of 451 nm is incident on the negative resist film 11 at an incident angle of 90 °.
Contact exposure is performed by irradiating with. The pattern portion 13a of the contact photomask 13 completely blocks the exposure light 14, while the non-pattern portion 13b transmits most of the exposure light 14. Therefore, the portion of the negative resist film 11 corresponding to the diffraction grating formation region 10a of the crystal substrate 10 is not irradiated with the exposure light 14, but the portion of the negative resist film 11 corresponding to the flat portion formation region 10b of the crystal substrate 10 is formed. The exposure light 14 is applied to the light.

Next, as shown in FIG. 1C, after removing the contact photomask 13, the negative resist film 1 is formed.
1 is developed, the negative type resist film 11 remains on the entire surface of the flat portion forming region 10b of the crystal substrate 10, while the diffraction grating pattern is formed on the diffraction grating forming region 10a of the crystal substrate 10. A resist pattern 15 is formed.

Next, when the crystal substrate 10 is wet-etched using the remaining negative resist film 11 and resist pattern 15, the resist pattern on the crystal substrate 10 is formed as shown in FIG. While the diffraction grating 16 is formed in the region where 15 is formed, the region where the negative resist film 11 remains on the crystal substrate 10 is not etched and a flat portion 17 is formed.

Next, when the negative type resist film 11 and the resist pattern 15 are removed by performing organic cleaning, the diffraction grating 16 and the flat portion 17 having a pitch of 0.2 μm are exposed.
The height of the diffraction grating 16 is 0.15 μm, and the flat portion 1
The surface roughness of 7 is below the measurement limit.

Hereinafter, a method of manufacturing a semiconductor device according to the second embodiment of the present invention will be described with reference to FIG.

First, as shown in FIG. 2A, a positive resist film 21 is applied over the entire surface of a crystal substrate 20 made of InP, and then the positive resist film 21 is baked, and thereafter, the positive resist film 21 is baked. , The positive resist film 21 has a wavelength of 3
Interferometric exposure is performed by irradiating two coherent light beams 22 of two 25-nm light fluxes from two mutually opposite directions at an incident angle of 54.3 °. In this step, a diffraction grating pattern is printed on the positive resist film 21.

Next, as shown in FIG. 2B, a contact photomask 23 is formed so as to be in close contact with the surface of the positive type resist film 21, and then the contact photomask 2 is formed.
3, the exposure light 14 which is a non-coherent parallel light having a wavelength of 451 nm is incident on the positive resist film 21 at an incident angle of 90 °.
Contact exposure is performed by irradiating with. The pattern portion 23a of the contact photomask 23 completely blocks the exposure light 24, while the non-pattern portion 23b transmits most of the exposure light 24. Therefore, the portion of the positive resist film 21 corresponding to the diffraction grating formation region 20a of the crystal substrate 20 is not irradiated with the exposure light 24, but the portion of the positive resist film 21 corresponding to the flat portion formation region 20b of the crystal substrate 20. The exposure light 24 is applied to the light source.

Next, as shown in FIG. 2C, after removing the contact photomask 23, the positive resist film 2 is removed.
1 is completely developed, the positive resist film 21 is completely removed on the flat portion forming region 20b of the crystal substrate 20, while the diffraction grating forming region 2 of the crystal substrate 20 is formed.
A diffraction grating-shaped resist pattern 25 is formed on the surface 0a.

Next, when wet etching is performed on the crystal substrate 20 using the resist pattern 25, as shown in FIG.
As shown in (d), a diffraction grating 26 is formed in the region on the crystal substrate 20 where the resist pattern 25 is formed.
On the other hand, a region on the crystal substrate 20 where the positive resist film 21 is removed is etched to form a flat portion 27.

Next, organic cleaning is performed to remove the resist pattern 25, and then the diffraction grating 26 with a pitch of 0.2 μm is formed.
And the flat part 27 is exposed. The height of the diffraction grating 26 is 0.
15 μm, the surface roughness of the flat portion 27 is 0.02 μm.
m.

A method of manufacturing a semiconductor device according to the third embodiment of the present invention will be described below with reference to FIG.

First, as shown in FIG. 3A, a negative resist film 31 is applied over the entire surface of a crystal substrate 30 made of InP, and then the negative resist film 31 is baked. After that, a contact photomask 33 is formed so as to be in close contact with the surface of the negative resist film 31, and then the contact photomask 33 is used to form a wavelength 451.
Contact exposure is performed by irradiating the negative resist film 31 with the exposure light 34, which is non-coherent parallel light of nm, at an incident angle of 90 °. The pattern portion 33 of the contact photomask 33
a completely blocks the exposure light 34, but the non-patterned portion 33
b transmits most of the exposure light 34. Therefore, the portion of the negative resist film 31 corresponding to the diffraction grating formation region 30a of the crystal substrate 30 is not irradiated with the exposure light 34, but the portion of the negative resist film 31 corresponding to the flat portion formation region 30b of the crystal substrate 30. The exposure light 34 is applied to the light source.

Next, after removing the contact photomask 33, the negative type resist 31 film is irradiated with parallel coherent light beams 32 having a wavelength of 325 nm from two directions opposite to each other at an incident angle of 54.3 °. Perform exposure. In this step, a diffraction grating pattern is printed on the negative resist film 31.

Next, when the negative resist film 31 is developed, the negative resist film 31 is entirely left on the flat portion forming region 30b of the crystal substrate 30, while the diffraction grating of the crystal substrate 30 is formed. A diffraction grating-shaped resist pattern 35 is formed on the region 30a.

Next, the remaining negative type resist film 31 and the resist pattern 35 are used to perform wet etching on the crystal substrate 30 to form a resist pattern on the crystal substrate 30, as shown in FIG. A diffraction grating 36 is formed in the region where 35 is formed, while the negative resist film 31 remaining on the crystal substrate 30 is not etched and a flat portion 37 is formed.

Next, when the negative type resist film 31 and the resist pattern 35 are removed by organic cleaning, the diffraction grating 36 and the flat portion 37 having a pitch of 0.2 μm are exposed.
The height of the diffraction grating 36 is 0.15 μm, and the flat portion 3
The surface roughness of 7 is below the measurement limit.

Hereinafter, a method for manufacturing a semiconductor device according to the fourth embodiment of the present invention will be described with reference to FIG.

First, as shown in FIG. 4A, a positive resist film 41 is applied on the entire surface of a crystal substrate 40 made of InP, and then the positive resist film 41 is baked. Next, after forming a contact photomask 43 so as to be in close contact with the surface of the positive type resist film 41, a wavelength 451 is formed using the contact photomask 43.
Contact exposure is performed by irradiating the positive resist film 41 with the exposure light 44, which is non-coherent parallel light of nm, at an incident angle of 90 °. The pattern portion 43 of the contact photomask 43
a completely blocks the exposure light 44, but the non-pattern portion 43
b transmits most of the exposure light 44. Therefore, the portion of the positive resist film 41 corresponding to the diffraction grating forming region 40a of the crystal substrate 40 is not irradiated with the exposure light 44, but the flat portion forming region 40 of the positive resist film 41 is formed.
The portion corresponding to b is irradiated with the exposure light 44.

Next, as shown in FIG. 4B, after removing the contact photomask 43, the positive resist 41 is removed.
Two coherent light beams with a wavelength of 325 nm that are parallel to the film 4
2 incident angle 54.3 ° from two mutually opposite directions
Interferometric exposure is performed. In this step, a diffraction grating pattern is printed on the positive resist film 41.

Next, when the positive resist film 41 is developed, as shown in FIG. 4C, the positive resist film 41 is completely formed on the flat portion forming region 40b of the crystal substrate 40. While being removed, a diffraction grating-shaped resist pattern 45 is formed on the diffraction grating formation region 40a of the crystal substrate 40.

Next, as shown in FIG. 4D, when the crystal substrate 40 is wet-etched using the resist pattern 45, a region on the crystal substrate 40 where the resist pattern 45 is formed is formed. Is the diffraction grating 46
On the other hand, the region where the positive resist film 41 is removed on the crystal substrate 40 is etched to form a flat portion 47.

Next, organic cleaning is performed to remove the resist pattern 45, and then the diffraction grating 46 having a pitch of 0.2 μm is formed.
And the flat part 47 is exposed. The height of the diffraction grating 46 is 0.
15 μm, and the surface roughness of the flat portion 47 is 0.02 μm.
m.

Although the two-beam interference exposure method is used in the first to fourth embodiments, the same effect can be obtained by using interference exposure using a plurality of coherent light beams instead. can get.

A method of manufacturing a semiconductor device according to the fifth embodiment of the present invention will be described below with reference to FIG.

First, as shown in FIG. 5A, In is formed in the flat portion forming region on the crystal substrate 50 made of InP.
A mask layer 51 made of GaAsP crystal is grown by MOVPE method. The mask layer 51 has a uniform film thickness of 0.04 μm and its surface accuracy is good. next,
A positive resist film 52 is formed over the entire surface of the crystal substrate 50.
After applying, baking is performed. As previously mentioned,
Since the mask layer 51 is uniform and thin, there is no coating unevenness on the positive resist film 52.

Next, as shown in FIG. 5B, the positive resist 52 film is irradiated with two coherent light beams 53 having a wavelength of 325 nm in parallel from two directions opposite to each other at an incident angle of 54.3 °. Interference exposure is performed. In this step, a diffraction grating pattern is printed on the positive resist film 52.

Next, when the positive resist film 52 is developed, as shown in FIG. 5C, a diffraction grating resist pattern 54 is formed on the entire surfaces of the mask layer 51 and the crystal substrate 50. Is formed.

Next, when wet etching is performed using an etching solution that simultaneously dissolves both the InP crystal forming the crystal substrate 50 and the InGaAsP crystal forming the mask layer 51, as shown in FIG. 5D. Crystal substrate 5
The first diffraction grating 55 is formed on the surface of 0 and the second diffraction grating 56 is formed on the surface of the mask layer 51. In this etching step, since the crystal substrate 50 and the mask 51 are simultaneously etched, the first diffraction grating 55 and the second diffraction grating 56 having the same depth are simultaneously formed.

Next, after the organic pattern is washed to remove the resist pattern 54, InGa forming the mask layer 51 is formed.
InP that forms the crystal substrate 50 although the AsP crystal dissolves
When wet etching is performed using an etching solution that does not dissolve the crystal, the mask layer 51 having the first diffraction grating 55 is removed, and the flat portion 57 and the second diffraction grating 56 are exposed. The second diffraction grating 56 has a pitch of 0.2 μm, a depth of 0.036 μm and a height of 0.15 μm. Dispersion of second diffraction grating 55 and flat portion 5
The surface roughness of 7 is below the measurement limit.

Hereinafter, a method for manufacturing a semiconductor device according to the sixth embodiment of the present invention will be described with reference to FIG.

First, as shown in FIG. 6A, a depth of 0.1 is formed over the entire surface of a crystal substrate 60 made of InP crystal.
A diffraction grating 61 of 5 μm is formed.

Next, as shown in FIG. 6B, a mask layer 62 made of InGaAsP crystal and having a thickness of 0.2 μm is formed on the crystal substrate 60 on which the diffraction grating 61 is formed by MOVPE. Grow by law.

Next, as shown in FIG. 6C, isotropic etching is performed using an etching solution that simultaneously dissolves both the InP crystal forming the crystal substrate 60 and the InGaAsP crystal forming the mask layer 62. And the mask layer 62
Is removed, and the flat portion 63 is formed by removing the diffraction grating 61 in the region of the crystal substrate 60 where the mask layer 62 is not formed. In this etching step, since the crystal substrate 60 and the mask layer 62 are simultaneously etched, the etching of the crystal substrate 60 and the mask 62 layer proceeds similarly.
Etching depths in the vicinity of the mask layer 62 on the surface of the crystal substrate 60 and other portions are uniform.

Next, InGaA forming the mask layer 62 is formed.
Although the sP crystal dissolves, InP forming the crystal substrate 60
When the mask layer 62 is removed by etching using an etching solution that does not dissolve the crystal, the diffraction grating 61 and the flat portion 63 are exposed as shown in FIG. 6D. As a result, the diffraction grating 61 having a pitch of 0.2 μm and a depth of 0.15 μm is obtained, and the surface roughness of the flat portion 63 is 0.001 μm or less.

In each of the above-mentioned embodiments, the coherent light beams of two parallel light beams are made to interfere with each other to form an interference fringe pattern. However, the number of coherent light beams is not limited to two, and may be plural. The irradiation angle of light is also not limited. Further, in each of the above embodiments, the wavelength of the coherent light was 325 nm and the wavelength of the non-coherent light was 451 nm, but the wavelengths of the coherent light and the non-coherent light are not limited to the above values.

In each of the above embodiments, the interference fringe pattern portion is a diffraction grating with a pitch of 0.2 μm.
The interference fringe pattern portion is not limited to the diffraction grating and the pitch is not limited, and can be applied to various interference fringe patterns obtained by irradiating coherent light beams of a plurality of light beams so as to interfere with each other.

In each of the above embodiments, the substrate is made of InP crystal and the crystal forming the mask layer is made of InGaAsP crystal. However, the substrate and the mask layer are made of other crystal. Good.

In each of the above embodiments, the pattern of interference fringes is formed by wet etching, but instead of this, dry etching may be used.

Further, in the fifth embodiment, the positive type resist film is used, but instead of this, a negative type resist film may be used.

A semiconductor substrate according to the seventh embodiment of the present invention will be described below with reference to FIG.

As shown in FIG. 7A, an alignment mark 71 is formed on a crystal substrate 70 made of InP, and a portion outside the alignment mark 71 on the crystal substrate 70 is a flat portion 72. is there. FIG. 7B is an enlarged perspective view of the portion A in FIG. 7A. As shown in FIG. 7A, the alignment mark 71 has a pitch of 0.2 μm.
m of the diffraction grating 73, and the top surface of the peak portion of the diffraction grating 73 is flush with the surface of the flat portion 72. Also, the diffraction grating 7
3 has a depth of 0.15 μm and a width of 0.
It is 08 μm.

Therefore, when a resist film is formed on the surface of the crystal substrate 70 on which the alignment marks 71 are formed, the coating unevenness on the alignment pattern 71 in the resist film is extremely small. The diffraction grating 73 is
It absorbs light with a wavelength of 0.05 μm or more unnecessary for exposure. Further, a normal resist film has a high transmittance for light having a wavelength of 0.05 μm or more. Therefore, the alignment mark 7
1 can be identified while being flat so that the resist film formed thereon has no coating unevenness.

When a resist having a film thickness of 0.8 μm was applied to the surface of the crystal substrate 70 on which the alignment mark 71 was formed by spin coating, the variation in the resist film thickness around the alignment mark 71 was within ± 2%. It was extremely uniform.

In the seventh embodiment, the top surface of the peak portion of the diffraction grating 73 forming the alignment mark 71 is flush with the surface of the flat portion 72, but they are not necessarily flush. Good.

[0094]

According to the method for manufacturing a semiconductor device of the present invention, the interference fringe pattern is printed on the negative or positive resist film entirely formed on the substrate. Since the resist pattern is formed, the interference fringe pattern is distorted due to film thickness variation in the resist film on the upper side of the end of the etching mask, or the interference fringe-shaped resist pattern is caused by the difference in exposure time and development time. It is possible to avoid the situation where the heights of the peaks and the depths of the valleys become uneven, and also possible to avoid the situation where the noise pattern due to the interference noise light from the end of the photomask is transferred to the resist film. Therefore, at the boundary between the interference fringe pattern portion forming region and the flat portion forming region of the substrate, the resist pattern having a uniform depth and shape, and thus the interference fringe pattern is used by the interference exposure method. It can be formed at low cost Te.

According to the semiconductor substrate of the seventh aspect of the invention, the alignment mark is composed of a collective portion of diffraction gratings.
Since it does not protrude from the surface of the substrate, there is no variation in the film thickness of the resist film in the vicinity of the alignment mark on the surface of the substrate.

[Brief description of the drawings]

1A to 1E are cross-sectional views showing respective steps of a method for manufacturing a semiconductor device according to a first embodiment of the present invention.

2A to 2E are cross-sectional views showing respective steps of a method for manufacturing a semiconductor device according to a second embodiment of the present invention.

3A to 3E are cross-sectional views showing respective steps of a method for manufacturing a semiconductor device according to a third embodiment of the present invention.

4A to 4E are cross-sectional views showing respective steps of a method for manufacturing a semiconductor device according to a fourth embodiment of the present invention.

5A to 5E are cross-sectional views showing respective steps of a method for manufacturing a semiconductor device according to a fifth embodiment of the present invention.

6A to 6D are cross-sectional views showing each step of a method for manufacturing a semiconductor device according to a sixth embodiment of the present invention.

7A is a perspective view of a semiconductor substrate according to a seventh embodiment of the present invention, and FIG. 7B is an enlarged perspective view of a portion A in FIG. 7A.

FIG. 8 is a perspective view showing an example of an electroabsorption type optical modulator integrated DFB laser obtained by a conventional semiconductor device manufacturing method.

9A to 9D are perspective views showing each step after the diffraction pattern forming step in the conventional method of manufacturing an electro-absorption type optical modulator integrated DFB laser.

10A to 10E are cross-sectional views showing respective steps of a conventional method of manufacturing a first semiconductor device.

11A to 11E are cross-sectional views showing respective steps of a conventional method for manufacturing a second semiconductor device.

FIG. 12 is a schematic perspective view of a conventional semiconductor substrate.

13 (a) and 13 (b) are cross-sectional views illustrating a problem in the conventional method of manufacturing the first semiconductor device.

14 (a) and 14 (b) are cross-sectional views illustrating a problem in the conventional method of manufacturing the second semiconductor device.

FIG. 15 is a cross-sectional view illustrating a problem of a conventional semiconductor substrate.

[Explanation of symbols]

 Reference Signs List 10 crystal substrate 10a diffraction grating formation region 10b flat portion formation region 11 negative resist film 12 coherent light 13 contact photomask 13a pattern portion 13b non-pattern portion 14 non-coherent exposure light 15 resist pattern 16 diffraction grating 17 flat portion 20 crystal substrate 20a Diffraction grating forming region 20b Flat part forming region 21 Positive resist film 22 Coherent light 23 Contact photomask 23a Pattern part 23b Non-pattern part 24 Non-coherent exposure light 25 Resist pattern 26 Diffraction grating 27 Flat part 30 Crystal substrate 30a Diffraction grating Forming region 30b Flat part forming region 31 Negative resist film 33 Contact photomask 33a Pattern part 33b Non-pattern part 34 Non-coherent exposure light 35 Resist pattern 3 Diffraction grating 37 Flat part 40 Crystal substrate 40a Diffraction grating formation region 40b Flat part formation region 41 Positive resist film 43 Contact photomask 43a Pattern part 43b Non-pattern part 44 Non-coherent exposure light 45 Resist pattern 46 Diffraction grating 47 Flat part 50 Crystal substrate 51 Mask layer 52 Positive resist film 53 Coherent light 54 Resist pattern 55 First diffraction grating 56 Second diffraction grating 57 Flat part 60 Crystal substrate 61 Diffraction grating 62 Mask layer 63 Flat part 70 Crystal substrate 71 Alignment mark 72 Flat part 73 Diffraction grating

Claims (7)

[Claims] 1. A method of manufacturing a semiconductor device having an interference fringe pattern portion and a flat portion continuously on a substrate, the method comprising: forming a negative resist film on the substrate; and forming a plurality of negative resist films on the negative resist film. By irradiating the coherent light of the light flux so as to interfere with each other, a step of baking a pattern of interference fringes on the negative resist film, and a portion corresponding to the interference fringe pattern portion forming region of the substrate in the negative resist film. After covering with a photomask, the negative resist film is irradiated with one light beam of non-coherent light, and then the negative resist film is developed, so that the negative fringe pattern film is formed on the interference fringe pattern portion forming region of the substrate. Forming a resist pattern made of a negative resist film and leaving the negative resist film in the flat portion formation region of the substrate; Pattern and the remaining negative resist film are used as etching masks to etch the substrate to form an interference fringe pattern portion on the lower side of the resist pattern on the substrate and the remaining negative resist on the substrate. A step of forming a flat portion on the lower side of the film; and a step of removing the resist pattern and the remaining negative resist film to expose the interference fringe pattern portion and the flat portion of the substrate, respectively. A method for manufacturing a semiconductor device, comprising: 2. A method of manufacturing a semiconductor device having an interference fringe pattern portion and a flat portion in succession on a substrate, the method comprising: forming a positive resist film on the substrate; and forming a plurality of positive resist films on the positive resist film. The pattern of interference fringes is printed on the positive resist film by irradiating the coherent light of the light flux so as to interfere with each other, and the interference of the substrate in the positive resist film on which the pattern of the interference fringes is printed. After covering a portion corresponding to the stripe pattern portion forming region with a photomask, the positive resist film is irradiated with one light beam of non-coherent light, and then the positive resist film is developed to thereby form a substrate. A resist pattern made of the positive resist film is formed on the interference fringe pattern portion formation region, and the positive pattern is formed on the flat portion formation region of the substrate. The step of removing the mold resist film and the etching of the substrate using the resist pattern as an etching mask form an interference fringe pattern portion on the lower side of the resist pattern on the substrate and a flat portion forming region of the substrate. And a step of removing the resist pattern to expose the interference fringe pattern portion and the flat portion of the substrate, respectively. 3. A method of manufacturing a semiconductor device having an interference fringe pattern portion and a flat portion in succession on a substrate, the method comprising the step of forming a negative resist film on the substrate, and the substrate in the negative resist film. After covering a portion corresponding to the interference fringe pattern portion formation region with a photomask, the negative resist film is irradiated with one light beam of non-coherent light, whereby the pattern of the photomask is applied to the negative resist film. And a step of baking a pattern of interference fringes on the negative resist film by irradiating the negative resist film with coherent light of a plurality of light beams so as to interfere with each other, and developing the negative resist film. By doing so, it is possible to form a resist pattern made of the negative resist film on the interference fringe pattern portion forming region of the substrate. The step of leaving the negative resist film on the flat portion forming region of the substrate, and the resist pattern on the substrate by etching the substrate using the resist pattern and the remaining negative resist film as an etching mask. A step of forming an interference fringe pattern portion on a lower side portion of the substrate and forming a flat portion on a lower side portion of the remaining negative resist film on the substrate, and removing the resist pattern and the remaining negative type resist film. And a step of exposing the interference fringe pattern portion and the flat portion of the substrate, respectively. 4. A method of manufacturing a semiconductor device having an interference fringe pattern portion and a flat portion in succession on a substrate, the method comprising the steps of forming a positive resist film on the substrate, and the substrate in the positive resist film. Of the photomask pattern by irradiating the positive resist film with one light beam of non-coherent light after covering a portion corresponding to the interference fringe pattern portion forming region of the photomask pattern. And a step of baking a pattern of interference fringes on the positive resist film by irradiating the positive resist film with coherent light of a plurality of light beams so as to interfere with each other, and developing the positive resist film. By doing so, a resist pattern made of the positive resist film is formed on the interference fringe pattern portion formation region of the substrate. At the same time, the step of removing the positive type resist film on the flat portion forming region of the substrate, and the etching of the substrate using the resist pattern as an etching mask, thereby forming an interference pattern The method includes the steps of forming a pattern portion and forming a flat portion in the flat portion forming region of the substrate, and removing the resist pattern to expose the interference fringe pattern portion and the flat portion of the substrate, respectively. A method of manufacturing a semiconductor device, comprising: 5. A method of manufacturing a semiconductor device having an interference fringe pattern portion and a flat portion in succession on a substrate made of a first crystal, comprising a second crystal on the flat portion of the substrate. A step of forming a mask layer, a step of forming a resist film over the entire surface of the substrate, and a step of irradiating the resist film with coherent light of a plurality of light beams so as to interfere with each other, thereby interfering with the resist film. A step of baking a stripe pattern; a step of developing the resist film to form an interference fringe-shaped resist pattern formed of the resist film; and etching the substrate and the mask layer using the resist pattern as an etching mask. Performing a step of forming interference fringe pattern portions on the mask layer and the interference fringe pattern portion forming region of the substrate, respectively. Removing the strike pattern to expose each of the interference fringe pattern portions of the substrate and the mask layer, and then removing the mask layer to expose the flat portion of the substrate. Of manufacturing a semiconductor device. 6. A method of manufacturing a semiconductor device, comprising: an interference fringe pattern portion and a flat portion which are continuously formed on a substrate made of a first crystal; The steps of forming the interference fringe pattern portions, the step of forming a mask layer made of a second crystal on the interference fringe pattern portion of the substrate, and the step of completely etching the substrate and the mask layer. Exposing the interference fringe pattern part of the substrate by forming a flat part in the flat part formation region of the substrate and removing the surface part of the mask layer, and performing selective etching on the mask layer. A method of manufacturing a semiconductor device, comprising: 7. A semiconductor substrate comprising a substrate made of crystals and an alignment mark for exposure, which is made up of a collection of diffraction gratings formed on the surface of the substrate.