JPH0888269A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE: To provide a semiconductor device which is protected against kink in transistor characteristics while keeping a high reliability and a manufacturing method thereof. CONSTITUTION: A semiconductor device is equipped with an insulating film 2 formed on all the surface of a silicon substrate 1, silicon layers 3 formed like islands, and insulating films 4 which are formed between the silicon layers 3 and higher than them.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to an element isolation structure of a semiconductor device on an SOI and a manufacturing method thereof.

[0002]

2. Description of the Related Art Mesa isolation is known as an element isolation method for a semiconductor device on a thin film SOI. This is shown in FIG. As shown in FIG. 9A, an insulating film 2 (eg, silicon oxide film) is formed on a semiconductor substrate 1 (eg, silicon). The semiconductor layer 3 (for example, silicon) is formed in an island shape thereover. The thickness of the semiconductor layer 3 is, for example, 2
000 angstroms.

An advantage of this mesa type element isolation method is that the manufacturing method is simple. That is, the element isolation region can be formed by processing the semiconductor layer 3 formed on the entire surface by lithography and RIE.

However, the mesa-type element isolation has the following problems. FIG. 9B shows a cross-sectional shape of the gate electrode portion when the MOS transistor is formed on the thin film SOI substrate having the mesa type element isolation. Side etching occurs in the silicon oxide film 2 at the lower corners of the circled silicon layer 3, and the gate insulating film 5 and the gate electrode 6 wrap around there. This structure is formed because the silicon oxide film 2 is side-etched by etching with, for example, NH ₄ F before forming the gate insulating film. With such a structure, the breakdown voltage of the gate insulating film due to the lower portion of the corner, the etching residue of the gate electrode around the side etching portion, and the like are generated, which is a factor that greatly deteriorates the device characteristics and the yield. A method for solving such a problem will be described below. 10D and 10E are cross-sectional views taken along the line AA 'and BB' of the pattern shown in FIG. As shown in FIG. 10A, after oxidizing only the SOI substrate, SiN serving as an oxidation resistant material is deposited, the element region is patterned, and then processed by RIE. Then, the side surface of the SOI is oxidized and SiN is peeled off as shown in FIG.
In this way, by oxidizing the side surface of the SOI to a thickness such that the side surface of the SOI is not lost by the subsequent wet treatment, it is possible to prevent the above-mentioned hollowing of the oxide film.

[0005]

However, in the conventional example shown in FIG. 10 described above, as shown in FIG. 10 (c), the upper corner of the element region (A in FIG. (The part indicated by) is exposed, and when the gate oxidation is performed, the corner part becomes thin, which causes a problem of reliability.
Further, if the exposure of the corners is large, when the transistor is formed, the corner transistor causes a kink in the characteristics.

The semiconductor device and the method of manufacturing the same according to the present invention have been made in view of the above problems, and an object thereof is to prevent the oxide film in the lower part of the element region from being removed. It is an object of the present invention to provide a semiconductor device capable of preventing a kink of transistor characteristics while maintaining high reliability by preventing the upper corner of the element region from being exposed, and a method of manufacturing the same.

[0007]

In order to achieve the above object, a semiconductor device according to the first invention is formed with an insulating film formed on the entire surface of a semiconductor substrate and island-shaped on the insulating film. A semiconductor layer, and an insulating film formed between the semiconductor layers and having an upper surface higher than the semiconductor layer.

Also, in the method of manufacturing a semiconductor device according to the second invention, a step of etching a portion which becomes an element isolation region of the first semiconductor substrate, and a step of burying a first insulating film in the etched region. And a step of adhering the semiconductor substrate to a second semiconductor substrate having a second insulating film formed on the entire surface, and etching from a surface opposite to a side to which the first semiconductor substrate is adhered, Exposing the upper surface and the side surface of the first insulating film.

A semiconductor device according to a third aspect of the present invention includes an insulating layer, a silicon layer selectively formed on the insulating layer, a first oxide film formed on the silicon layer, and A sidewall of the silicon layer is provided with the silicon layer and a second oxide film selectively formed on the first oxide film.

Further, in the method of manufacturing a semiconductor device according to the fourth invention, a step of forming a first oxide film on a substrate on which a layer made of silicon is formed on an insulating layer, and the first oxide film. A step of forming a polysilicon or amorphous silicon layer on the polysilicon, a step of forming a nitride film on the polysilicon or the amorphous silicon, the nitride film, the polysilicon or the amorphous silicon layer, and the first Selectively etching and removing the oxide film and the layer made of silicon on the substrate, side surfaces of the remaining layer of silicon on the substrate, and side surfaces of the polysilicon or amorphous silicon layer Forming a second oxide film by oxidizing the silicon, and a step of selectively removing the nitride film and the polysilicon or amorphous silicon layer. It is equipped with

[0011]

That is, in the semiconductor device according to the first invention, after the insulating film is formed on the entire surface of the semiconductor substrate, the semiconductor layer is formed in an island shape on the insulating film. Then, an insulating film is formed between the semiconductor layers such that the height of the upper surface is higher than that of the semiconductor layers.

Also, in the method of manufacturing a semiconductor device according to the second invention, a portion of the first semiconductor substrate to be an element isolation region is etched and the first insulating film is embedded in the etched region. Next, the semiconductor substrate is bonded to a second semiconductor substrate having a second insulating film formed on the entire surface, and the first
By etching from the surface opposite to the side where the semiconductor substrate is bonded, the upper surface and the side surface of the first insulating film are exposed.

Further, in the semiconductor device according to the third invention, a silicon layer is selectively formed on the insulating layer, and the first oxide film is formed on the silicon layer. Next, a second oxide film is formed on the sidewall of the silicon layer by selectively projecting on the silicon layer and the first oxide film.

Further, in the method of manufacturing a semiconductor device according to the fourth aspect of the invention, the first oxide film is formed on the substrate on which the layer made of silicon is formed on the insulating layer. Next, a polysilicon or amorphous silicon layer is formed on the first oxide film, and a nitride film is formed on the polysilicon or amorphous silicon. Next, the nitride film, the polysilicon or amorphous silicon layer, the first oxide film, and the layer made of silicon on the substrate are selectively etched and removed to leave the remaining substrate. The side surface of the upper layer made of silicon and the side surface of the polysilicon or amorphous silicon layer are oxidized to form a second oxide film, and the nitride film and the polysilicon or amorphous silicon layer are selectively removed. .

[0015]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1A is a sectional view of element isolation according to the first embodiment of the present invention. The insulating film 4 is formed in the element isolation region, and the height of the upper surface of the insulating film 4 is made equal to that of the silicon layer 3 in the element region. In addition, FIG. 1B shows a sectional shape of element isolation according to a modification of the above-described embodiment. In this modification, the upper surface of the insulating film 4 in the element isolation region is made higher than the silicon layer 3.

2 and 3 show a method of manufacturing a semiconductor device according to a second embodiment of the present invention. First, as shown in FIG. 2A, a portion of the silicon substrate 3 which will be an element isolation region is etched to form a groove 3 '. The depth of the groove 3'is, for example, 2000 angstrom. Next, as shown in FIG. 2B, the insulating film 4 is formed on the entire surface. Next, FIG. 2 (c)
The insulating film 4 is embedded in the groove 3'by etching back as shown in FIG. Next, as shown in FIG. 3A, the silicon substrate 3 having the insulating film 4 embedded therein is bonded to the silicon substrate 1 having the insulating film 2 formed on the surface thereof. Then, as shown in FIG. 3B, the insulating film 4 is exposed on the surface by etching the silicon substrate 3. At this time, the upper surface of the silicon layer 3 is etched to the same height as the insulating film 4 or lower than that.

According to the first and second embodiments described above, since the island-shaped element region is formed by etching the silicon layer 3, the lower corner of the silicon layer 3 is not exposed. Therefore, the deterioration of the gate withstand voltage and the etching residue of the gate electrode, which are problems in the conventional example, do not occur.

FIG. 4A is a sectional view of an SOI element isolation structure formed by the method of the third embodiment of the present invention. The manufacturing process will be described below. First, the surface of the SOI substrate is oxidized (FIG. 4B), and polysilicon (poly) is used.
Si) or amorphous silicon (α-Si) is deposited (FIG. 4C). After that, for example, SiN is deposited as an oxidation resistant material (FIG. 4 (d)), then the element region is patterned (FIG. 4 (e)), and the SOI portion is processed by RIE (FIG. 4 (f)). . After that, the side surface and the upper corner of the element region are oxidized, and
An oxide film is formed so that the oxide film on the upper corner of the element region and the oxide film on the side surface of the element region are sufficiently thick (FIG. 4G).
Next, SiN as an oxidation resistant material and polysilicon or amorphous silicon are peeled off, and the oxide film is peeled off by a wet process to form an element region (FIG. 4 (h),
FIG. 4 (i)).

By sandwiching the polysilicon or the amorphous silicon in this way, the upper corner of the element region can be thickly oxidized, which is effective in suppressing the corner transistor. At the same time, since the side surface is also oxidized, it is possible to prevent the oxide film below the element region from being removed.

FIG. 5A is a sectional view of a semiconductor device formed by the method of the fourth embodiment of the present invention. The steps until the side surface of the element region and the upper corner are oxidized are formed in the same manner as the step (g) of the third embodiment shown in FIG. 4, and then the element isolation region is formed by an insulator such as TEOS-O ₃ or the like. Embedding by film formation and polishing (FIG. 5B, FIG.
(C)). At the same time as the polishing, the SiN film as the oxidation resistant material is also removed. After this, the polysilicon or amorphous silicon and the oxide film are peeled off to form an element region (FIGS. 5D and 5E). In this case, since the oxide film under the element region is completely covered with the insulator, no engraving occurs, and since the upper corner is thickly covered with the oxide film, the periphery of the element region may be etched. Absent. That is, the formation of the corner transistor can be prevented.

FIGS. 6 (b) and 6 (c) are sectional views taken along the lines AA 'and BB' of the pattern shown in FIG. 6 (a), showing a fifth embodiment of the present invention. There is. 7 and 8 show a manufacturing process for forming such a structure.

In the fifth embodiment, FIG. 4B of the third embodiment is used.
The oxide film shown in FIG. 4 is formed as a gate oxide film, and
Polysilicon or amorphous silicon shown in (c) is formed as polysilicon for the gate electrode. After that, the process is performed in the same manner as in the third embodiment up to the step of oxidizing the side surface and the upper corner of the element region (FIG. 7F). After that, only the oxidation resistant material is peeled off and a gate electrode such as tungsten silicide is deposited (FIG. 7H).

Next, patterning is performed in the shape of the gate electrode (FIGS. 8A and 8B), and etching is performed by RIE until the upper surface of the element region is exposed (FIGS. 8C and 8D). .
Here, FIGS. 8A and 8C are sectional views taken along the line AA ′, and FIGS. 8B and 8D are sectional views taken along the line BB ′. By forming the gate electrode first as in the fifth embodiment, formation of the corner transistor can be prevented without completely exposing the portion B shown in FIG. 8C.

According to the above-described third to fifth embodiments, when the side surface of the element region is oxidized, the upper corner of the element region can be thickly oxidized, so that the oxide film under the element region by wet etching in a later process can be performed. It is possible to prevent the upper corner from being exposed while preventing the undercut. That is, in the element isolation of the MOSFET using the SOI substrate, it is possible to prevent a short circuit of the wiring due to the oxide film undercut in the element region and prevent the kink of the transistor characteristic due to the corner transistor at the upper corner.

[0025]

According to the present invention, since the oxide film in the lower portion of the element region is not removed and the upper corner of the element region is not exposed, the high reliability is maintained and the kink of the transistor characteristics is prevented. it can.

[Brief description of drawings]

FIG. 1 is a diagram showing a structure of a semiconductor device according to a first exemplary embodiment of the present invention.

FIG. 2 is a diagram showing a part of the manufacturing process according to the second embodiment of the present invention.

FIG. 3 is a diagram showing a part of the manufacturing process according to the second embodiment of the present invention.

FIG. 4 is a diagram showing a third embodiment of the present invention.

FIG. 5 is a diagram showing a fourth embodiment of the present invention.

FIG. 6 is a diagram showing a structure of a semiconductor device according to a fifth exemplary embodiment of the present invention.

FIG. 7 is a diagram showing part of the process of manufacturing the semiconductor device shown in FIG.

FIG. 8 is a diagram showing part of the process of manufacturing the semiconductor device shown in FIG.

FIG. 9 is a diagram for explaining a defect of the conventional manufacturing method.

FIG. 10 is a diagram for explaining another defect of the conventional manufacturing method.

[Explanation of symbols]

1 ... Silicon substrate, 2 ... Insulating film, 3 ... Silicon layer, 4 ...
Insulating film.

Claims (4)

[Claims] 1. An insulating film formed on the entire surface of a semiconductor substrate, a semiconductor layer formed on the insulating film in an island shape, and formed between the semiconductor layers and having a top surface higher than the semiconductor layer. A semiconductor device comprising: 2. A step of etching a portion to be an element isolation region of a first semiconductor substrate, a step of burying a first insulating film in the etched region, and a second insulating film over the entire surface of the semiconductor substrate. Second film formed
Adhering to the semiconductor substrate, and exposing the top surface and side surfaces of the first insulating film by etching from the surface opposite to the adhering side of the first semiconductor substrate. A method for manufacturing a semiconductor device, comprising: 3. An insulating layer, a silicon layer selectively formed on the insulating layer, a first oxide film formed on the silicon layer, the silicon layer and the silicon oxide on the sidewall of the silicon layer. A second oxide film formed so as to selectively project on the first oxide film, and a semiconductor device. 4. A step of forming a first oxide film on a substrate on which a layer made of silicon is formed on an insulating layer, and a step of forming a polysilicon or amorphous silicon layer on the first oxide film. A step of forming a nitride film on the polysilicon or the amorphous silicon, the nitride film, the polysilicon or the amorphous silicon layer, the first oxide film, and the silicon layer on the substrate. Selectively etching and removing the side surface of the remaining layer of silicon on the substrate and the side surface of the polysilicon or amorphous silicon layer to form a second oxide film. And a step of selectively removing the nitride film and the polysilicon or amorphous silicon layer. Manufacturing method.