JPH0888172A - Manufacture of polycrystalline silicon film - Google Patents

Abstract

PURPOSE: To obtain a poly-Si film excellent in crystallinity which can be formed by a low temperature process in a short time, and can obtain excellent characteristics when applied to a TFT. CONSTITUTION: An a-Si film 102 and an a-SiGe (Sinx Ge1-x , 0<=x<1) film 103 are formed in this order on an insulating board 101 from the board siGe. When these films are crystallized by heat treatment, the Side capable of crystallization at a low temperature is crystallized first in a short time. The a-Si can be crystallized in a short time by succeeding to the excellent crystallinity of poly-Side. After crystallization, a poly-SiGe film is eliminated by etching, and a poly-Si film excellent in crystallinity can be obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for producing a polycrystalline silicon film having excellent crystallinity, which is suitable for use in, for example, solar cells and thin film transistors (hereinafter referred to as TFTs).

[0002]

2. Description of the Related Art In recent years, it has been widely used for an active matrix type liquid crystal panel (hereinafter referred to as AMLCD) capable of realizing a high-performance thin display using an inexpensive glass substrate and a long image sensor. A crystalline silicon (hereinafter referred to as poly-Si) TFT has been developed. In applications such as AMLCD and image sensor, the drive circuit is also poly-Si.
-If it is composed of TFTs and integrated with the display and sensor, it can be expected to bring further advantages such as cost reduction and size reduction.

In the case of AMLCD, for example, the poly-Si.TFT used in the drive circuit must operate at about 5 to 20 MHz. Such high-performance poly-S
In order to realize i-TFT, the pol of the channel part
The y-Si film must have excellent crystallinity.
On the other hand, since the maximum process temperature of TFT manufacturing is limited to about 600 ° C. because an inexpensive glass substrate is used as a substrate material, it is necessary to form a poly-Si film having excellent crystallinity at low temperature.

Conventionally, poly-S which is excellent in crystallinity at low temperature
As a method for obtaining an i film, amorphous silicon (hereinafter, referred to as aS
(referred to as i) is formed, and a solid phase growth method of crystallizing it by furnace annealing has been studied. According to this method
A poly-Si film having a crystal grain of several μm is obtained. However, the poly-Si film obtained by the solid phase growth method has many defects in crystal grains, and the TFT using this has a mobility of Nc.
About 40 cm ² / V · s at maximum for h, 30 cm ² / for Pch
Only characteristics of V · s can be obtained. Further, the solid phase growth method requires a long time of 24 to 72H for crystallization.

[0005]

In order to shorten the crystallization time, the following two methods have been proposed. One of them is to form a polycrystal film made of CaF ₂ , PrO ₂ or SrTiO ₃ having a lattice constant close to that of Si on the upper surface of the a-Si film or the substrate surface, and form the polycrystal film into a crystal nucleation layer. Is a method of solid phase growing an a-Si film (JP-A-4-349616, JP-A-4-349617 and JP-A-4-349618). However, in this proposed method, there is a high possibility that Ca or the like in the crystal nucleation layer is mixed as an impurity during the heat treatment, and there is a problem such as lattice mismatch between the crystal nucleation layer and the Si film.

Another method utilizes the fact that the nucleation of phosphorus-doped a-Si is faster than the nucleation of non-doped a-Si, and thus phosphorus-doped a-S is formed on a non-doped a-Si film.
It is a method of forming an i film and heat-treating it {JJAP, Vo
l. 32 (1993) pp3720-3728}. However, in a TFT, since the poly-Si film is generally formed to have a thickness of 100 nm or less, phosphorus-doped a-Si is used.
Problems such as diffusion of impurities into the non-doped a-Si film occur due to grain boundary diffusion from the film. Even if a small amount of a dopant such as phosphorus is diffused, the threshold value of the TFT shifts, which adversely affects the characteristics. Therefore, this method can be applied only when a thick poly-Si film is used as in a solar cell.

In recent years, polycrystalline silicon germanium (Si
_x Ge _1-x , 0 ≦ x <1) has been attracting attention (Japanese Patent Laid-Open No. Hei 4-
35019 and AMLCDs '93). This polycrystalline silicon germanium (hereinafter referred to as SiGe) is
Since the melting point of Ge is lower than that of Si, it is crystallized at a lower temperature, and when observed with a transmission electron microscope, even if the same solid phase growth is performed, a crystal with less twins and better crystallinity than that of poly-Si is obtained. To be However, in the case of SiGe, when the Ge fraction becomes high, the film resistance becomes low due to a decrease in the band gap, etc.
Is present, there is a problem that the off current increases. In addition, S which is generally used as a gate insulating film of TFT
When an iO ₂ film is formed on the poly-SiGe film, Si
Ge on the surface of the Ge film is oxidized to form GeO and GeO ₂ . It is known that these germanium oxides formed at about 600 ° C. generally have inferior properties such as hygroscopicity, and it is clear that they adversely affect the properties of the TFT.

The present invention has been made to solve the problems of the prior art, has excellent crystallinity, can be manufactured in a short time by a low temperature process, and has good characteristics when applied to a TFT. Can obtain poly-S
It is an object to provide a method for producing an i film.

[0009]

[Means for Solving the Problems] Poly-Si of the present invention
The method for forming the film is as follows: an a-Si film and an a-Si film on an insulating substrate.
_{SiGe (Si x Ge 1-x} , 0 ≦ x <1) a step of forming the membrane from the substrate side in this order, the a-Si film and the a-Si
The above object is achieved by including a step of crystallizing the Ge film by heat treatment and a step of removing the crystallized silicon germanium film.

As the heat treatment, heating is performed at a temperature at which crystallization of the amorphous silicon germanium film occurs and at which crystallization of the amorphous silicon film does not occur, and thereafter, temperature at which crystallization of the amorphous silicon film occurs. It is desirable to heat at.

The amorphous silicon germanium film has a high germanium fraction continuously or stepwise from the interface side between the amorphous silicon film and the amorphous silicon germanium film toward the surface opposite to the substrate. It is desirable to form a film so that

It is desirable to continuously form the amorphous silicon film and the amorphous silicon germanium film without exposing them to the atmosphere.

[0013]

In the present invention, the a-Si film and the a-SiGe film are formed on the insulating substrate in this order from the substrate side. Since Si and Ge have similar lattice constants, SiGe can be epitaxially grown on a Si single crystal.

Next, these are crystallized by heat treatment. At this time, SiGe, which can be crystallized at a low temperature, is first crystallized in a short time. a-Si is poly-SiGe
Since the crystallinity can be taken over and the film can be grown in the direction of the substrate surface by the distance of the film thickness, crystallization can be performed in a short time. Further, since the crystallinity of poly-SiGe, which has excellent crystallinity, is succeeded, it is possible to obtain good crystallinity. Since this heat treatment can be performed at about 600 ° C. at which a-Si crystallizes, a glass substrate or the like can be used. Further, by shortening the heat treatment time, the manufacturing process can be shortened, and the heat shrinkage of the glass substrate can be reduced.

Although SiGe can be crystallized at a low temperature, it has a low resistance, there is no suitable material for a gate insulating film to be combined, and it is not necessarily excellent as a channel portion of a TFT. Therefore, after crystallization as described above, poly
The -SiGe film is removed by etching to leave only the poly-Si film. Since Ge is a semiconductor of the same IV group as Si, it does not cause a problem even if Ge is diffused into the poly-Si film and mixed into impurities.

By the way, if a heat treatment is carried out at a temperature of about 600 ° C. at which a-Si crystallizes from the beginning, crystal growth of a-SiGe can be carried out in a short time. In that case, a-S
There is a possibility that crystal growth that nucleates from i occurs. Therefore, crystallization of the a-SiGe film occurs first, and a
It is preferable that the a-SiGe is first crystallized by performing a heat treatment at a low temperature at which the crystallization of the -Si film does not occur, and then a heat treatment is performed at a temperature at which the crystallization of the a-Si film occurs. In this case, two heat treatment steps are required, but the minimum critical temperature for crystal growth of the a-SiGe film is 250 ° C. depending on the Ge fraction.
Although it changes to about 550 ° C., the a-Si film is generally 550 ° C.
Does not crystallize at ℃. Therefore, the crystal growth of a-SiGe can be crystallized in a short time because the heat treatment can be performed at a temperature relatively higher than the minimum limit temperature of crystal growth.

The SiGe film can be crystallized at a lower temperature when the Ge concentration (Ge fraction) is higher. However, since the lattice mismatch with Si increases as the Ge concentration increases, it becomes difficult for a-Si to carry on the crystallinity of poly-SiGe and to grow crystals. Since SiGe can form a mixed crystal at an arbitrary ratio, the Ge concentration is lowered in the vicinity of the interface between the a-Si film and the a-SiGe film, and the surface opposite to the substrate is shown in FIG. When the a-SiGe film is formed continuously so that the Ge concentration increases stepwise as shown in FIG.
It is possible to avoid lattice mismatch with. In FIG. 3, 301 is a substrate, 302 is an a-Si film, and 304 is a.
-SiGe film, 303 is an a-SiGe continuous transition layer, 3
Reference numeral 05 is an a-SiGe step transition layer.

In order for a-Si to grow crystals while inheriting the crystallinity of poly-SiGe, a-Si film and poly
The interface with the y-SiGe film needs to be clean. Therefore, it is desirable that the a-Si film and the a-SiGe film be continuously formed without being exposed to the air. When continuous film formation is difficult, HF is formed immediately before forming the a-SiGe film.
The surface of the a-Si film may be cleaned by cleaning or the like and set in the film forming apparatus.

[0019]

Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) FIGS. 1A to 1D are sectional views showing a method for producing a poly-Si film in the present embodiment 1. In this example, the poly-Si films of Samples 1 to 3 were prepared as follows. As a comparative example, the poly-Si films of Samples 4 to 5 were also prepared.

(Sample 1) First, as shown in FIG. 1A, a thickness 100 is formed on an insulating substrate 101 such as a quartz substrate.
nm a-Si film 102 and 100 nm thick a-S
An i _x Ge _1-x (x = 0) film 103 was formed. At this time,
PECVD (Plasma Enhanced)
Chemical Vapor Deposition
n) method, and the film forming conditions were as shown in Table 1 below. Further, the two films 102 and 103 were continuously formed without breaking the vacuum.

[0022]

[Table 1]

Next, a first anneal was performed at 450 ° C. in an N ₂ atmosphere, and the a-SiGe film 103 was crystal-grown as shown in FIG. 1B to form a poly-SiGe film 104.

Then, a second anneal is performed at 600 ° C. in an N ₂ atmosphere to form an a-Si film 1 as shown in FIG. 1 (c).
02 was crystal-grown to form a poly-Si film 105.

After that, the poly-SiGe film 105 was removed by etching using a mixed solution of HF: H ₂ O ₂ = 1: 4 to obtain a poly-Si film 105 as shown in FIG. 1D.

(Sample 2) a-Si having a thickness of 100 nm
Film and a-Si _x Ge _1-x (x = 0.
4) Poly-Si film 10 was formed in the same manner as in Sample 1 except that the film was continuously formed under the film forming conditions as shown in Table 1 above without breaking the vacuum and the first annealing temperature was 530 ° C.
Got 5.

(Sample 3) a-Si having a thickness of 100 nm
Film and a-Si _x Ge _1-x (x = 0.
6) The poly-Si film 10 was formed in the same manner as in Sample 1 except that the film was continuously formed under the film forming conditions shown in Table 1 above without breaking the vacuum and the first annealing temperature was 550 ° C.
Got 5.

(Sample 4 = Comparative Example) On an insulating substrate,
An a-Si film having a thickness of 100 nm was formed under the film forming conditions shown in Table 1 above, and annealed at 600 ° C. in an N ₂ atmosphere to obtain a poly-Si film.

(Sample 5 = Comparative Example) On an insulating substrate,
An a-Si _x Ge _1-x (x = 0.4) film having a thickness of 100 nm was formed under the film forming conditions shown in Table 1 above, and annealed at 530 ° C. in an N ₂ atmosphere to form a poly-SiGe film. Got

FIGS. 2 (a) and 2 (b) show the results of measuring the ultraviolet (UV) reflection spectrum in order to investigate the state of crystal growth of Samples 1 to 5 obtained as described above. Show. (A) shows the result after the first annealing step in which the heat treatment was performed at a temperature at which the a-SiGe film was crystallized and the a-Si film was not crystallized.
(B) shows the result after the second annealing step in which the heat treatment is performed at a temperature at which the crystallization of the a-Si film occurs. In this measurement, the peak intensity of the ultraviolet reflectance around 280 nm is measured. This peak corresponds to the E2 band of band-to-band transition, and when the state changes from amorphous to crystalline, the peak intensity changes in accordance with the change in the band state of electrons.

According to FIG. 2A, a of Samples 1 to 3
The crystallization of the -SiGe film is completed in about 5 to 7 hours, and the a-SiGe film of Sample 5 having the same composition ratio as that of Sample 2 requires about 16 hours for crystallization. As can be understood from this, the annealing time varies not only with the annealing temperature and the film forming conditions, but also with the substrate having a considerable influence. On the other hand, according to FIG. 2B, the crystallization of the a-Si films of Samples 1 to 3 was completed in about 5 hours, and
The a-Si film requires about 48 hours for crystallization. This is because the a-Si films of Samples 1 to 3 are poly-
This is because the SiGe film is crystallized in a short time because the SiGe film inherits the crystallinity and grows. As described above, when the a-SiGe film is formed on the Si film, both the a-SiGe film and the a-Si film can be crystallized in a shorter time than when the a-SiGe film is formed on the glass substrate. It is possible to reduce the heat shrinkage of the substrate.

FIG. 4 shows transmission electron microscope (TEM) images of Sample 2 and Sample 4. (A) shows sample 2, (b) shows sample 4, (c) shows an electron diffraction image of sample 2, and (d) shows an electron diffraction image of sample 4. Sample 4 has many twin defects like poly-Si obtained by the conventional solid-phase growth method, but sample 2 has no such twin defects and has excellent crystallinity.

(Example 2) In Example 2, the Poly-Si film (Samples 1 to 4) produced in Example 1 described above was used.
Using, a planar type TFT as shown in FIG.

This TFT has a po on the insulating substrate 501.
A semiconductor layer 502 made of a ly-Si film is formed, and a gate insulating film 503 is formed so as to cover the semiconductor layer 502.
The gate electrode 50 is formed on the gate insulating film 503 so as to overlap with the central portion of the semiconductor layer 502 which becomes the channel of the TFT.
4 is formed, and an interlayer insulating film 505 is formed so as to cover it. An Al electrode 5 is formed on the interlayer insulating nucleus 505.
06 are formed, and the gate insulating film 503 and the interlayer insulating film 50 are formed.
Through the contact hole formed in the semiconductor layer 5
02 is connected to the source part and the drain part (not shown).

In this embodiment, the TFT is manufactured as follows.
Was produced. First, as shown in FIG.
The poly-Si film (Samples 1 to 4) obtained in (4) was patterned to form a semiconductor layer 502.

Next, as shown in FIG. 5B, a SiO1 ₂ film having a thickness of 100 nm is formed by an AP (normal pressure) CVD method to form a gate insulating film 503, and the gate insulating film 503 is formed at 600 ° C. in an N ₂ atmosphere.
Then, densification annealing was performed for 12 hours.

After that, as shown in FIG.
The Poly-Si film is formed to 300 nm by (decompression) CVD method.
A film was formed and patterned to form a gate electrode 504.

Next, as shown in FIG. 5D, a source portion and a drain portion (not shown) are formed by implanting 1 × 10 ¹⁵ cm ^-2 phosphorus ions into the semiconductor layer 502 using the gate electrode 504 as a mask. Formed. At this time, the semiconductor layer 5
No. 02 of the gate electrode 504 serves as a channel portion without being implanted with phosphorus ions.

After that, as shown in FIG.
An SiO ₂ film having a thickness of 500 nm was formed by the VD method to form an interlayer insulating film 505.

Then, annealing was performed at 600 ° C. for 20 hours in an N ₂ atmosphere to activate the source part and the drain part. Next, as shown in FIG. 5F, contact holes were formed in the gate insulating film 503 and the interlayer insulating film 505, and Al electrodes 506 were formed to complete the TFT.

Table 2 shows the results of evaluating the characteristics of the obtained TFT.

[0042]

[Table 2]

As can be seen from Table 2, Samples 1
The TFT using the poly-Si film of Sample 3 has VTH and S higher than those of the TFT using the poly-Si film of Sample 4.
Is low. In addition, the conventional TFT has a mobility of 40 cm ² / V ·
Although it is about sec, TFTs of Samples 1 to 3
Was as high as about 80 to 100 cm ² / V · sec, and excellent characteristics were obtained reflecting the crystallinity.

Example 3 In this Example 3, a-Si is used.
A-Si _x Ge _1-x (0 ≦ x <1) so that the Ge fraction (1-x) increases continuously or stepwise from the interface side with the film to the surface opposite to the substrate. A film was formed to form the poly-Si films of Sample 6 and Sample 7.

(Sample 6) First, as shown in FIG. 6A, a- is formed on the insulating substrate 601 by PECVD.
The Si film 602, the a-SiGe continuous transition layer 603, and the a-SiGe film 604 were continuously formed under the film forming conditions shown in Table 3 below without breaking the vacuum.

[0046]

[Table 3]

Next, as in Example 1, annealing was first performed at 450 ° C. for 5 hours in an N ₂ atmosphere and then at 600 ° C. for 5 hours to perform poly-SiGe film and pol.
A y-Si film was formed.

After that, the poly-SiGe film is removed by etching using a mixed solution of HF: H ₂ O ₂ = 1: 4 to remove po.
A ly-Si film was obtained.

(Sample 7) a-SiGe of FIG. 6 (a)
6A except that the a-SiGe stepwise transition layer 605 as shown in FIG. 6B was continuously formed under the conditions shown in Table 3 in place of the continuous transition layer 603. A poly-Si film was obtained.

Table 4 shows samples 6 and 7 above.
The results of evaluating the characteristics of the TFT manufactured by using the above poly-Si film in the same manner as in Example 2 are shown.

[0051]

[Table 4]

As can be seen from Table 4, the TFTs using the poly-Si films of Sample 6 and Sample 7 are
The VTH is lower than that of the TFT using the poly-Si film of Sample 1. The TFT of sample 1 has a mobility of 100.
cm ² / V · sec, while sample 6
And the TFT of Sample 7 is 130 cm ² / V · sec
Degree and high. From this, by providing the layers 603 and 605 having an intermediate Ge concentration, the poly-Si can be formed.
It can be seen that the crystallinity of the film can be further improved.

Further, for comparison, after the formation of the a-Si film, it was exposed to the atmosphere and the poly-
A Si film was produced.

(Sample 8) A poly-Si film was prepared in the same manner as in Sample 2 except that the a-Si film was exposed to the atmosphere and HF clean was performed to form the a-SiGe layer. The obtained poly-Si film was completely crystallized.

(Sample 9) A poly-Si film was formed in the same manner as in Sample 8 except that HF clean was not performed. The obtained poly-Si film had a large amount of a-Si remaining, and the crystallization was incomplete.

Table 4 above shows the results of evaluation of the characteristics of TFTs manufactured in the same manner as in Example 2 using the poly-Si films of Samples 8 and 9 above.

As can be understood from Table 4, the TFT using the poly-Si film of Sample 8 is the
Although the characteristics similar to those of the TFT using the poly-Si film were obtained, the T using the poly-Si film of Sample 9 was obtained.
The FT has a large variation in characteristics, reflecting variations in crystallization of the SiGe film. From this, it can be seen that it is important to keep the interface between the a-Si film and the a-SiGe film clean. Therefore, in the present invention, a-
The Si film and the a-SiGe film are continuously formed without being exposed to the air. If the a-Si film is exposed to the atmosphere, it is preferable to perform interface treatment such as HF clean to clean the interface. As another interface treatment, a method known as an interface cleaning method such as H ₂ plasma treatment or fluorine gas treatment can be used.

In the above description, the a-Si film and the a
-SiGe film was formed by PECVD method.
Any method can be used as long as the i film and the a-SiGe film can be formed, for example, LPCVD method, EB (Select).
ron beam) vapor deposition method, sputtering method or the like may be used. In that case, the annealing temperature and the annealing time may change slightly.

In the above description, the N-channel TFT is manufactured as the TFT, but the P-channel TFT may be manufactured. It is also possible to apply it to a device such as a solar cell by forming a thick poly-Si film.

[0060]

As is apparent from the above description, according to the present invention, SiGe which can be crystallized at a low temperature can be crystallized first in a short time, and the crystallinity of poly-SiGe is maintained in a- Si can be crystallized in a short time.
Since the heat treatment time can be shortened in this way, the manufacturing process can be shortened. In addition, since heat treatment can be performed in a short time, heat shrinkage of the substrate can be reduced and an inexpensive glass substrate can be used. In addition, the poly-Si film is a poly-
Since the good crystallinity of the SiGe film is succeeded, the good crystallinity can be obtained. a-Si on the a-Si film
Since the Ge film is formed, after crystallization, poly-S
By removing the iGe film, only the poly-Si film can be left as the channel portion of the TFT.

Further, according to the present invention, first, a-SiG is used.
The temperature at which the a-SiGe is first crystallized by performing a heat treatment at a low temperature such that the crystallization of the e film occurs and the crystallization of the a-Si film does not occur, and then the crystallization of the a-Si film occurs. Since the heat treatment is carried out at 1, the crystal defects such as twins due to the nucleation from a-Si do not occur, and the poly-Si having better crystallinity
A film is obtained. Further, the Ge concentration is reduced near the interface between the a-Si film and the a-SiGe film, and the a-SiGe film is formed so that the Ge concentration increases continuously or stepwise toward the surface opposite to the substrate. Since the film is formed, the lattice mismatch with Si can be avoided and the crystallinity can be further improved. Furthermore, since the a-Si film and the a-SiGe film are continuously formed without being exposed to the air, the interface can be cleaned and a-Si can inherit the crystallinity of poly-SiGe for crystal growth. .

Furthermore, by using such a poly-Si film, a high-performance TFT having a low threshold voltage, a high mobility and a small variation can be obtained. Therefore, AM
When applied to an LCD, a long image sensor, or the like, the drive circuit can also be configured by a poly-Si TFT, and can be integrated with the display unit and the sensor unit to reduce cost and size.

[Brief description of drawings]

1A to 1D are poly-Si of Example 1;
It is sectional drawing which shows the manufacturing process of a film | membrane.

FIG. 2A is a graph showing the annealing time dependence of the UV reflection intensity of a poly-SiGe film, and FIG.
It is a graph which shows the annealing time dependence of UV reflection intensity of an oli-Si film.

FIG. 3A is a cross-sectional view showing an example in which the composition ratio of the interface between the a-Si film and the a-SiGe film is continuously changed,
(B) is a sectional view showing an example in which the composition ratio of the interface between the a-Si film and the a-SiGe film is changed stepwise.

4A is a transmission electron microscope image of a poly-Si film of sample 2, and FIG. 4B is a poly-image of sample 4.
3A and 3B are transmission electron microscope images of a Si film, in which FIG. 3C is an electron diffraction image of Sample 2 and FIG. 3D is an electron diffraction image of Sample 4.

5A to 5F are cross-sectional views showing the manufacturing process of the TFT of the second embodiment.

6 (a) and (b) are poly- of Example 3. FIG.
It is sectional drawing which shows the manufacturing process of Si film.

[Explanation of symbols]

 101, 301, 501, 601 Substrate 102, 302, 602 a-Si film 103, 304, 604 a-SiGe film 104 poly-SiGe film 105 poly-Si film 303, 603 a-SiGe continuous transition layer 305, 605 a -SiGe stepwise transition layer 502 semiconductor layer 503 gate insulating film 504 gate electrode 505 interlayer insulating film 506 Al electrode

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI technical display location H01L 29/786 21/336 31/04

Claims (4)

[Claims] 1. An amorphous silicon film and amorphous silicon germanium (Si _x Ge _1-x , 0 ≦ x are provided on an insulating substrate.
<1) A step of forming a film in this order from the substrate side, a step of crystallizing the amorphous silicon film and the amorphous silicon germanium film by heat treatment, and a step of removing the crystallized silicon germanium film Method for manufacturing polycrystalline silicon film. 2. The heat treatment is heating at a temperature at which the amorphous silicon germanium film is crystallized and the amorphous silicon film is not crystallized, and then the amorphous silicon film is crystallized. The method for producing a polycrystalline silicon film according to claim 1, wherein heating is performed at a temperature at which it occurs. 3. The amorphous silicon germanium film,
The film is formed such that the germanium fraction increases continuously or stepwise from the interface side between the amorphous silicon film and the amorphous silicon germanium film toward the surface opposite to the substrate. A method for producing a polycrystalline silicon film as described. 4. The method for producing a polycrystalline silicon film according to claim 1, wherein the amorphous silicon film and the amorphous silicon germanium film are continuously formed without exposing to the atmosphere. .