JPH0887272A - Envelope waveform generating device - Google Patents

Abstract

PURPOSE: To reduce an exclusive hardware amount provided only for performing special processing such as forcing damp by providing a second control mode generating an envelope in which rapid waveform change is performed. CONSTITUTION: A comparator 52 compares a target level signal TARGET from a control circuit 51 with the envelope waveform data ENV from a shift register 55, and it outputs a coincidence signal EQ to the control circuit 51 when both coincide with each other. A rate correction circuit 53 inputs a first rate signal RATE1 and a mode signal MD from the control circuit 51, the envelope waveform data ENV from the shift register 55 and a key off signal KOFF from a depression key detection circuit, and it outputs a second rate signal RATE2 to an adder 54 based on these respective signals. The rate correction circuit 53 decides the first rate signal RATE1 as a forcing damp rate when it is larger than a prescribed value, and decides it as a release rate when smaller than the prescribed value, and it performs the processing according to the decision result.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an envelope waveform generator for generating an envelope waveform for controlling a tone signal based on the rate of change and level of each part.

[0002]

2. Description of the Related Art Conventionally, an envelope waveform generator for generating an envelope waveform for controlling a musical tone signal has been disclosed in Japanese Patent Laid-Open No. 63-125989.
Attack, decay, sustain,
Divide into four parts of release, give the rate of change (attack rate, decay rate, sustain rate, release rate) and level (attack level, decay level, sustain level) of each part as envelope parameters, calculate this, envelope Some create waveforms.

In this publication, when a key is assigned to a sounding channel in a released state, the envelope waveform is rapidly attenuated (forcing dump) without generating a click sound for a tone related to the key release, and the key is pressed. Techniques have been shown to produce musical notes on the keys as quickly as possible. This technique provides a forcing dump plate which is different from each of the above rates at the time of the forcing dump, determines whether or not the forcing dump condition is satisfied, and then performs the forcing dump.

[0004]

Generally, human perception is said to be logarithmic, so that a sharp change in the envelope waveform changes faster and a gradual change in the envelope waveform changes more slowly. , It is desirable to create an envelope waveform. Therefore, the conventional envelope waveform generator gives a unique rate for the release envelope at the time of normal release and at the time of forcing dump, and switches them appropriately according to the internal state of the envelope waveform generator and key press information. Was being synthesized. That is, as shown in the above publication, a selector for a forcing damper plate is separately provided in the envelope waveform generator, and switching to the forcing damper plate is performed by this selector only when performing a forcing dump. .

Although not explicitly described in the above publication, the envelope parameter is conventionally provided in the envelope parameter generating circuit or the envelope waveform generating device in order to receive the supply of the envelope parameter during creation of the envelope waveform. It is necessary to provide a register group for temporarily storing the data. In this case also, a separate register is provided for the forcing damper plate, and the forcing damper plate is read from this register only when performing the forcing dump. Was there.

As described above, in order to perform a special processing such as a forcing dump which is not always necessary in the usual performance of an electronic musical instrument, dedicated hardware such as a selector or a register is constantly used. There was a problem that I had to prepare. Furthermore, conventionally, the start point of forcing dump (the point of accelerating the rate)
Since the judgment is made by the hardware in the envelope waveform generator, the starting point of the forcing dump is fixed regardless of the magnitude of the rate, and there is no degree of freedom.

The present invention has been made in view of the above points, and an envelope waveform generation capable of reducing the amount of dedicated hardware provided only for performing special processing such as forcing dump to the utmost. The purpose is to provide a device.

[0008]

SUMMARY OF THE INVENTION An envelope waveform generator according to the present invention inputs a rate of change designating the shape of each part of the waveform of the envelope waveform, and generates an envelope of a musical tone based on this rate of change. In the generator, there are provided a comparison means for comparing the rate of change with a predetermined value, a first control mode for generating a normal envelope, and a second control mode for generating an envelope in which a high-speed waveform change is performed. And a waveform generating means for generating an envelope waveform in one of the modes according to the comparison result of the comparing means.

[0009]

In the envelope waveform generator, the rate of change designating the shape of each waveform portion of the envelope waveform includes an attack rate, a decay rate, a sustain rate, a release rate, and a forcing damper plate. The envelope waveform generator generates the envelope of each part of the musical tone waveform based on these change rates. In the first control mode in which the waveform generation means generates a normal envelope, the waveform generation means generates envelope waveforms of the decay portion, the sustain portion, and the release portion that change at a predetermined slope, and creates an envelope that allows rapid waveform change. Second to generate
In the control mode of (1), the envelope waveform of the attack portion that is initially steep and changes with a gentle rise, and the envelope waveform of the forcing dump portion that is initially gentle and then changes with a rapid damping characteristic are generated. The comparing means pays attention to the difference between the actual value of the release rate and the forcing damper plate, and sets the boundary value between the release rate and the forcing damper plate as a predetermined value.
Therefore, when the rate of change is the release rate, the comparison means outputs a comparison result that is smaller than the predetermined value, so that the waveform generation means attenuates with a predetermined slope based on the release rate in the first control mode. Generates a normal envelope. When the change rate changes to the forcing damper plate at the time of the attenuation by the release rate, the comparison means outputs the comparison result that it is larger than the predetermined value at the time of the change, so that the waveform generation means in the second control mode. Based on the force sync damper, an envelope which exhibits a fast waveform change that is gentle at first and then changes with a rapid damping characteristic is generated. In this way, since the comparison means automatically switches the control mode of the waveform generation means according to the magnitude of the rate of change, the dedicated hardware such as selectors and registers is constantly steadily used for forcing dump as in the past. You do not have to prepare the clothing. Also, even if the starting point of the forcing dump is not specified separately, the operation will automatically start according to the magnitude of the change rate, so there is no need to give an instruction to perform an operation adapted to the human sense. It can be carried out. As a preferred embodiment of the present invention, the waveform generating means generates a normal envelope by accumulating the rate of change in the first control mode and corrects the rate of change in the second control mode. It is desirable to generate an envelope in which a high-speed waveform change is performed by accumulating the corrected change rates.

[0010]

Embodiments of the present invention will now be described in detail with reference to the accompanying drawings. FIG. 2 is a diagram showing an example of the configuration of an electronic musical instrument in which the envelope waveform generator according to the present invention is used for generating a tone amplitude envelope waveform. In FIG. 2, a keyboard 21 is provided with a plurality of keys for selecting the pitch of a musical tone to be produced, has a key switch corresponding to each key, and if necessary, a pressing force detection device or the like. It has a touch detection means. The keyboard 21 is a basic operator for playing music, and needless to say, it may be a performance operator other than this.

The key-depression detecting circuit 22 is a scanning circuit for sequentially scanning the key switches provided corresponding to each key of the keyboard 21 for designating the pitch of a musical tone to be generated, and a circuit for encoding the scanning result. It is configured to include and.
The key-depression detection circuit 22 detects a change of the keyboard 21 from a key-released state to a key-depressed state and outputs a key-on signal KON, and detects a change of the key-depressed state to a key-released state to detect a key-off signal K.
In addition to outputting OFF, a key code signal KC indicating the pitch of the key regarding each key-on and key-off is output. In addition to this, the key-depression detection circuit 22 determines the key-depression operation speed and the pressing force when the key is depressed, and outputs a touch signal TOUCH. Further, when a new key depression occurs, the key depression detection circuit 22 assigns a tone generation channel to the key depression. However, when there is no empty channel, the normal truncation processing causes the most attenuation. In order to assign the sound generation to the advanced channel, the forcing dump signal FD is output to the channel and the dump is forcibly performed. The key press detection circuit 22 sends the key code signal KC and the touch signal TOUCH to the tone signal generation circuit 24, the key on / off signals KON / KOFF to the tone signal generation circuit 24 and the envelope waveform generation circuit 26, the key code signal KC and the touch signal. The TOUCH and the forcing dump signal FD are output to the envelope parameter generating circuit 25, respectively.

The tone color selection circuit 23 is a tone color setting switch arranged on the panel, and is used to selectively set a tone color corresponding to various natural musical instruments such as a piano, an organ, a violin, a brass instrument, and a guitar. The generated tone color signal TC is output to the tone signal generation circuit 24 and the envelope parameter generation circuit 25.

The tone signal generation circuit 24 is capable of simultaneously generating tone signals on a plurality of channels, and the key depression detection circuit 22.
From the tone color selection circuit 23 to the tone color signal TC of the pitch corresponding to the key code signal KC
The tone is generated according to. As the tone signal generation system in the tone signal generation circuit 24, any method may be used. For example, a memory reading method for sequentially reading tone waveform sample value data stored in a waveform memory according to address data that changes corresponding to the pitch of a tone to be generated, or a predetermined frequency using the above address data as phase angle parameter data. A well-known method such as an FM method for performing a modulation operation to obtain musical tone waveform sample value data or an AM method for performing a predetermined amplitude modulation operation using the address data as phase angle parameter data to obtain a tone waveform sample value data. You may employ suitably. In this embodiment, the tone signal WAVE generated from the tone signal generation circuit 24 is data in decibel expression (logarithmic expression). Therefore, the musical tone signal WAVE generated from the musical tone signal generating circuit 24 is output to the adder 27 and added to the decibel expression envelope waveform output from the envelope waveform generating circuit 26.

The envelope parameter generation circuit 25 generates various envelope parameters ADSR relating to the rate of change (rate of change) and level of each part for specifying the shape of the envelope waveform according to the tone color selected by the tone color selection circuit 14. , To the envelope waveform generation circuit 26. The envelope parameter ADSR relates to the envelope waveform as shown in FIG. 3, and includes an attack rate AR and an attack level AL for the attack portion, a decay rate DR and a decay level DL for the decay portion, and a sustain rate SR and a sustain level for the sustain portion. The SL and the release rate RR (including the forcing damper plate FR) related to the release portion are included. This envelope waveform data is expressed in decibels, and is also expressed by the amount of attenuation with 0 dB as the maximum level.
Therefore, the maximum level 0 dB of this envelope waveform is indicated by all "0" bits, and the minimum level is indicated by all "1" bits.

The envelope parameter generation circuit 25 outputs only the release rate RR during a normal performance, and only when the forcing dump signal FD is input from the key depression detection circuit 22, the release rate RR is replaced by the release rate RR. The single damper plate FR is output to the envelope waveform generating circuit 26. That is, the envelope parameter generation circuit 25 outputs a release rate RR that is attenuated by the slope of the release envelope waveform as shown in FIG. 4A during a normal performance, and is shown in FIG. 4B during a forcing dump. The forcing damper plate FR is output so as to be attenuated by the inclination of the forcing dump envelope waveform.

The envelope waveform generating circuit 26 receives various parameters from the envelope parameter generating circuit 25 and key-on / off signals KON / KO from the key-depression detecting circuit 22.
Based on FF, envelope waveform data ENV in decibel expression (logarithmic expression) time varying with a shape as shown in FIG.
Is output to the adder 27 in synchronization with the input of the key-on signal KON from the key-depression detection circuit 22.

The adder 27 adds the decibel expression tone signal WAVE output from the tone signal generation circuit 24 and the decibel expression envelope waveform data ENV output from the envelope waveform generation circuit 26. Therefore, the addition result of the adder 27 is a decibel expression (logarithmic expression) of the product of the tone signal WAVE and the envelope waveform data ENV. As a result, the volume amplitude envelope is added to the tone signal WAVE. The adder 27 outputs the addition result, that is, the tone signal to which the volume amplitude envelope has been added, to the logarithmic / linear conversion circuit 28.

The logarithmic / linear conversion circuit 28 converts the decibel expression (logarithmic expression) tone signal from the adder 27 into a linear expression and outputs it to the D / A conversion circuit 29. The D / A conversion circuit 29 converts the musical tone waveform data from the logarithmic / linear conversion circuit 28 into an analog musical tone signal and outputs it to the sound system 23. The sound system 2A is composed of a speaker, an amplifier and the like, and generates a musical tone according to the analog musical tone signal from the D / A conversion circuit 29.

FIG. 5 is a diagram showing a detailed structure of the envelope waveform generating circuit 26 of FIG. The envelope waveform generation circuit 26 includes a control circuit 51, a comparator 52, a rate correction circuit 53, an adder 54, and a shift register 55.

The control circuit 51 controls the envelope parameter ADSR from the envelope parameter generating circuit and the key-on / off signal KON / KOFF from the key-depression detecting circuit 22.
And the coincidence signal EQ from the comparator 52, and the control signals (mode signal MD, first rate signal RATE1, target level signal TARGET) based on these signals are inputted to the comparator 52, the rate correction circuit 53 and the adder. To 54.

That is, the control circuit 51 controls the mode signal MD corresponding to each part of the envelope waveform as shown in FIG.
(Attack mode signal AMD, decay mode signal DM
D, sustain mode signal SMD, release mode signal RMD) are output to the comparator 52, the rate correction circuit 53, and the adder 54. Further, the control circuit 51 uses an envelope parameter ADSR (attack rate A
R, decay rate DR, sustain rate SR and release rate RR (forcing damper plate FR))
Corresponding to the mode signal MD is output to the rate correction circuit 53 as the first rate signal RATE1, and the mode parameters MD are selected from the envelope parameters (attack level AL, decay level DL and sustain level SL) related to the level. The corresponding one is output to the comparator 52 as the target level signal TARGET.

The comparator 52 compares the target level signal TARGET from the control circuit 51 with the envelope waveform data ENV from the shift register 55, and outputs a coincidence signal EQ to the control circuit 51 when they coincide with each other. As is apparent from FIG. 3, in the case of the attack mode signal AMD, the envelope waveform data ENV increases, and in the other decay mode signals DMD, the envelope waveform data ENV decreases.
The comparison mode is switched according to the.

The rate correction circuit 53 inputs the first rate signal RATE1 and the mote signal MD from the control circuit 51, the envelope waveform data ENV from the shift register 55, and the key-off signal KOFF from the key-depression detection circuit 22. The second rate signal RATE based on the signal
2 is output to the adder 54.

That is, when the mode signal MD is the attack mode signal AMD, the rate correction circuit 53 operates as shown in FIG.
The first rate signal RA is corrected so that the attack waveform is sharp at first and gradually changes thereafter.
The addition of TE1 is output to the adder 54 as the second rate signal RATE2. In addition, the rate correction circuit 53
When the mode signal MD is the release mode signal RMD, or when the key-off signal KOFF is input from the key pressing detection circuit 22, when the first rate signal RATE1 changes from the release rate RR to the forcing damper plate FR, The first rate signal RATE1 having a correction such that the waveform is a forcing dump section waveform that is gentle at first and then rapidly changes as shown by 3 is output to the adder 54 as the second rate signal RATE2.

The rate correction circuit 53 uses the first rate signal RA
When TE1 is larger than the predetermined value TH, it is determined to be the forcing damper plate FR, and when it is equal to or smaller than the predetermined value TH, it is determined to be the release rate RR, and the processing according to the determination result is performed. The rate correction circuit 53 uses the mode signal MD
Is a decay mode DMD and sustain mode signal SM
In the case of D, it does not operate and outputs the first rate signal RATE1 as it is as the second rate signal RATE2.

The adder 54 adds the second rate signal RATE2 from the rate correction circuit 53 and the envelope waveform data ENV from the shift register 55, and outputs the addition signal to the shift register 55. Shift register 55
Stores the addition signal from the adder 54 for each tone generation channel, and outputs the stored value as the envelope waveform data ENV to the comparator 52, the rate correction circuit 53, and the adder 54. That is, the loop formed by the adder 54 and the shift register 55 adds the second rate signal RATE2 one after another for each tone generation channel to generate the envelope waveform data ENV which is time-divisionally processed for each tone generation channel. . As is apparent from FIG. 3, in the case of the attack mode signal AMD, the envelope waveform data ENV increases, and other decay mode signals DMD
Then, since the envelope waveform data ENV decreases, the adder 54 switches between addition and subtraction operation modes according to the mode signal MD.

FIG. 1 is a diagram showing a detailed configuration of the rate correction circuit 53 of FIG. In this embodiment, the rate correction circuit 5
3 operates to accelerate the inclination of the envelope waveform data ENV at the time of forcing dump and attack. A technique for forming an envelope waveform in decibel expression and performing a forcing dump at high speed is disclosed in Japanese Patent Laid-Open No. 63-125989 cited in the section of the prior art. The curves of the attack part and the forcing dump part are replaced with curves that are reversed.

In this embodiment, in order to do the same,
The first rate signal RATE1 from the control circuit 51 and the current value of the envelope waveform data ENV are calculated and processed without using the curve conversion table. That is, the curve is controlled so that the curve changes gently when the amplitude of the envelope waveform data ENV is large and the curve changes sharply when the amplitude is small. Since the envelope waveform data ENV generated by the envelope waveform generating circuit 26 of this embodiment is "0" at the maximum amplitude, the rate correction circuit 53 uses the first rate signal RATE1 and the current address waveform data. The rate of change of the envelope waveform is accelerated by adding a value corresponding to the amplitude of ENV.

The detailed configuration of the rate correction circuit 53 will be described below with reference to the drawings. The rate correction circuit 53 includes a comparator 11, an AND circuit 12, an OR circuit 13, a first conversion circuit 14, a selector 15, a rate reduction circuit 16, and an adder 1.
7 and the second conversion circuit 18. The comparator 11 compares whether or not the first rate signal RATE1 from the control circuit 51 is greater than a predetermined value TH, and outputs a comparison signal of high level “1” to the AND circuit 12 when it becomes greater. The AND circuit 12 outputs a logical product signal of the comparison signal from the comparator 11 and the key-off signal KOFF (which may be the release mode signal RMD) from the key press detection circuit 22 to the OR circuit 13 and the rate reduction circuit 16. OR circuit 13
Outputs a logical sum signal of the logical product signal from the AND circuit 12 and the mode signal MD related to the attack mode signal AMD from the control circuit 51 to the selector 15 to the selection terminal SA.

The first conversion circuit 14 can add the value of the envelope waveform data ENV from the shift register 55 to the first rate signal RATE1 (conversion rate data ER).
To output to the input terminal A of the selector 15, for example, only the upper few bits of the envelope waveform data ENV are output.

The selector 15 constantly inputs the signal converted by the first conversion circuit 14 to the input terminal A and the level "0" to the input terminal B, and the input level of the selection terminal SA, that is, the output of the OR circuit 13. According to the above, the signal of either the input terminal A or the input terminal B is selectively output to the adder 17. That is, the selector 15 outputs the signal of the input terminal A, that is, the conversion rate data ER converted by the first conversion circuit 14 to the adder 17 only when the OR signal from the OR circuit 13 is at the high level “1”. When the low level is “0”, the level “0” signal is output to the adder 17.

The OR circuit 13 outputs a high level "1" logical sum signal when the mode signal MD is the attack mode signal AMD or the AND circuit 12 outputs a high level "1" logical product signal. That is the case. The AND circuit 12 outputs the logical product signal of high level "1" because the key press detection circuit 22 outputs the key-off signal KOFF.
(Release mode signal RMD may be input) and the first rate signal RATE1 is larger than the predetermined value TH.

The rate reducing circuit 16 controls the control circuit 5 when the logical product signal from the AND circuit 12 is low level "0".
The first rate signal RATE1 from 1 is directly added to the adder 1
When the logical product signal is at the high level "1", the first rate signal RATE1 is slightly decreased to adder 17
Output to. That is, the fact that the AND signal of the AND circuit 12 is at the high level "1" means that the first rate signal RA
This means that the waveform of the forcing dump unit is created based on TE1. However, since the value of the first rate signal RATE1 in such a case is a forcing damper plate FR that is sufficiently larger than the predetermined value TH, if this forcing damper plate FR is directly output to the adder 17, the adder 17 outputs it. The added signal that is output saturates immediately. Therefore, the rate reduction circuit 16 reduces the value of the forcing damper plate FR and outputs it to the adder 17 so that such a situation does not occur.

The adder 17 adds the signal (level "0" signal or conversion rate data ER) selectively output from the selector 15 and the first rate signal RATE1 output from the rate reduction circuit 16 and outputs the added signal. Is output to the second conversion circuit 18. The second conversion circuit 18 converts the addition signal from the adder 17 into a predetermined rate and outputs it as the second rate signal RATE2 to the adder 54 in FIG.

Next, how the envelope waveform generating circuit 26 operates to generate an envelope waveform will be described. When the keyboard 21 is operated, the key depression detection circuit 22 responds to the key code signal KC and the touch signal TOUC.
H is the envelope parameter generating circuit 25 and the tone signal generating circuit 24, and the key-on signal KON is the control circuit 51 of the envelope waveform generating circuit 26 and the tone signal generating circuit 2.
Output to 4 respectively. The tone color selection circuit 23 outputs a tone color signal TC to the envelope parameter generation circuit 25 and the tone signal generation circuit 24 in advance.

When the key code signal KC and the touch signal TOUCH are input from the key press detection circuit 22, the envelope parameter generation circuit 25 receives the envelope parameters ADSR (attack rate AR, attack level AL, decay rate DR, decay level DL) corresponding thereto. ,
The sustain rate SR, the sustain level SL, and the release rate RR) are output to the control circuit 51 of the envelope waveform generation circuit 26.

The control circuit 51 receives the key-on signal KON from the key-depression detection circuit 22, and outputs the envelope parameter ADSR from the envelope parameter generation circuit 25.
(Attack rate AR, attack level AL, decay rate DR, decay level DL, sustain rate S
R and sustain level SL), control signals (mode signal MD, first rate signal RATE1, target level signal TARGET) for creating envelope waveforms for attack mode, decay mode, and sustain mode as shown in FIG. It outputs to the comparator 52, the rate correction circuit 53, and the adder 54.

That is, the control circuit 51 is the key press detection circuit 2
When the key-on signal KON is input from 2, the attack mode signal AMD as the mode signal MD at that time is sent to the comparator 52, the OR circuit 13 and the adder 54 in the rate correction circuit 53, and the attack rate AR is set to the first rate signal RA.
The TE1 outputs the attack level AL to the comparator 11 and the rate reducing circuit 16 in the rate correction circuit 53, and the target level signal TARGET to the comparator 52, respectively.

In the AND circuit 12 in the rate correction circuit 53, the first rate signal RATE1 is larger than the predetermined value TH,
And key-off signal KOFF or release mode signal RM
Unless D is input, a logical product signal of low level "0" is always output to the rate reduction circuit 16 and the OR circuit 13.
On the other hand, the OR circuit 13 in the rate correction circuit 53 outputs a logical sum signal of high level “1” to the selector 15 in response to the input of the attack mode signal AMD. As a result, the selector 15 outputs the conversion rate data ER from the first conversion circuit 14 to the adder 17, and the rate reduction circuit 16 directly receives the attack rate AR from the control circuit 51.
Output to 7.

Therefore, the addition signal of the conversion rate data ER and the attack rate AR is output from the adder 17 to the second conversion circuit 18, and the second conversion circuit 18 adds the addition signal as the second rate signal RATE2. Output to.
The adder 54 and the shift register 55 are the rate correction circuit 5
The second rate signal RATE2 output from 3 is accumulated, and the envelope waveform data ENV of the attack portion is output to the comparator 52, the rate correction circuit 53, and the adder 54. Then, the comparator 52 outputs the coincidence signal EQ to the control circuit 51 when the value of the envelope waveform data ENV reaches the attack level AL.

When the coincidence signal EQ from the comparator 52 is input, the control circuit 51 receives the decay rate DR from the decay mode signal DMD as the mode signal MD to the comparator 52, the rate correction circuit 53 and the adder 54. The first
As the rate signal RATE1, the comparator 11 and the rate reduction circuit 16 in the rate correction circuit 53 are provided with the decay level DL as the target level signal TARGET.
To each output.

The AND circuit 12 in the rate correction circuit 53 still outputs a logical product signal of low level "0" to the rate reduction circuit 16 and the OR circuit 13. The OR circuit 13 outputs the logical sum signal of low level "0" to the selector 15 this time according to the input of the decay mode signal DMD. As a result, the selector 15 outputs the level “0” signal to the adder 17, and the rate reduction circuit 16 outputs the decay rate DR from the control circuit 51 to the adder 17 as it is.

Therefore, only the decay rate DR is output from the adder 17 to the second conversion circuit 18, and the second conversion circuit 18 outputs the decay rate DR to the second rate signal RATE2.
Is output to the adder 54. The adder 54 and the shift register 55 accumulate the decay rate DR output from the rate correction circuit 53, and compare the envelope waveform data ENV of the decay section with the comparator 52 and the rate correction circuit 53.
And to the adder 54. Then, the comparator 52 outputs the coincidence signal EQ to the control circuit 5 when the value of the envelope waveform data ENV is attenuated to the decay level DL.
Output to 1.

At the time when the coincidence signal EQ is input from the comparator 52, the control circuit 51 outputs the sustain mode signal SMD as the mode signal MD to the comparator 52, the rate correction circuit 53 and the adder 54 at the sustain rate SR.
(= 0) is used as the first rate signal RATE1 and the sustain level SL of the comparator 11 and the rate reduction circuit 16 in the rate correction circuit 53 is changed to the target level signal TARGET.
To the comparator 52, respectively. In this sustain mode, since the sustain rate SR is "0", the decay level DL = sustain level SL is maintained as it is until the key-off signal KOFF from the key press detection circuit 22 is input.

As described above, when the keyboard 21 is released while the sustain level SL is maintained as the envelope waveform data ENV in the sustain mode, the key press detection circuit 22 outputs the key-off signal KOFF in response to the envelope parameter generation circuit. 25 and tone signal generating circuit 24
Respectively. The control circuit 51 of the envelope waveform generation circuit 26 receives the key-off signal KO from the key-depression detection circuit 22.
At the time of inputting FF, based on the release rate RR of the envelope parameter ADSR from the envelope parameter generating circuit 25, a control signal (release mode signal RMD, minimum level, Release rate RR) is compared with comparator 52, rate correction circuit 53 and adder 5
4 is output.

That is, the control circuit 51 is the key depression detection circuit 2
When the key-off signal KOFF is input from 2, the release mode signal RMD is used as the mode signal MD at that time, and the release rate RR is sent to the comparator 52, the rate correction circuit 53 (AND circuit 12) and the adder 54 and the first rate signal RATE1. As a target level signal TARGET, the minimum level “0” is output to the comparator 11 and the rate reduction circuit 16 in the rate correction circuit 53.

Since the AND circuit 12 in the rate correction circuit 53 inputs the key-off signal KOFF or the release mode signal RMD, it depends on the comparison result of the comparator 11 (whether the release rate RR is larger than the predetermined value TH). The logical product signal is output to the rate reduction circuit 16 and the OR circuit 13. Here, since the release rate RR is sufficiently smaller than the predetermined value TH, the AND circuit 12 still outputs the logical product signal of low level “0” to the rate reduction circuit 16 and the OR circuit 13. The OR circuit 13 outputs a logical sum signal of low level "0" to the selector 15 this time in response to the input of the release mode signal RMD. As a result, the selector 15 outputs the level “0” signal to the adder 17.

Therefore, since only the release rate RR is output from the adder 17 to the second conversion circuit 18, the second conversion circuit 18 outputs the release rate RR to the adder 54 as the second rate signal RATE2. To do. The adder 54 and the shift register 55 accumulate the release rate RR output from the rate correction circuit 53, and output the envelope waveform data ENV of the release section to the comparator 52, the rate correction circuit 53, and the adder 54. become. Then, the comparator 52 outputs the envelope waveform data EN
When the value of V attenuates to the minimum level “0”, the coincidence signal EQ is output to the control circuit 51. The control circuit 51 ends the output of the envelope waveform data ENV in response to the input of the coincidence signal EQ from the comparator 52.

In this way, the envelope waveform generating circuit 2
When 6 is generating the envelope waveform data ENV of the release section, when a new key depression is generated, the key depression detection circuit 22 allocates the tone generation to the most attenuated channel in the release mode and the forcing dump signal is generated. FD
Is output to the envelope parameter generation circuit 25. The envelope parameter generation circuit 25 outputs the forcing damper plate FR to the envelope waveform generation circuit 26 instead of the release rate RR in synchronization with the input of the forcing dump signal FD.

The control circuit 51 of the envelope waveform generation circuit 26 converts the forcing damper plate FR output from the envelope parameter generation circuit 25 into the rate correction circuit 5.
Output to 3. Since the forcing damper plate FR is larger than the predetermined value TH, the comparator 11 in the rate correction circuit 53 outputs a high level “1” comparison signal to the AND circuit 12. At this time, since the AND circuit 12 has already input the key-off signal KOFF or the release mode signal RMD, it outputs a logical product signal of high level "1" to the rate reduction circuit 16 and the OR circuit 13. As a result, the OR circuit 13 outputs the high level "1" OR signal to the selector 1
5, the selector 15 outputs the conversion rate data ER from the first conversion circuit 14 to the adder 17, and the rate reduction circuit 16 reduces the forcing damper plate FR from the control circuit 51. Output to the adder 17.

The adder 17 outputs the addition signal of the conversion rate data ER and the forcing damper plate FR reduced by the rate reduction circuit 16 to the second conversion circuit 18.
The second conversion circuit 18 outputs the added signal to the second rate signal RA.
It is output to the adder 54 as TE2. The adder 54 and the shift register 55 accumulate the second rate signal RATE2 output from the rate correction circuit 53, and as shown in FIG. 3, the envelope waveform of the forcing dump section showing a gentle attenuation at the beginning and a rapid attenuation thereafter. Data ENV is used as comparator 5
2, output to the rate correction circuit 53 and the adder 54. Then, the comparator 52 outputs the coincidence signal EQ to the control circuit 51 when the value of the envelope waveform data ENV is attenuated to the minimum level “0”, and the generation of the envelope waveform data ENV is completed.

In the above-described embodiment, the case where the rate reducing circuit is provided to reduce the forcing damper plate FR has been described, but the present invention is not limited to this, and whether a negative offset value is added to the rate at the time of forcing dump. Alternatively, the value may be decreased and then added with the current value. This is because the forcing damper plate is originally a large value, and it is possible that the calculated value will immediately overflow if the current value is added. By adding or reducing the negative offset to the forcing damper plate in this way, there is a margin before the overflow and the range of the change in the inclination at the time of dumping can be increased.

In the above embodiment, the first method for accelerating the rate at the time of attack or forcing dump is used.
Rate signal RATE1 and envelope waveform data ENV
However, it goes without saying that a conversion table as described in Japanese Patent Laid-Open No. 63-125989 may be used.

Further, in the above embodiment, the AND circuit 1 is used.
When the key input signal KOFF from the key depression detection circuit 22 or the release mode signal RMD from the control circuit 51 is input to the selector 2, the comparison result of the comparator 11 is transmitted to the selector 15 via the OR circuit 13. I explained,
Not limited to this, the AND circuit 12 may be omitted, and the comparison result of the predetermined value TH by the comparator 11 and the first rate signal RATE1 may be output to the selector 15 via the OR circuit 13 or the AND circuit. 12 and the OR circuit 13 may be omitted and the comparison result of the comparator 11 may be directly output to the selector 15. At this time, the comparator 11 outputs the mode signal MD
May be input and each rate may be compared with a predetermined value corresponding to the mode signal.

[0055]

According to the present invention, since the normal release process and the forcing dump process are switched according to the magnitude of the rate, it is provided only for performing a special process such as forcing dump. This has the effect of reducing the amount of dedicated hardware as much as possible.

[Brief description of drawings]

FIG. 1 is a diagram showing a detailed configuration of a rate correction circuit of FIG.

FIG. 2 is a diagram showing an example of the configuration of an electronic musical instrument in which the envelope waveform generator according to the present invention is used for generating a tone volume amplitude envelope waveform.

FIG. 3 is a diagram showing an example of envelope waveform data in time-varying decibel expression (logarithmic expression).

4A and 4B are diagrams showing a slope of a release envelope waveform and a slope of a forcing dump envelope waveform. FIG. 4A shows a release waveform and FIG. 4B shows a forcing dump waveform.

5 is a diagram showing a detailed configuration of the envelope waveform generating circuit of FIG.

[Explanation of symbols]

11 ... Comparator, 12 ... AND circuit, 13 ... OR circuit, 1
4 ... 1st conversion circuit, 15 ... Selector, 16 ... Rate reduction circuit, 17 ... Adder, 18 ... 2nd conversion circuit, 21 ... Keyboard, 22 ... Key depression detection circuit, 23 ... Tone selection circuit, 24 ...
Tone signal generating circuit, 25 ... Evelope parameter generating circuit, 26 ... Envelope waveform generating circuit, 27 ... Adder,
28 ... Logarithmic / linear conversion circuit, 29 ... D / A conversion circuit,
2A ... Sound system, 51 ... Control circuit, 52 ... Comparator, 53 ... Rate correction circuit, 54 ... Adder, 55 ... Shift register

Claims (2)

[Claims] 1. An envelope waveform generator that inputs a rate of change designating the shape of each portion of a waveform of an envelope waveform and generates an envelope of a musical tone based on the rate of change, and compares the rate of change with a predetermined value. It has a comparing means, a first control mode for generating a normal envelope, and a second control mode for generating an envelope in which a high-speed waveform change is performed, and depending on the comparison result of the comparing means, An envelope waveform generating device comprising: a waveform generating unit that generates an envelope waveform in one of the modes. 2. The waveform generating means generates a normal envelope by accumulating the rate of change in the first control mode, and corrects the rate of change in the second control mode. 2. The envelope waveform generator according to claim 1, wherein the envelope waveform generator is configured to generate a high-speed waveform change by accumulating the corrected change rates.