JPH088536A - Manufacture of multilayer printed wiring board - Google Patents

Abstract

PURPOSE:To manufacture a multilayer printed wiring board excellent in characteristics. CONSTITUTION:An insulating layer 24 is formed on a second conductor layer, an insulating layer 25 is formed on a fifth conductor layer (first conductor layers), first plating films 27a and 27b are formed on the surfaces of the insulating layers 24 and 25 respectively by first plating, a second plating film 30 is provided by second plating, and a first conductor layer 31 and a sixth conductor layer 32 (second conductor layers) are formed of the first plating films 27a and 27b and the second plating film 30. Moreover, through-holes 28 and 29 may be formed after the first plating films 27a and 27b are formed. Or, a mechanical polishing operation may be performed after the first plating films 27a and 27b are formed. The insulating layers 24 and 25 may be formed of composition composed of epoxy compound fast in reactivity to carboxylic acid additive acrylate compound and another epoxy compound slow in reactivity.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a multilayer printed wiring board, and more particularly to a multilayer printed wiring board for improving disconnection of a conductor layer formed on an insulating layer and insulation failure of the insulating layer. It relates to a manufacturing method.

[0002]

2. Description of the Related Art With the recent increase in wiring density in electronic technology, multilayer printed wiring boards in which a plurality of wiring layers are laminated have come to be used as printed wiring boards. Such a multilayer printed wiring board generally has a structure in which a printed wiring board called an inner layer is sandwiched between printed wiring boards called an outer layer via an adhesive layer (B stage prepreg). In the multilayer printed wiring board, generally, through holes that connect the wiring layers of the upper and lower outer layers are formed.

As a method of manufacturing the above-mentioned multilayer printed wiring board, an inner layer is sandwiched by an outer layer via an adhesive agent, laminated and pressed, then a through-hole hole for forming a through-hole is formed, and the through-hole hole is plated. A method of forming a through hole, a so-called stacking press method can be mentioned.

As another method, an insulating layer is formed by applying ink on a conductor layer which is formed on the inner layer and serves as a lower circuit, and a through hole for forming a through hole is formed by using a drill or the like. And a so-called built-up method, in which a conductor layer (outer layer) serving as an upper-layer circuit is formed by plating and forming a through hole.

[0005]

However, in the above-mentioned lamination pressing method, since the lamination pressing step is required, the production equipment becomes large and the productivity is not good because of batch production.

On the other hand, the built-up method does not have the problem of the laminated pressing method, but has the following disadvantages because the plating is directly applied to the insulating layer. That is, when plating is performed, a plating catalyst is adsorbed on the insulating layer to perform electroless plating, but this method tends to cause so-called non-plating, that is, plating does not occur depending on the surface condition of the insulating layer. When the non-plating occurs in this manner, disconnection in the circuit of the conductor layer serving as the upper circuit is likely to occur, and the characteristics of the manufactured multilayer printed wiring board are impaired.

Further, since a through hole is formed by directly drilling a hole in the insulating layer, the insulating layer is easily scratched, which causes deterioration of the insulation and impairs the characteristics of the manufactured multilayer printed wiring board.

Further, since the insulating layer formed by applying the ink generally has a film thickness of 100 μm or less, the unevenness of the conductor layer constituting the lower circuit appears on the surface of the insulating layer as it is,
When plating is performed thereon to form a conductor layer to be an upper circuit, the plated film surface does not become a smooth surface.
Therefore, when an upper layer circuit is patterned on this plating film, a pattern formation defect is likely to occur, and when a component is mounted in the circuit, a component mounting defect is also likely to occur, which impairs the characteristics of the manufactured multilayer printed wiring board. .

Therefore, the present invention has been proposed in view of the actual situation of the related art, in which plating non-adhesion does not occur, insulation deterioration does not occur, pattern formation defects and component mounting defects do not occur, and characteristics of An object of the present invention is to provide a method for manufacturing a multilayer printed wiring board, which enables good manufacturing of the multilayer printed wiring board.

[0010]

In order to achieve the above-mentioned object, the present invention forms an insulating layer on a first conductor layer and forms a second conductor layer by plating on the insulating layer. In the method of manufacturing a multilayer printed wiring board, the surface of the insulating layer is first plated, and then the second plating is performed to form a second conductor layer. In addition,
At this time, the thickness of the plated film formed by the first plating is preferably about 5 to 10 μm.

In the method for manufacturing a multilayer printed wiring board according to the present invention, after the first plating, a through hole is formed from the plating film side to the first conductor layer side, and then the second plating is performed. You may plate.

Further, in the method for manufacturing a multilayer printed wiring board of the present invention, after the first plating, the surface of the plated film may be mechanically polished and then the second plating may be performed.

Furthermore, in the method for manufacturing a multilayer printed wiring board according to the present invention, the insulating layer may be formed of a composition comprising an epoxy compound having a slow reactivity with a carboxylic acid-added acrylate compound and an epoxy compound having a fast reactivity. good.

Examples of the slow-reactive epoxy compound and the fast-reactive epoxy compound contained in the composition for forming the insulating layer include those shown below.

The term "reactivity" as used herein means a reaction rate when each of the epoxy compounds is contained in the above composition and heated, and the reaction mainly considered at this time is a carboxyl group and an epoxy group. , And a reaction between a hydroxyl group and an epoxy group, and between epoxy groups.

As a method for evaluating the reaction rate, there is a gelling test method based on JIS C-2104 as described below.

[Gel Test Method] First, 100 parts of a carboxylic acid-added acrylate compound was blended with each epoxy compound in an equivalent amount of epoxy equivalent to carboxylic acid equivalent,
A sample is prepared by mixing 1 part of dicyandiamide and 60 parts of carbitol acetate and kneading and dispersing with a three-roll mill. Next, 0.5 g of each of these samples is taken, and each gelation time at 150 ° C. is measured using a GT-D type gelation tester manufactured by Nisshin Chemical Co.

In the present invention, the above gelling time is used as a reaction rate, and each epoxy compound is classified into the following three groups according to the reaction rate (gelling time). Reactive epoxy compounds and fast reactive epoxy compounds were used, of which slow reactive epoxy compounds and fast reactive epoxy compounds were used.

That is, first, the one having a gelation time of 9 minutes or more is used as an epoxy compound having slow reactivity, and the second is
The one having a gelling time of 5 minutes or more and less than 9 minutes was a moderately reactive epoxy compound, and the one having a gelling time of less than 5 minutes was a fast-reactive epoxy compound. .

Specific examples of the slow-reactive epoxy resin include Epicoat 1001, Epicoat 1004 manufactured by Yuka Shell Co., Epicron 900, Epicron 1050 manufactured by Dainippon Ink and Chemicals, and Epototo YD-134, YD manufactured by Tohto Kasei. -011, made by Dow Chemical Company
D. E. R. 661, Ciba Geigy Araldide 6071, Asahi Kasei Kogyo AER-661, Sumitomo Chemical Co. Sumiepoxy ELA-134, ESA-0
Phenoxy type epoxy compounds such as 11 (all are trade names) and Epicoat YL903, YL90 manufactured by Yuka Shell Co., Ltd.
6, Dainippon Ink and Chemicals, Inc. Epicron 152, Epicron 1120, Toto Kasei Epotote YDB-
400, YDB-500, D.W. E.
R. 511, Ciba Geigy Araldide 801
1, Asahi Kasei Corporation AER-711, AER-75
5. Sumitomo Chemical Co., Ltd. Summy Epoxy ELB-24
0, ESB-500, etc. (both are trade names), brominated epoxy compound, Epichron T manufactured by Dainippon Ink and Chemicals, Inc.
Rubber-modified epoxy compounds such as SR-930, TSR-601, Toto Kasei Epotote YR-207, YR-450, YR-102 (all are trade names), or Toto Kasei Epotote YD-172 (trade name) Examples thereof include dimer acid-modified epoxy compounds.

Further, specific examples of the epoxy compound having high reactivity are Epicoat 604 manufactured by Yuka Shell Co., Eport YH-434 manufactured by Tohto Kasei Co., Araldide MY720 manufactured by Ciba Geigy, Sumie Epoxy ELM- manufactured by Sumitomo Chemical Co., Ltd. Glycidylamine type epoxy compounds such as 120 (all trade names), Epicoat YL-931 manufactured by Yuka Shell Co., Ltd., Araldide 16 manufactured by Ciba-Geigy.
Tetraphenylol ethane type epoxy compounds such as 3 (all are trade names), or Ciba Geigy Araldide P
Heterocyclic epoxy compounds such as T810, TEPIC (trade name) manufactured by Nissan Chemical Co., Ltd., hydantoin-type epoxy compounds such as Araldide CY350 (trade name) manufactured by Ciba-Geigy, Celoxide 2 manufactured by Daicel Chemical Industries, Ltd.
021, Ciba Geigy Araldide CY175
Examples thereof include alicyclic epoxy compounds such as CY179 (all are trade names).

[0022]

In the method for manufacturing a multilayer printed wiring board according to the present invention, the surface of the insulating layer formed on the first conductor layer is plated for the first time, and then the second plating is performed for the second conductor. Since the layer is formed, the portion which has not been plated at the time of the first plating is also plated at the second plating, so that the non-plating hardly occurs.

In the method for manufacturing a multilayer printed wiring board according to the present invention, a through hole such as a through hole for forming a through hole from the plating film side to the first conductor layer side after the first plating is performed. When the second plating is performed, the through hole is formed in the insulating layer covered with the plated film, and the insulating layer is formed by physical contact with the insulating layer at the time of forming a hole. The damage of the is prevented. Further, when the holes are formed by a drill or the like, the plated film suppresses the insulating layer, and the shape of the insulating layer is prevented from collapsing due to the feed of the drill.

Furthermore, in the method for manufacturing a multilayer printed wiring board according to the present invention, after the first plating, the surface of the plated film is mechanically polished, and then the second plating is performed, whereby the second plating is performed. The surface of the plated film is smoothed.

[0025]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Specific embodiments to which the present invention is applied will be described in detail below with reference to the drawings. First, the structure of a multilayer printed wiring board manufactured by the method for manufacturing a multilayer printed wiring board according to this embodiment will be described. In addition, in the present embodiment, an example in which the upper and lower sides of the laminated substrate are sandwiched by the substrates and applied to a multilayer printed wiring board having a structure having a through hole and a blind via hole will be described. Not necessarily required.

As shown in FIG. 1, the multilayer printed wiring board has a first conductor layer 4 (second conductor) having a predetermined wiring pattern on the upper surface of the laminated substrate 1 with a first insulating layer 2 interposed therebetween. Layer) is formed, and the sixth conductor layer 5 (second conductor layer) also having a predetermined wiring pattern is formed on the lower surface of the laminated substrate 1 via the second insulating layer 3. In addition,
Here, the conductor layers formed in the multilayer printed wiring board as shown in FIG.
.. When counting the sixth layer, the first layer is called the first conductor layer.

The laminated substrate 1 is composed of three substrates 6, 7, 8
Are sequentially laminated and joined. Then, the second conductor layer 9 (first conductor layer) having a predetermined wiring pattern on the main surface 6a of the substrate 6 on the side opposite to the joint surface with the substrate 7
Is formed, a third conductor layer 10 having a predetermined wiring pattern is formed between the substrate 6 and the substrate 7, and a fourth conductor layer 1 having a predetermined wiring pattern is formed between the substrate 7 and the substrate 8.
1 is formed, and the fifth conductor layer 12 (first conductor layer) having a predetermined wiring pattern is formed on the main surface 8a of the substrate 8 on the side opposite to the joint surface with the substrate 7. The laminated board 1 is a laminated board having a total of four conductor layers. That is, the multilayer printed wiring board is a laminated board having six conductor layers.

In the multilayer printed wiring board, the connection portion 4a of the first conductor layer 4 and the fourth conductor layer 1 are provided.
A through hole 13 for electrically connecting the first connection portion 11a and the connection portion 5a of the sixth conductor layer 5 is provided. The through hole 13 penetrates through the first insulating layer 2, the laminated substrate 1, and the second insulating layer 3, and extends from the connection portion 4a of the first conductor layer 4 to the connection portion 5a of the sixth conductor layer 5. Up to each connection part 4a, 11a,
5a is a hole provided so as to penetrate through the central portion of 5a,
Conductive material is arranged on the peripheral wall of the hole, and each connection part 4
a, 11a, 5a are electrically connected.

Further, in the above-mentioned multilayer printed wiring board, 1
Connection portion 4c of the second conductor layer 4, connection portion 9a of the second conductor layer 9, connection portion 10a of the third conductor 10, connection portion 1 of the fourth conductor layer 11
1b, connection portions 12a, 6 of the fifth conductor layer 12
A through hole 15 for electrically connecting the connection portion 5b of the second conductor layer 5 is also provided. The through hole 15 penetrates through the first insulating layer 2, the laminated substrate 1, and the second insulating layer 3 and extends from the connection portion 4c of the first conductor layer 4 to the connection portion 5b of the sixth conductor layer 5. Up to the connection portion 4c, 9a, 10a, 11b, 12a, 5b is a hole portion provided so as to penetrate through the central portion, the conductive material is arranged on the peripheral wall of the hole portion, the connection portion 4c, 9
a, 10a, 11b, 12a, 5b are electrically connected.

Furthermore, the multilayer printed wiring board is provided with a blind via hole 14 for electrically connecting the connection portion 4b of the first conductor layer 4 and the connection portion 9b of the second conductor layer 9. ing. The blind via hole 14 also has a structure similar to that of the through hole 13 and serves to electrically connect the connection portions 4b and 9b.

Next, a method for manufacturing the multilayer printed wiring board of this embodiment will be described. The method for manufacturing the multilayer printed wiring board of this embodiment basically follows the build-up method. However, the following description will be limited to the formation of the through holes 13 and 15 and the blind via hole 14.

In the method for manufacturing a multilayer printed wiring board according to this embodiment, first, as shown in FIG. 2, copper foils are formed on both surfaces of the laminated substrate 21 and then the second layer having a predetermined wiring pattern is formed. The second conductor layers 22 and 23 (first conductor layers) are formed. At this time, the above-mentioned second and fifth conductor layers 2
2, 23 are connection parts 22a, 22b,
23a. However, the laminated substrate 21 is formed by laminating three substrates (not shown), and forming the third and fourth conductor layers having a predetermined wiring pattern between the substrates.

Next, the second and fifth conductor layers 22, 23
After performing the blackening treatment to form copper oxide on the surface, as shown in FIG. 3, the second and fifth conductor layers 2 on the laminated substrate 21 are formed.
2, 23 (first conductor layer) is coated with an alkali developing resist ink by a screen printing method, a spray method, or a curtain coating method to form insulating layers 24, 25. The alkali-developable resist ink is a composition composed of an epoxy compound having a slow reactivity with a carboxylic acid-added acrylate compound and an epoxy compound having a fast reactivity, and in this example, BT-90 (manufactured by Taiyo Ink Mfg. Co., Ltd. Trade name) was used. The reactivity of the slow-reactive epoxy compound and the fast-reactive epoxy compound is the same as described above.

Then, as shown in FIG.
Blind holes 26 for forming blind via holes by photography are provided at positions corresponding to the connection portions 22b of No. 4 in FIG. As a method for forming the blind hole 26 as described above, there can be mentioned a photographic method in which a desired hole is formed by exposing through a photo tool and developing. Further, the holes may be opened by laser light or sandblasting.

Then, a first heat treatment called post cure is performed, and the temperature and time conditions at this time are controlled to bring the insulating layers 24 and 25 into a semi-cured state. That is, the insulating layers 24 and 25 contain an epoxy compound having a slow reactivity, and the epoxy compound is not completely cured by the first heat treatment, and an uncured one remains.
The insulating layers 24 and 25 are in a semi-cured state. The semi-cured state here means the above-mentioned state and the insulating layer 2
4 and 25 indicate a cured state in a range from a cured state where drilling can be performed in the subsequent process to a range where sufficient unevenness is obtained by roughening in the subsequent process.

Then, the surfaces of the insulating layers 24 and 25 are roughened. In this embodiment, a roughening agent is used to dissolve out the uncured epoxy compound in the vicinity of the surfaces of the insulating layers 24 and 25 to roughen the surface. That is, the insulating layer 2
The surface of the epoxy compound having a low reactivity in 4,5 and 25, which has not been cured by the first heat treatment, is melted and roughened.

Examples of the surface-roughening agent include potassium permanganate, potassium dichromate, concentrated sulfuric acid and other oxidizing agents, sodium hydroxide, potassium hydroxide and other alkalis, N-methyl-2-pyrrolidone, N, N. Examples include organic solvents such as dimethylformamide and dimethylsulfoxide (DMSO).

Here, an example in which an oxidizing agent is used as a surface-roughening agent is shown. When roughening the surface, first, the insulating layer 24,
25 is swollen with dimethylformamide (DMF), dimethylsulfoxide (DMSO), N-methyl-2-pyrrolidone (NMP), pyridine and the like. Then
The surfaces of the swollen insulating layers 24 and 25 are roughened with an oxidizing agent such as potassium permanganate, potassium dichromate, or concentrated sulfuric acid.

In this embodiment, the uncured epoxy compound in the vicinity of the surfaces of the semi-cured insulating layers 24 and 25 is melted and removed to roughen the insulating layers 24 and 25. Therefore, the surfaces exposed in the through holes 28 and 29 of the insulating layers 24 and 25 are stably made uneven,
Roughened well. That is, the plating anchor having a sufficient depth is formed on the surface.

Further, in this embodiment, since the unreacted slow-reactive epoxy compound is melted out, the treatment with a relatively weak oxidizing agent is possible, the damage to the substrate is relatively small, and the drainage is reduced. Problems do not easily occur in processing.

Next, the first plating is performed on the insulating layers 24 and 25 including the inside of the blind holes 26 to form first plated films 27a and 27b as shown in FIG. The plating on the insulating layers 24 and 25 may be performed by a method usually used in manufacturing a printed wiring board.

That is, after the insulating layers 24 and 25 are cleaned and conditioned, catalyst application, activation, electroless plating, and then electroplating are performed to form the first plating film 2.
7a and 27b were formed. At this time, the film thickness of the first plating films 27a and 27b is preferably 3 to 20 μm,
When the thickness is less than 3 μm, the insulating layers 24 and 25 are easily scratched when the through hole is formed in the subsequent step, and when the thickness is more than 20 μm, the plating process takes a long time and the productivity is impaired. In the present embodiment, the first plating film 27
The film thickness of a and 27b was 10 μm.

Next, as shown in FIG. 6, the first plating film 27a, the insulating layer 24, the laminated substrate 21, the insulating layer 25, and the first
Through holes 28 and 29 for forming through holes are formed so as to penetrate through the plated film 27b. The through-holes 28 are formed in the second and fifth conductor layers 22 and 23.
The connection portions 22a and 23a of the above are also provided so as to penetrate therethrough.

The through-holes 28 and 29 are usually formed by making holes with a drill (drill diameter of about 0.2 to 0.4 mm), but they may be made by punching with a die.
Moreover, you may open a hole with a laser beam.

At this time, as described above, the insulating layers 24 and 25 are formed.
Since the first plating films 27a and 27b are formed on the insulating film 24, even if the through holes 28 and 29 are formed by drilling from the first plating film 27a side, the insulating layer 24 is not damaged. None, and the first plating films 27a and 27b
As the insulating layers 24 and 25 are restrained, the shapes of the insulating layers 24 and 25 are prevented from being deformed due to the drill feeding, and the insulation is not deteriorated.

Then, the surfaces of the insulating layers 24 and 25 exposed in the through holes 28 and 29 are roughened. The roughening is performed in the same manner as the roughening of the surfaces of the insulating layers 24 and 25 described above, and the insulating layer 2 exposed in the through hole holes 28 and 29.
A plating anchor having a sufficient depth will be formed on the surfaces of the surfaces 4 and 25.

Next, as shown in FIG. 7, plating is performed on the surfaces of the first plating films 27a and 27b to form the second plating film 30, and the first plating film 27a and the second plating film 27 are formed. The film 30 forms the first conductor layer 31, and the first plating film 27b and the second plating film 30 form the sixth conductor layer 32. The second plating film 30 is formed on the first plating film 27 a in the blind hole 26 and is exposed in the through hole 29.
It is formed so as to cover the surface as well. The plated layer 31
May be formed by electroless plating according to a conventional method, but may be formed by using both electroless plating and electrolytic plating in combination.

In this way, the first plated films 27a, 27
If the second plating film 30 is formed on top of b, it is possible to plate the non-plated portions of the insulating layers 24 and 25.

If mechanical polishing such as buffing is performed before forming the second plated film 30 on the first plated films 27a and 27b, the surface of the second plated film 30 becomes a smooth surface. .

Next, the first conductor layer 31 is formed according to a conventional method.
A predetermined wiring pattern is formed on the sixth conductor layer 32 as shown in FIG. The first conductor layer 31 is a connection portion 31a provided on the through hole 28,
Connection part 31 provided on the through hole 29
b, the connection portion 3 provided on the blind hole 26
1c, and the sixth conductor layer 32 has a connection portion 32a provided on the through hole 28,
Connection part 32 provided on the through hole 29
b.

At this time, as described above, the second plating film 30 is also formed on the inner walls of the through-holes 28, 29, and as a result, the connection portions 31a, 6 layers of the first conductor layer 31 are formed. Connection portion 32a of the conductor layer 32 for
And the connection portion 31b of the first conductor layer 31,
The connection portions 32b of the sixth conductor layer 32 are electrically connected and a through hole is formed.
It goes without saying that the third and fourth conductor layers (not shown) in the laminated substrate 21 are also provided with connection portions and are electrically connected to these.

On the other hand, also in the blind hole 26, the first and second plating films 27a and 30 are formed on the inner wall,
As a result, the connection portion 31c of the first conductor layer 31
And the connection portions 22b of the second conductor layer 22 are electrically connected by the first and second plating films 27a and 30 in the blind hole 26, thereby forming a blind via hole. Therefore, the multilayer printed wiring board as shown in FIG. 1 is completed.

As in the present embodiment, the insulating layers 24 and 25 are formed on the second and fifth conductor layers 22 and 23 (first conductor layers), and the insulating layers 24 and 25 are formed on the insulating layers 24 and 25 by 1 The first plating is performed to form the first plating films 27a and 27b, and then 2
The second plating is performed to form the second plating film 30,
A first conductor layer (second conductor layer) is formed by the first plating film 27a and the second plating film 30, and a sixth conductor layer is formed by the first plating film 27b and the second plating film 30. If the layer (second conductor layer) is formed, the portion that has not been plated at the time of the first plating is also plated by the second plating, so that the plating does not easily occur and the first layer is not formed. , 6th layer (2nd
Is less likely to occur, and the characteristics of the manufactured multilayer printed wiring board will be good.

As in this embodiment, after the first plating is performed to form the first plating films 27a and 27b, the second conductor layer 2 from the first plating film 27a side is formed.
By forming through-holes 28 and 29, which are through-holes for forming through-holes on the 2 (first conductor layer) side, and then performing the second plating to form the second plated film 30,
Damage to the insulating layer 24 due to physical contact at the time of punching is prevented. Furthermore, when the holes are drilled by a drill or the like, the first plating films 27a and 27b are formed on the insulating layer 24,
Insulation layers 24 and 2 due to drill feed
The collapse of the shape of 5 is also prevented. Therefore, insulation deterioration is suppressed, and the characteristics of the manufactured multilayer printed wiring board are improved.

Furthermore, in this embodiment, after the first plating is performed to form the first plating films 27a and 27b, mechanical polishing is performed, and the second plating is performed to form the second plating film 30. If formed, the surface of the second plating film 30 becomes a smooth surface, and the first and sixth conductor layers 31, 32 composed of the first plating films 27a and 27b and the second plating film 30 are formed. When a predetermined wiring pattern is formed on the (second conductor layer), pattern formation failure is less likely to occur. Also,
Even when mounting parts in the above wiring pattern,
It is difficult for component mounting failure to occur. Therefore, the characteristics of the manufactured multilayer printed wiring board are good.

In this embodiment, the insulating layer 2
Since the insulating layers 24 and 25 are semi-cured in the first heat treatment, the insulating layers 24 and 25 are in a semi-cured state because 4,25 are formed of a composition including an epoxy compound having a slow reactivity with a carboxylic acid-added acrylate compound and an epoxy compound having a fast reactivity Therefore, when the insulating layers 24 and 25 are roughened, the reactivity of the uncured state near the surfaces of the insulating layers 24 and 25 and the surfaces of the insulating layers 24 and 25 exposed in the through-holes 28 and 29. It will dissolve out the slow epoxy compound. Therefore, this portion becomes a stable and good roughened surface, a plating anchor having a sufficient depth is formed, and when the first plating films 27a and 27b and the second plating film 30 are formed on this. Improves the adhesion strength between the insulating layers 24 and 25 and the first plating films 27a and 27b and the second plating film 30. Then, by curing the epoxy compound having a slow reactivity in the uncured state by the second heat treatment, the insulating layers 24 and 25 and the first plating films 27a and 27b are cured.
Also, the adhesion strength with the second plating film 30 can be further improved, and the characteristics of the manufactured multilayer printed wiring board can be improved.

In this embodiment, the example in which the insulating layer and the conductor layer are provided on the laminated substrate has been described, but the same effect can be obtained by using a single-sided substrate or a double-sided substrate instead of the laminated substrate. Needless to say.

Next, in order to confirm the effect of this embodiment, the following experiment was conducted. In this experimental example, a 6-layer board having a blind via hole was manufactured according to the method for manufacturing a multilayer printed wiring board of the present example, and the number of short circuit breaks in a pattern was measured by an open short checker. The number of defective spots was visually measured.

Example 1 In this example, first, the second and fifth conductor layers (first conductor layers) were formed from a copper foil of a four-layer laminated substrate. That is, the surface of the copper foil is surface-adjusted by buffing and scrubbing, and a dry film (manufactured by Asahi Kasei Kogyo Co., Ltd., Sunfort AQ5044 (trade name)) is attached to the entire surface of the copper foil, and then an exposure device ( Exposed by Oak, HMW-551D (model name),
Develop with 3% sodium carbonate at 30 ℃ for 60 seconds, etch with ferric chloride solution, peel dry film with 3% caustic soda, wiring line width 100μm, distance between wiring lines 100μm predetermined wiring pattern The second and fifth conductor layers (first conductor layer) having the above are formed.

Next, a blackening treatment for forming a copper oxide film on the surfaces of the second and fifth conductor layers was performed to form an insulating layer on the second and fifth conductor layers. That is, BT-90 (trade name) manufactured by Taiyo Ink Co., Ltd. was used as a second layer by a screen printing method using a screen plate of Tetron 80 mesh.
It was applied on the second conductor layer. As the printing machine, LS-50 (model name) manufactured by New Long Co. was used. Then, in order to dry the insulating layer by touch, it was treated in a box oven (PHH-200 (model name) manufactured by Tabai Espec Co., Ltd.) under conditions of 70 ° C. and 20 minutes. Further, in order to increase the thickness of the insulating layer, coating,
It was dried.

Then, in order to form a blind hole having a diameter of 0.2 mm at the blind via hole forming position of the insulating layer, a photomask film having a predetermined pattern was brought into close contact with the insulating layer and exposed. As an exposure device, HMW-551D (model name) manufactured by Oak Co. was used, and the exposure amount was 500 mJ / cm ² . Then, development was performed with a 2% sodium carbonate solution to form blind holes at predetermined positions.

Next, in order to bring the insulating layer into a semi-cured state,
The first heat treatment was performed using a box oven under the conditions of 150 ° C. and 30 minutes.

Next, a conditioner (Electrobright MLB Desmi Initiator DI-manufactured by Ebara Densan Co., Ltd.)
464 (trade name)), and the surface of the insulating layer was roughened with potassium permanganate.

Subsequently, after electroless copper plating on the insulating layer, electrolytic plating was performed and panel plating was performed to form a first plated film having a film thickness of 7 μm over the entire surface of the insulating layer including blind holes.

Then, a through hole was formed by mounting a drill having a diameter of 0.3 mm on an NC drill machine (H-MARK 90J (model name) manufactured by Hitachi Seiko Co., Ltd.).

Then, in order to roughen the surface of the insulating layer exposed in the through hole, roughening was performed by the same method as described above.

Next, electroless plating and electroplating are performed on the first plating film to form a second plating film, and 1
The sixth and sixth conductor layers (second conductor layers) were formed. Needless to say, the second plating film is formed on the insulating layer exposed in the through hole.

Then, a second heat treatment was performed using a box oven to complete the curing of the insulating layer and further improve the adhesion strength between the insulating layer and the first plating film and the second plating film. . The heat treatment conditions are 170 ° C. and 20
Minutes.

Finally, predetermined wiring patterns were formed on the first and sixth conductor layers to complete a multilayer printed wiring board.

Example 2 In this example, a multilayer printed wiring board is manufactured by substantially the same steps as in Example 1 described above, and after forming a first plating film by the first plating, # 500. Buffing was performed using the buff of No. 1 to smooth the surface of the first plating film, and then the second plating film was formed by the second plating.

Comparative Example 1 In this comparative example as well, a multilayer printed wiring board is manufactured by substantially the same steps as in Example 1 described above, except that a first layer is formed on the insulating layer.
When forming the sixth conductor layer, the first conductor layer and the sixth conductor layer were formed by plating once.

Then, with respect to each of the 100 multilayer printed wiring boards manufactured in Examples 1 and 2 and Comparative Example 1 as described above, the number of short circuit breaks in the pattern was measured by an open short checker, and the plating was not adhered and the insulation was defective. The number of points and the like were visually measured. The results are shown in Table 1. In addition, in Table 1, the open short check pass rate,
The breakdown of the reason for the failure even though the open short check failed was shown.

[0073]

[Table 1]

From the results shown in Table 1, it was confirmed that in Examples 1 and 2, the open-short check failure was significantly reduced. In particular, in Example 1, since the first and second plating films were formed on the insulating layer to form the first and sixth conductor layers (second conductor layers), no plating was performed. Occurrence of adhesion is suppressed, disconnection is suppressed, and since the through-hole is formed after forming the first plating film on the insulating layer, occurrence of defective through-hole shape and insulation failure is suppressed. ing. Further, in Example 2, buffing was performed after forming the first plating film,
Since the second plating film is formed on the second plating film,
The irregularities on the surface of the plated film are suppressed, and the defective pattern formation is suppressed. That is, it was confirmed that in Examples 1 and 2 described above, the characteristics were good.

[0075]

As is apparent from the above description, the present invention is a multi-layer print in which an insulating layer is formed on a first conductor layer and plating is performed on the insulating layer to form a second conductor layer. In the method for manufacturing a wiring board, the insulating layer surface is plated for the first time, and then the second plating is performed to form the second conductor layer. Therefore, no plating is applied during the first plating. The existing portion is also plated by the second plating, the non-plating is unlikely to occur, the disconnection of the second conductor layer is hard to occur, and the characteristics of the manufactured multilayer printed wiring board are improved.

In the method for manufacturing a multilayer printed wiring board according to the present invention, after the first plating, a through hole is formed from the plating film side to the first conductor layer side, and then 2
When the plating is performed a second time, the through hole is formed in the insulating layer in a state of being covered with the plating film, so that the insulating layer is prevented from being damaged by physical contact at the time of opening the hole. Further, when the holes are formed by a drill or the like, the plated film suppresses the insulating layer, and the shape of the insulating layer is prevented from collapsing due to the feed of the drill. Therefore, insulation deterioration is suppressed,
The characteristics of the manufactured multilayer printed wiring board are good.

Furthermore, in the method for manufacturing a multilayer printed wiring board according to the present invention, after the first plating is performed, the surface of the plated film is mechanically polished, and then the second plating is performed. The surface of the plated film is smoothed by, and pattern formation failure hardly occurs when a predetermined wiring pattern is formed on the second conductor layer formed by these plated films. Further, even when a component is mounted in the wiring pattern, component mounting failure is unlikely to occur. Therefore, the characteristics of the manufactured multilayer printed wiring board are good.

From the above, it goes without saying that the manufacturing yield of the multilayer printed wiring board to be manufactured is improved, and if the method for manufacturing a multilayer printed wiring board of the present invention is applied, the productivity is greatly improved. To do.

[Brief description of drawings]

FIG. 1 is a perspective view showing a cross section of a main part of a multilayer printed wiring board manufactured by a method for manufacturing a multilayer printed wiring board to which the present invention is applied.

FIG. 2 shows a method of manufacturing a multilayer printed wiring board to which the present invention is applied in the order of steps, and is an enlarged cross-sectional view of an essential part schematically showing the step of forming second and fifth conductor layers on a laminated substrate. It is a figure.

FIG. 3 is a view showing a method of manufacturing a multilayer printed wiring board to which the present invention is applied in order of steps, schematically showing a step of forming an insulating layer on a second conductor layer and a fifth conductor layer. FIG.

FIG. 4 is a fragmentary enlarged cross-sectional view showing a method of manufacturing a multilayer printed wiring board to which the present invention is applied, in the order of steps, and schematically showing a step of forming blind holes in an insulating layer.

FIG. 5 is a fragmentary enlarged cross-sectional view showing a method of manufacturing a multilayer printed wiring board to which the present invention is applied, in order of steps, and schematically showing a step of forming a first plating film on an insulating layer.

FIG. 6 is a fragmentary enlarged cross-sectional view showing a method of manufacturing a multilayer printed wiring board to which the present invention is applied, in the order of steps, and schematically showing a step of forming a through hole.

FIG. 7 shows a method for manufacturing a multilayer printed wiring board to which the present invention is applied in the order of steps, in which a second plating film is formed on a first plating film.
FIG. 6 is an enlarged cross-sectional view of a main part schematically showing a step of forming a plating film of, and forming a first conductor layer and a sixth conductor layer.

FIG. 8 shows a method of manufacturing a multilayer printed wiring board to which the present invention is applied in the order of steps, and is a main part schematically showing the step of forming a predetermined wiring pattern on the first conductor layer and the sixth conductor layer. It is an expanded sectional view.

[Explanation of symbols]

 21 Laminated Substrate 22 Second Conductor Layer 23 Fifth Conductor Layer 24,25 Insulating Layers 27a, 27b First Plating Film 28,29 Through Hole Hole 30 Second Plating Film 31 First Conductor Layer 32 6th conductor layer

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Office reference number FI Technical display location H05K 3/22 A 7511-4E 3/24 A 7511-4E 3/40 A 7511-4E

Claims (4)

[Claims] 1. A method for manufacturing a multilayer printed wiring board, comprising: forming an insulating layer on a first conductor layer; plating the insulating layer to form a second conductor layer; A method for manufacturing a multilayer printed wiring board, which comprises performing plating and then performing a second plating to form a second conductor layer. 2. After performing the first plating, a through hole is formed from the plating film side to the first conductor layer side, and then 2
The method for manufacturing a multilayer printed wiring board according to claim 1, wherein plating is performed a second time. 3. The method for manufacturing a multilayer printed wiring board according to claim 1, wherein after the first plating, the surface of the plated film is mechanically polished, and then the second plating is performed. 4. The production of a multilayer printed wiring board according to claim 1, wherein the insulating layer is formed of a composition comprising an epoxy compound having a slow reactivity with a carboxylic acid addition acrylate compound and an epoxy compound having a fast reactivity. Method.