JPH0868985A - Liquid crystal display device - Google Patents

Abstract

PURPOSE: To provide a liquid crystal display device which does not generate flickering or burning on a liquid crystal screen by providing this liquid crystal display device with a circuit for adjusting the voltage at the neutral point A of a resistance group foaming gradient voltages. CONSTITUTION: Resistors 21, 22, 23...27, 28, 29, 30...34, 35, 36 of R1 , R2 ,...R7 , R8 , R9 , R10 ...R14 , R14 , R15 ,R16 are interposed in series between a terminal 12 which outputs the voltage of a positive polarity generated by a square wave generating circuit 11 and a terminal 13 which outputs the voltage of a negative polarity. The connecting point A of both resistors 28, 29 is the neutral point of the voltages of both positive and negative polarities. The gradient voltages V(), V1 , V2 ...V7 are outputted from the respective connecting points of the terminal 12 and both resistors 21, 22, 23,...27, 28. The output terminal of a buffer circuit 14 regulated in the output voltage by a variable resistor 15 and the point A are connected, by which the voltage at the point A is made regulatable by this variable resistor 15.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix type liquid crystal display device using thin film transistors, and more particularly to a liquid crystal display device for driving a liquid crystal cell by a gradation voltage obtained by voltage division by a resistor to display an image.

[0002]

2. Description of the Related Art FIG. 3 is an equivalent circuit diagram showing a liquid crystal cell as one pixel and its peripheral portion in a conventional active matrix type liquid crystal display device using thin film transistors. In the figure, reference numeral 1 denotes a thin film transistor (hereinafter referred to as TFT) which operates as an n-channel transistor, its source is connected to a source line 2, its gate is connected to a gate line 3, and its drain is a pixel constituting a liquid crystal cell 4. It is connected to the electrode 4a.

A scanning signal voltage for selecting the TFT 1 and controlling ON / OFF is given to the TFT 1 through the gate line 3, and a signal voltage for driving the liquid crystal cell 4 is supplied from the source line 2 through the TFT 1 to the liquid crystal cell 4 Given to. The liquid crystal cell 4 has a pixel electrode 4a
A common electrode 4b facing each other is provided, and a liquid crystal is sandwiched between both electrodes 4a, 4b. The liquid crystal cell 4 has its own capacitance C _lc , and the additional capacitance C _st 5 is connected to the pixel 4 in parallel. Then, a parasitic capacitance C _gd exists between the gate and drain of the TFT 1.

Next, the operation will be described. Figure 4 shows TFT 1
6 is a waveform diagram showing voltage waveforms of a gate, a source, and a drain of FIG. In the figure, (a) shows the gate voltage V _g , and (b)
Indicates the source voltage V _S , V _S0 is the average value of the source voltage V _S , and V _Sa is the amplitude of the source voltage. (c) shows the drain voltage V _D. Then, V _S0 is applied to the common electrode 4b of the liquid crystal cell 4.

At time t ₁ when the gate voltage V _g rises, the source voltage V _S also rises, the TFT 1 is turned on, and the signal voltage for driving the liquid crystal cell 4 has both capacitances C _lc and C 1.
Accumulate charge in _st . As a result, the drain voltage V _D rises, and after a slight time lag, the drain voltage V _D becomes equal to the source voltage V _S (V _S0 + V _Sa ). At the time point t ₂ when the gate voltage falls, the TFT 1 is turned off, the electric charges charged in both capacitors C _lc and C _st are retained, and the drain voltage V _D drops by ΔV _gd . This is because the negative charge accumulated in the n-channel of the TFT 1 loses its place in the ON state and acts as a negative voltage (−V _g ).
It occurs because of the partial pressure between _gd and (C _lc + C _st ). Therefore, ΔV _gd is represented by the following equation: ΔV _gd = V _g · C _gd / (C _gd + C _lc + C _st ) ... (1)

In the equation (1), C _gd , C _st and V _g have constant values, but C _lc changes depending on the signal voltage applied to the liquid crystal cell 4. When the signal voltage is large (small), C
The capacity of _lc is also large (small). At time t ₃ when the scanning period of one field scanning the screen from the time t ₁ has elapsed, the source voltage V _S is falling (V _S0 -V _Sa). This is to prevent the flicker phenomenon that the screen flickers by applying an alternating voltage to the liquid crystal cell 4 and the burn-in phenomenon that the original image remains thin when the screen is switched after displaying the same still image for a while. Is.

Similarly, at time t ₃ , the gate voltage V _g rises, the TFT 1 is turned on, and both capacitances C _lc and C _st.
The electric charge accumulated in is discharged. As a result, the drain voltage V _D drops, and after a slight time lag, the drain voltage V _D becomes equal to the source voltage (V _S0 −V _Sa ). At the time point t ₄ when the gate voltage V _g falls, the TFT 1 is turned off, the electric charges remaining in the capacitors C _lc and C _st are held as they are, and the drain voltage V _D drops by ΔV _gd . This is for the same reason as the voltage drop at time t ₂ . The source voltage V _S becomes (V _S0 + V _Sa ) at time t ₅ when one field scanning period has elapsed from time t ₃ . This completes the scanning of one frame and continues at time t.
Operations similar to those at ₁ , t _2, ... Are repeated.

Although the TFT 1 and the liquid crystal cell 4 have been described above, other TFTs (not shown) connected to the gate 3 have been described.
The TFT and other liquid crystal cells perform the same operation all at once. Then, the next gate line (not shown) is sequentially scanned, each liquid crystal cell is driven, and an image is displayed.

The signal voltage for driving the liquid crystal cell 4 is composed of eight gradation voltages according to the gradation of the image to be displayed. FIG. 5 is a circuit diagram of a conventional circuit for generating a gradation voltage in a thin film transistor type active matrix liquid crystal display device. In the figure, reference numeral 12 is an output terminal of a positive voltage V ₀ of the rectangular wave generated by the rectangular wave generating circuit 11, and 13 is an output of a negative voltage bar V ₀ of the rectangular wave generated by the rectangular wave generating circuit 11. It is a terminal. The voltage value of V ₀ and bar V ₀ is 15
They are V and 2V, and alternate every one field period.
And between the terminals 12 and 13, R ₁ resistance 21, R ₂ resistance 22, R ₃
Resistance 23 ... R ₇ resistance 27, R ₈ resistance 28, R ₉ resistance 29, R ₁₀ resistance 30 ... R ₁₄ resistance 34, R ₁₅ resistance 35 and R ₁₆ resistance 36 are connected in series, and R ₁ resistance 21 and R ₂ The connection point with the resistor 22 is the voltage V
₁ is output, the connection point between the R ₂ resistor 22 and the R ₃ resistor 23 outputs the voltage V ₂ , the connection point between the R ₇ resistor 27 and the R ₈ resistor 28 outputs the voltage V ₇ , and the R ₈ The connection point between the resistor 28 and the R ₉ resistor 29 is the point A, the connection point between the R ₉ resistor 29 and the R ₁₀ resistor 30 outputs the voltage bar V ₇ , ... and the R ₁₄ resistor 34 and the R ₁₅ resistor 35. The connection point of outputs a voltage bar V ₂ and connects R ₁₅ resistor 35 and R ₁₆ resistor 36.
The connection point with and outputs the voltage bar V ₁ . The voltage at point A is
It is 8.5V, and the amplitude of the rectangular wave at point A is 0V _PP .

V _n (n: 0, 1 ... 7) is a positive voltage, and its value decreases at a rate determined by the resistance ratio as n increases, and 15V = V ₀ > V ₁ > V ₂ >...> a V _7> 8.5V. The bar V _n is a negative voltage and its value is n.
Becomes smaller at a ratio determined by the resistance ratio, and 8.5V> bar V ₇ >...> bar V ₂ > bar V ₁ > bar V ₀
= 2V. And a V _n and a bar V _n resistance ratio to cope is determined. The point A is located between V _n and V _n and is a neutral point of positive polarity and negative polarity.

FIG. 6 is a waveform diagram of a rectangular wave generated by the rectangular wave generating circuit 11 shown in FIG. In the figure, (a) is a vertical synchronizing signal for each field scan, and (b) is a positive polarity voltage V
₀ , and (c) is the negative voltage bar V ₀ . At time t ₁₁ when the vertical synchronizing signal rises, the voltage V ₀ falls from 15V to 2V and the voltage bar V ₀ rises from 2V to 15V. Next, at time t ₁₂ when the vertical synchronizing signal rises, the voltage V ₀ rises from 2V to 15V and the voltage bar V ₀ is
It drops from 15V to 2V.

Next, after the time point t ₁₃ when the vertical synchronizing signal rises, both gradation voltages V ₀ and bar V ₀ similarly repeat the fall and rise. Thus, the voltage V ₀ and the bar V ₀
Reverses its polarity every field scanning period.

The gradation voltages V ₀ , V ₁ , V ₂ ... V ₇ of 8 gradations generated by the circuit shown in FIG. 5 are selected from among 1 of the gradation voltages V ₀ , V ₁ , V ₂ ... It is selected and given to the source line 2 shown in FIG. 3, and becomes a signal voltage for driving the liquid crystal cell 4. The gradation voltage V ₀ in one frame period
The amplitude of (or V ₇ ) is large (or small).

[0014]

BRIEF problem is to provide a conventional thin film transistor active matrix liquid crystal display device, which is configured as described above, provides a source voltage V _S to the pixel electrode 4a, the source voltage V _S to the common electrode 4b When the average value V _S0 is given, a DC voltage due to the voltage drop ΔV _gd due to C _gd is applied to the liquid crystal cell, causing flicker or burn-in. To prevent this, the voltage applied to the common electrode 4b is (V
_S0- ΔV _gd ) or raise the source voltage in advance
(V _S + ΔV _gd ) is preferable. However, the signal voltage given to the source of TFT 1 is 8 kinds of gray scale voltage,
When the amplitude of the gradation voltage is large (or small), C _gd is large (or small) and ΔV _gd is small (or large).
Therefore, when the amplitude of the gradation voltage is large (or small), the correction amount for correcting the voltage applied to the common electrode 4b or the correction amount for raising the source voltage in advance may be reduced (or increased). However, since the capacitance of C _gd changes according to the amplitude of the gradation voltage, it is difficult to pre-correct the voltage of the common electrode 4b or the source voltage according to all the gradation voltages. .

In order to solve this problem, Japanese Patent Laid-Open No. Hei5-2039
In Japanese Patent No. 18, it is proposed to correct the signal center voltage of the applied voltage of the two electrode substrates by gradation, and in FIG. 2 of the embodiment, the signal center voltage and the signal amplitude are adjusted for each gradation. A grayscale power supply circuit that realizes a driving voltage for driving a liquid crystal cell is shown. However, the present proposal cannot be implemented in the case of dividing the resistance to generate the gradation voltage. The present invention has been made in view of the above circumstances, and by providing a circuit for adjusting the voltage of the neutral point A of the resistor group that generates the gradation voltage, flicker or burn-in may occur on the liquid crystal screen. It is an object of the present invention to provide a liquid crystal display device which does not have an active matrix.

[0016]

A liquid crystal display device according to a first aspect of the present invention drives a liquid crystal cell by a gradation voltage obtained by voltage division by a resistor connected between a first potential and a second potential to display an image. In the liquid crystal display device for displaying, the resistance value of the resistor is 1 /
It is characterized in that it is provided with a voltage adjusting circuit for adjusting the voltage of the middle point divided into two.

In the liquid crystal display device according to the second aspect of the present invention, the voltage adjustment circuit is configured to make the voltage at the midpoint higher than the average value of the first potential and the second potential. In the liquid crystal display device according to the third aspect of the invention, the adjustment of the voltage adjusting circuit is made from the outside.

[0018]

In the first aspect of the invention, since the voltage adjusting circuit adjusts the voltage at the midpoint that divides the resistance value of the resistor connected between the first potential and the second potential into 1/2, the gray scale voltage is By changing the voltage according to the voltage value, the voltage ΔV _gd according to the gradation voltage can be corrected. In the second invention, the voltage adjusting circuit is configured to make the voltage at the midpoint that divides the resistance value of the resistor connected between the first potential and the second potential into half higher than the average value of both potentials. Therefore, it is possible to correct the voltage ΔV _gd that decreases according to the gradation voltage by changing the gradation voltage to a high value according to the voltage value. In the third invention, the gradation voltage can be changed according to the liquid crystal cell by externally operating the voltage adjusting circuit.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be specifically described below with reference to the drawings showing the embodiments. FIG. 1 is a circuit diagram of a gradation voltage generating circuit according to the present invention. In the figure, 12 is a rectangular wave generation circuit
Reference numeral 11 is an output terminal of the positive voltage V ₀ of the rectangular wave generated, and 13 is an output terminal of the negative voltage bar V ₀ of the rectangular wave generated by the rectangular wave generating circuit 11. One cycle of the rectangular wave is one frame period of the image displayed on the liquid crystal screen, and half cycle is one field period. The voltage values of V ₀ and bar V ₀ are 15 V and 2 V, and they change every one field period.

Then, R ₁ resistor 21, R _{2 is} placed between both terminals 12, 13.
Resistance 22, R ₃ resistance 23 ... R ₇ resistance 27, R ₈ resistance 28, R ₉ resistance 29, R ₁₀ resistance 30 ... R ₁₄ resistance 34, R ₁₅ resistance 35 and R ₁₆ resistance 36 are connected in series, and R ₁ The connection point between the resistor 21 and the R ₂ resistor 22 outputs the voltage V ₁ , the connection point between the R ₂ resistor 22 and the R ₃ resistor 23 outputs the voltage V ₂ , ... R ₇ resistor 27 and R ₈ resistor 28
The connection point between and outputs voltage V ₇ and R ₈ resistance 28 and R ₉ resistance
The connection point with 29 is point A, the connection point with R ₉ resistor 29 and R ₁₀ resistor 30 outputs the voltage bar V ₇ , ... R ₁₄ resistor 34 and R ₁₅
The connection point with resistor 35 outputs voltage bar V ₂ and R ₁₅ resistor 35
And the connection point of R ₁₆ resistor 36 outputs a voltage bar V ₁ .

The variable resistor 15 is connected to the input end of the buffer circuit 14, one end of the variable resistor 15 is connected to the voltage V _CC , and the other end is grounded. The variable resistor 15 can change its resistance value from the outside of the liquid crystal display device,
When the voltage is changed from the outside, the output voltage of the buffer circuit 14 changes and is applied to the point A to change the voltage at the point A.
When the output voltage of the buffer circuit 14 cannot be applied, the point A
Has a voltage of 8.5 V, and the rectangular wave has an amplitude of 0 V _PP .

V _n (n: 0, 1 ... 7) is a positive voltage, and its value decreases at a ratio determined by the resistance ratio as n increases, and 15 V = V ₀ > V ₁ > V ₂ >...> a V _7> 8.5V. The bar V _n is a negative voltage and its value is n.
Becomes smaller at a ratio determined by the resistance ratio, and 8.5V> bar V ₇ >...> bar V ₂ > bar V ₁ > bar V ₀
= 2V. And a V _n and a bar V _n resistance ratio to cope is determined. Then V _n, bar V _n reverses its polarity every half cycle of the rectangular wave, the point A is a V _n, in the middle of the bar V _n,
It is the neutral point of positive polarity and negative polarity. V _n is used as the gradation voltage.

Next, the operation will be described. 2 is generated when the voltage at the output terminal 12 (or 13) of the rectangular wave generation circuit 11 in FIG. 1 is 15V (or 2V) and the output voltage 9V of the buffer circuit 14 is given to the point A. FIG. 6 is an explanatory diagram illustrating a gradation voltage according to an embodiment. In the figure, the vertical axis represents voltage. The horizontal axis represents the output point that outputs the voltage V _n (or bar V _n ), the left end is the output point of V ₀ (or bar V ₀ ), the voltage is 15 V (or 2 V), and the right end is At point A, the voltage at point A is 9V.

The voltage V _n is obtained by _dividing the voltage from the voltage of 15 V at the output terminal 12 to the voltage of 9 V at the point A by the resistance ratio of the resistors 21, 22, ... 28 of R ₁ , R ₂ ... R _8. Therefore, the voltage value changes linearly, and the vertical axis passing through the V ₀ output point is 15V.
_Is indicated by a straight line V _nL connecting the point indicating V and the point indicating 9V on the vertical axis passing through the point A. The voltage bar V _n is obtained by _dividing the voltage from the voltage 9 V at the point A to the voltage 2 V at the output terminal 13 by the resistance ratio of the resistors 29, 30 ... 36 of R ₉ , R ₁₀ ... R ₁₆ .
The voltage value changes linearly and is indicated by a straight line bar V _nL connecting the point indicating 9 V on the vertical axis passing through the point A and the point indicating 2 V on the vertical axis passing through the output point of the bar V ₀ .

Therefore, the value of the voltage V _m (m: one of natural numbers 1 to 7) is a (V), and a is 9 <a <15. The value of the voltage bar V _m is b (V), and b is 2 <b <9. The average value C _m of the voltage V _m in one frame period is given by C _m = (a + b) / 2.

Therefore, V ₀ (15) is applied to the common electrode 4b of the liquid crystal cell.
V _S0 (8.5V) which is the average value of V) and bar V ₀ (2V)
When 9 V is applied to the point A, a DC voltage of (9-C _m ) V is applied to the pixel electrode 4a of the liquid crystal cell 4. Then, the average value C _n of each voltage V _n in one frame period changes linearly, and the vertical axis passing through the output point of V ₀ (or bar V ₀ ) shows 8.5 V and the vertical axis passing through point A 9V
Is represented by a straight line V _cL that connects the point and C _m , and C _m is on the straight line V _cL , and 8.5 ≦ C _n <9.

The DC voltage (9-C _n ) V changes from 0 V to less than 0.5 V according to the gradation voltage V _n , and when the amplitude of the gradation voltage is large (or small), it is small (large). , ΔV _gd , which is a correction voltage that can be used as a correction amount for raising the source voltage in advance to correct ΔV _gd . Thus, the buffer circuit 14 and the variable resistor
Numeral 15 is caused by ΔV _gd by making the output voltage of the buffer circuit 14 higher than 8.5V which is the average value of the positive polarity voltage V ₀ (15V) of the rectangular wave and the negative polarity voltage bar V ₀ (2V). This is a circuit that prevents flicker or image sticking. The correction voltage can be adjusted according to the liquid crystal cell 4 by changing the resistance value of the variable resistor 15 from outside the liquid crystal display device.

[0028]

As described above, according to the first aspect of the invention, the voltage at the midpoint that divides the resistance value of the resistor connected between the first potential and the second potential in order to generate the grayscale voltage by half. Is configured to be adjusted by the voltage adjusting circuit, the gradation voltage can be changed according to the voltage value, so that the voltage ΔV _gd corresponding to the gradation voltage is corrected. Further, since the number of parts for the voltage adjusting circuit is small and the cost is low, it has an excellent effect of preventing flicker or image sticking on the liquid crystal screen at low cost.

According to the second aspect of the present invention, the resistance value of the resistor connected between the first potential and the second potential to generate the gradation voltage is 1
Since the voltage adjustment circuit is configured to adjust the voltage at the midpoint that divides into / 2 to a value higher than the average value of both potentials, the gradation voltage can be changed to a higher value than when there is no adjustment. The voltage V _gd that decreases according to the voltage is corrected. Further, since the number of parts for the voltage adjusting circuit is small and the cost is low, there is an excellent effect that the prevention of flicker or image sticking on the liquid crystal screen can be realized at a low cost.

According to the third aspect of the invention, since the adjustment of the voltage adjusting circuit is configured to be operated from the outside, the DC voltage due to ΔV _gd , which varies from liquid crystal panel to liquid crystal panel, can be easily corrected from the outside for each liquid crystal panel. It has an excellent effect.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a grayscale voltage generation circuit according to the present invention.

FIG. 2 is an explanatory diagram illustrating a gradation voltage generated by the circuit shown in FIG.

FIG. 3 is an equivalent circuit diagram of one pixel of an active matrix type liquid crystal display device.

FIG. 4 is a waveform diagram showing voltage waveforms at various parts of the TFT shown in FIG.

FIG. 5 is a circuit diagram of a conventional grayscale voltage generation circuit.

6 is a waveform diagram of a rectangular wave generated by the rectangular wave generation circuit shown in FIG.

[Explanation of symbols]

1 TFT, 2 source lines, 3 gate lines, 4 liquid crystal cells, 4a pixel electrodes, 4b common electrodes, 11 rectangular wave generation circuits, 14 buffer circuits, 15 variable resistors.

Claims (3)

[Claims] 1. A liquid crystal display device for driving a liquid crystal cell to display an image by a gradation voltage obtained by voltage division by a resistor connected between a first potential and a second potential, wherein the resistance value of the resistor is 1 A liquid crystal display device comprising a voltage adjusting circuit for adjusting a voltage at a midpoint that is divided into / 2. 2. The liquid crystal display device according to claim 1, wherein the voltage adjustment circuit is configured to set the voltage at the midpoint higher than the average value of the first potential and the second potential. 3. The liquid crystal display device according to claim 1, wherein the voltage adjusting circuit is adjusted from the outside.