JPH0865067A - Balanced amplifier circuit - Google Patents

Abstract

PURPOSE: To prevent an in-phase input noise component from appearing in an output although input impedance is high by performing a voltage amplification to a balanced signal such as an audio signal, etc., and obtaining the output of the balanced signal where only difference component is amplified. CONSTITUTION: An input signal ei is inputted to the noninverted input of a differential amplifier circuit 3 from an input terminal 1, the inverted inputs of differential amplifer circuits 3 and 4 to be inputted to the noninverted input of the differential amplifier circuit 4 from an input terminal 2 of one side are connected via a resistor R1 and a negative feedback thereof is performed from the outputs of the differential amplifier circuits 3 and 4 to each inverted input via resistors R2a and R2B. The output signals of the differential amplifier circuits 3 and 4 are defined as eo1' and eo2', respectively, and the output signals are outputted as outputs eo1 and eo2 to each of output terminals 5 and 6 via the resistors R3a and R3b. The both of the outputs eo1 and eo2 are connected to the inverted input of a differential amplifier circuit 7 from output terminals 5 and 6 via resistors R4a and R4b, and the noninverted input is grounded. The output of the circuit 7 is connected to a ground output terminal 8 and is further connected to the output terminals 5 and 6.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a balanced input balanced output amplifier circuit for voltage-amplifying a balanced signal such as a voice signal and outputting the balanced signal.

[0002]

2. Description of the Related Art A circuit for amplifying a balanced signal by voltage and outputting the balanced signal has been conventionally constructed as shown in FIG. In the circuit having this configuration, the output signal eo1 '' obtained by multiplying the input signal ei by R2 / R1 is output, and the input signal e is output to the inverted output.
An output signal eo2 ″ obtained by multiplying i by −R2 / R1 is output. There is also a circuit configuration as shown in FIG. The outputs eo1 ′ ″ and eo2 ′ ″ in this configuration are respectively eo1 ′ ″ = (R2 + R1) / R1 · ei + en ... (1) eo2 ″ ′ = − (R2 / R1) ei + en ... ( 2) Here, en is a noise input component.

[0003]

The circuit having the configuration shown in FIG. 2 is an ideal circuit system in which the in-phase component en does not appear in the output, but the input impedance cannot be increased.
Further, in the circuit having the configuration of FIG. 3, the input impedance can be increased, but the in-phase input noise component en appears in the output. It is an object of the present invention to provide a balanced input balanced output amplifier circuit which has a high input impedance but does not show an in-phase input noise component at the output.

[0004]

According to the present invention, an input signal is applied to the non-inverting inputs of the first and second differential amplifier circuits,
The outputs of the first and second differential amplifier circuits are respectively fed back to the inverting input via resistors, and both inverting inputs are connected via resistors, and the outputs of the first and second differential amplifier circuits are respectively connected in series. Is connected to the inverting input of the third differential amplifier circuit through a resistor connected to the non-inverting input of the third differential amplifier circuit, and the output of the third differential amplifier circuit is grounded via the resistor. It is a balanced amplification circuit that is connected to connection points connected in series, outputs an output signal from each connection point, and uses the output of the third differential amplification circuit as a ground terminal.

[0005]

The balanced signal output in which only the difference component of the balanced input signal is amplified is obtained, and the input impedance can be increased.

[0006]

An embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram showing an embodiment of the present invention. The present invention is to form a stable balanced input / balanced output circuit, and will be described below with reference to the circuit of the drawings.

An input signal ei is input from the input terminals 1 and 2. Seeing this from the ground potential, the signal e is applied to the input terminals 1 and 2.
It is assumed that i1 and ei2 are input. The non-inverting input of the differential amplifying circuit 3 is input from the input terminal 1 and the non-inverting input of the differential amplifying circuit 4 is input from one input terminal 2 of the differential amplifying circuits 3 and 4 through the resistor R1. And the negative feedback from the outputs of the differential amplifier circuits 3 and 4 to the respective inverting inputs via the resistors R2a and R2b.

The output signals of the differential amplifier circuits 3 and 4 are set as eo1 'and eo2', respectively, and output as outputs eo1 and eo2 to the output terminals 5 and 6 via resistors R3a and R3b, respectively. The output terminals 5 and 6 are connected together to the inverting input of the differential amplifier circuit 7 via resistors R4a and R4b, respectively, and the non-inverting input is grounded. The output of the differential amplifier circuit 7 is connected to the ground output terminal 8 and connected to the output terminals 5 and 6 via the resistors R5a and R5b.

The operation of the circuit shown in FIG. 1 of the present invention will be described below. First, eo1 'and eo2' are as follows, like the circuit of FIG. eo1 '= {(R2 + R1) / R1} .ei + en (3) eo2' =-(R2 / R1) ei + en (4) Then, if the naked gain of the differential amplifier circuit 1 is G, Output e
o1 and eo2 are eo1 = [(R4 // R5) / {R3 + (R4 // R5)}]. eo1 '+ [(R3 // R4) / {R5 + (R3 // R4)}]. E. .. (5) eo2 = [(R4 // R5) / {R3 + (R4 // R5)}]. Eo2 '+ [(R3 // R4) / {R5 + (R3 // R4)}]. E・ ・ (6)

The ground potential E is E = -G. [[(R4 // R5) / {R3 + (R4 // R5)}]. Eo1 '+ [(R3 // R4) / {R5 + (R3 // R4)}] ・ E + [(R4 // R5) / {R3 + (R4 // R5)}] ・ eo2 ′ + [(R3 // R4) / {R5 + (R3 // R4)}] ・ E] ... (7).

Eq. (7) is summarized as follows: E = -G. [{R5 + (R3 // R4)} / {R5 + (R3 // R4) + 2G. (R3 // R4)}]. [(R4 // R5) / {R3 + (R4 // R5)}] · (eo1 ′ + eo2 ′) (8)

Substituting equation (8) into equations (5) and (6) and rearranging: eo1 = [(R4 // R5) / {R3 + (R4 // R5)}] × [1-[(R3 // R4) / {R5 + (R4 // R3)}]] × G [{R5 + (R3 // R4)} / {R5 + (R3 // R4) + 2G ・ (R4 // R3)}] × (eo1 '-Eo2') + [(R4 // R5) / {R3 + (R4 // R5)}] × [1-[(R3 // R4) / {R5 + (R3 // R4)}]] × 2G [ {R5 + (R3 // R4)} / {R5 + (R4 // R5) ＋ 2G ・ (R4 // R3)}] eo2 ′ ・ ・ ・ (9)

Eo2 = − [(R3 // R4) / {R5 + (R3 // R4)}] ・ [(R4 // R5) / {R3 + (R4 // R5)}] × [2G {R5 + (R4 // R3)} / {R5 + (R3 // R4) + 2G ・ (R3 // R4)}] x (eo1'-eo2 ') + [(R4 // R5) / {R3 + (R4 // R5)} ] × [1- (R3 // R4) / {R5 + (R3 // R4)} × 2G {R5 + (R4 // R3)} / {R5 + (R3 // R4) + 2G ・ (R3 // R4)} ] Eo2 '... (10).

If the naked gain G of the differential amplifier circuit 7 is sufficiently large, eo1 = (1/2). (R4 // R5). (Eo1'-eo2 ') / {R3 + (R4 // R5 )} (11) eo2 = (-1/2). (R4 // R5). (Eo1'-eo2 ') / {R3 + (R4 // R5)} ... (12).

Substituting the expressions (3) and (4) into the expressions (11) and (12), eo1 = (1/2) [(R4 // R5) / {R3 + (R4 // R5)}]・ {(2R2 + R1) / R1} ei (13) eo2 = (-1/2) [(R4 // R5) / {R3 + (R4 // R5)}] ・ {(2R2 + R1) / R1} ei (14) is obtained. Therefore, from the circuit configuration shown in FIG. 1, the balanced input amplifier circuit has a high input impedance with an amplification degree determined by the ratio of the resistance values of R1 and R2. A balanced output circuit can be obtained.

[0016]

According to the embodiments of the present invention, it is possible to obtain a balanced output which has a high input impedance and amplifies only the difference component of the balanced input signal.

[Brief description of drawings]

FIG. 1 is a circuit configuration diagram showing an embodiment of the present invention.

2 and 3 are views for explaining a conventional example.

[Explanation of symbols]

 1, 2 Input terminal 3, 4, 7 Differential amplifier circuit 5, 6 Output terminal

Claims (1)

[Claims] 1. An input signal is applied to the non-inverting inputs of the first and second differential amplifier circuits, and the outputs of the first and second differential amplifier circuits are fed back to the inverting inputs via resistors, respectively, and both are input. The inverting input is connected via a resistor, and the outputs of the first and second differential amplifier circuits are both added to the inverting input of the third differential amplifier circuit via resistors connected in series,
The non-inverting input of the third differential amplifier circuit is grounded, and the output of the third differential amplifier circuit is connected to the connection points connected in series through resistors, and the output signal is output from each connection point. Is output and the output of the third differential amplifier circuit is used as a ground terminal.