JPH0863902A - Method and device for recording digital signal - Google Patents

Abstract

PURPOSE: To deal with a signal having an optional transmission rate by adding a first control signal for regulating a recording mode and a second control signal for regulating the number of data recorded in a track or a frame. CONSTITUTION: ID data 34 in a data recording area constitutes a piece of information by 8 bytes of 8 blocks. The data of 8 blocks are constituted of 7 kinds of data, ID-1 to 7. The data ID-1 provides for the recording format of the data recording area. The data ID-2 provides for a recording mode, that is, a maximum recording capacity. The data ID-3 provides for a time base compressing mode. The data ID-4 provides for the number of channels for simultaneously recorded data. The data ID-6 provides for a data quantity recorded in a track. Thus, by controlling the recording mode and the data quantity recorded in a track according to the transmission rate of the recorded data, efficient recording is carried out win simple recording/reproducing processing.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital signal recording method and apparatus for recording digital signals, and more particularly to a method and apparatus for recording digital compressed video signals.

[0002]

2. Description of the Related Art A method of recording a digital compressed video signal on a magnetic tape using a rotary head is disclosed in Japanese Patent Laid-Open No. 5-17.
4496.

[0003]

However, the transmission rate of the signal to be recorded is fixed, and no consideration is given to handling signals of a plurality of transmission rates.

It is an object of the present invention to provide a digital signal recording method and apparatus which can cope with signals of arbitrary transmission rates.

[0005]

The above object can be achieved by adding a first control signal for defining a recording mode and a second control signal for defining the number of data recorded in one track or one frame. .

[0006]

The recording / reproducing mode is determined by the first control signal, and the number of data in one track or one frame is adjusted to the transmission rate of the recording signal by the second control signal to cope with an arbitrary transmission rate. Is possible.

[0007]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a recording pattern of one track.
Reference numeral 3 is an additional information recording area such as an audio signal, 7 is a data recording area for recording a digital compressed video signal, 12 is a subcode recording area for recording subcodes such as time information and program information, and 2, 6 and 11 are respectively Of the recording areas, 4, 8 and 13 are postambles of the respective recording areas, 5 and 9 are gaps between the respective recording areas, and 1 and 14 are margins of track ends. In this way, by providing the postamble, the preamble, and the gap in each recording area, it is possible to perform postrecording in each area independently.

FIG. 2 shows a block configuration of each area. Figure 2
(A) shows the additional information recording area 3 and the data recording area 7,
Is a block configuration of. Reference numeral 20 is a synchronization signal, 21 is ID information, 22 is a video signal or additional information data, and 23 is a parity (C1 parity) for error detection and correction. The sync signal 20 is 2 bytes, the ID information 21 is 4 bytes, the data 22 is 112 bytes, the parity 23 is 10 bytes, and one block is 128 bytes. FIG. 2B is a block configuration of the subcode recording area 12. In the block of the subcode recording area, the sync signal 20 and the ID information 21 are the same as those in FIG. 2A, the data 22 is composed of 20 bytes, and the parity 23 is composed of 6 bytes. ), Which is 32 bytes, which is ¼ of the block. in this way,
The number of bytes in one block is also set to an integer ratio, and by making the structure of the synchronization signal 11 and the ID information 12 the same in all areas, the generation of blocks during recording and the synchronization signal and ID information during recording Processing such as detection can be processed by the same circuit.

FIG. 3 shows the structure of the ID information 21. 31
Is an area code, 32 is a track address, 33 is a block address within one track, 34 is ID data, and 35 is a parity for detecting an error in the area code 31, the track address 32, the block address 33 and the ID data 34. . The area code 31 is for identifying each area. For example, in the data recording area 7, "0"
0 "," 10 "in the additional information recording area 3, and" 11 "in the sub-code recording area 12. Also, two kinds of codes" 00 "and" 01 "are assigned to the data recording area 7 and variable speed reproduction is performed. It is also possible to identify different data, such as for-use data, etc. The track address 32 is an address for identifying the track, for example, the address is changed in units of one track or two tracks.
The 64 or 128 track can be identified by the address of the bit. The block address 33 is an address for identifying a block in each recording area. For example, 0 to 255 in the data recording area 7, 0 to 19 in the additional information recording area 3, and 0 to 15 in the subcode recording area 12.

The parity 23 is added to the area code 31, track address 32, and block address in the data 22 and ID information 21. As a result, it is possible to improve the detection capability of block addresses and the like during reproduction.

FIG. 4 shows a data structure of one track in the data recording area 7. The sync signal 20 and the ID information 21 are omitted. Data recording area 7 is 25
It is composed of 6 blocks, and the control information 41 such as the editing information of the video signal recorded in the first 2 blocks is recorded, and the compressed video signal 42 is recorded in the subsequent 234 blocks. In the subsequent 20 blocks, a parity (C2 parity) 43 for error correction is recorded. Parity 43
For example, divides 236 blocks of data into two blocks, an even block and an odd block, and stores 1 in each 118 bytes.
Add 0 bytes of parity.

FIG. 5 shows a data structure of one track in the additional information recording area 3. The sync signal 20 and the ID information 21 are omitted. The additional information recording area 3 is composed of 20 blocks, and the information 51 related to a video signal such as an audio signal is recorded in 15 blocks. Parity (C2 parity) 52 for error correction is recorded in the following 5 blocks. The parity 52 is, for example, 1
1 for every 30 bytes of 2 bytes for each of the 5 blocks
Add 0 bytes of parity. As a result, the data recording area 7 and the C2 parity can have the same configuration, and the processing can be shared.

FIG. 6 shows ID data 3 in the data recording area 7.
4 is the configuration. The ID data 34 is composed of 8 bytes of 8 blocks to form one piece of information. Then, this information is multiplex-recorded 32 times in 256 blocks to improve the detection capability during reproduction. The 8 blocks of data are made up of 7 types of data, ID-1 to ID7.

ID-1 defines the recording format of the data recording area 7. That is, it is possible to support a plurality of types of formats by changing the value of ID-1.

ID-2 defines the recording mode, that is, the maximum recording capacity. In this embodiment, when four-channel rotary head is used and two-channel recording is performed at a rotation speed of 1800 rpm, about 25 Mbps (25.15968)
Mbps) data can be recorded. FIG. 8 shows a recording pattern on the tape at this time. 81 is tape, 82
Is one track shown in FIG. 1A, 1B, 2A, 2
B represents four heads for recording, and recording is performed for two tracks (one frame) at 1/2 rotation (180 °) of the rotary head. Here, as shown in FIG.
Recording capacity is about 12.5 Mbp if recording is performed at a rate of 1 time.
s. Further, as shown in FIG. 9C, if recording is performed once every four times, the recording capacity becomes about 6.25 Mbps. In this case, the tape feed speed is 1/2 or 1 /
When set to 4, the track patterns on the tape are almost the same. Similarly, the maximum recording capacity is 1/25 of Mbps.
It can be n. At the time of recording, the transmission rate of the recording data is identified, the optimum recording mode is set and recording is performed. Then, the recording mode is recorded in ID-2. For example, at 25 Mbps, "1", 1
It is set to "2" at 2.5 Mbps and "3" at 6.25 Mbps.

ID-3 defines the time-base compression mode, that is, the time-base compression rate at the time of recording. This corresponds to a system in which a digital signal is compressed on the time axis and transmitted in a short time, and the digital signal is recorded and then expanded on the time axis for reproduction. For example, it is set to "1" when there is no time base compression, "2" when the time base compression ratio is 2 times, and "3" when the time base compression ratio is 4 times.

ID-4 defines the number of channels of data to be recorded simultaneously. For example, in recording mode 1,
Data of 12.5 Mbps can be recorded on two channels.

ID-5 defines whether the rate of data to be recorded is synchronized with the rotational speed of the rotary head. For example, it is set to "1" when synchronized, and "0" when not synchronized. When synchronized, the amount of data recorded on each track can be made constant, and when not synchronized, it must be changed depending on the track.

ID-6 defines the amount of data recorded on one track. For example, when recording 12 Mbps data, recording mode 2 may be selected and 25000 bytes may be recorded on one track. When the data rate is not synchronized with the rotation speed of the rotary head, the data amount may be controlled in frame units.

The ID-7 is information relating to other recorded data such as the type of data.

As described above, by controlling the recording mode and the amount of data to be recorded in one track according to the transmission rate of the data to be recorded, it is possible to perform efficient recording with a simple recording / reproducing process. At the time of reproduction, first, the ID data 34 may be detected to identify the recording mode and the like, and the reproduction processing circuit may be set to that mode for reproduction.

FIG. 7 shows the structure of the ID data 34 in the additional information recording area 3. ID data 34 is 4 blocks of 4
One piece of information is composed of bytes. Then, this information is multiplexed and recorded in 20 blocks five times to improve the detection capability during reproduction. 4 blocks of data are
It is composed of 6 types of data similar to FIG. 6 of ID-1 to ID-6.

In the additional information recording area 3, additional information of about 1.6 Mbps (1.6128 Mbps) can be recorded in the recording mode 1, for example, a quantization frequency of 48 kHz,
It is possible to record a PCM audio signal of 2 channels with a quantization bit number of 16 bits.

ID data 34 in the subcode recording area 12
Records a start flag indicating the beginning of the program, a flag for skip reproduction, and the like. In the sub-code recording area 12, unlike the data recording area 7 and the additional information recording area 3, the same data is recorded in all blocks in one frame. As a result, it is possible to improve the detection capability during high-speed search.

FIG. 10 shows the structure of the data 22 in the subcode recording area 12. In FIG. 10, 5-byte packs 91, 92, 93, and 94 are recorded as data.
The parity 23 is 4 bytes.

FIG. 11 shows the structure of the packs 91 to 94. Byte 0 is an item indicating the content of information recorded in the pack. By switching items, multiple types of information can be recorded. FIG. 12 is a configuration example of a pack when recording time information.

FIG. 13 shows an embodiment of a digital signal recording apparatus for recording by the recording method of the present invention. 10
0 is a rotary head, 101 is a capstan, and 102 is FIG.
A recording signal processing circuit that generates a recording signal, a recording signal detection circuit 103 that detects the transmission rate, type, etc. of the recording signal, and a control 104 that controls the recording mode or the like according to the result detected by the recording signal detection circuit 103. A control circuit such as a microprocessor, 105 is the rotary head 10
A timing generation circuit that generates a timing signal that serves as a reference for rotation of 0, 106 is a servo circuit that controls the feed speed of the rotary head and the tape, and 107 is an interface circuit.

The recording data input from the input terminal 108 is input to the recording signal processing circuit 101 and the recording signal detection circuit 102 via the interface circuit 107.
The recording signal detection circuit 102 detects the transmission rate, type, etc. from the rate of the information or signal added to the recording data and outputs it to the control circuit 104. The control circuit 104 determines the recording mode based on the detection result, and sets the operation modes of the recording signal processing circuit 102 and the servo circuit 106. In the synchronous mode, although omitted in the figure, the timing generation circuit 105 outputs a synchronous clock and inputs data at that timing. The recording signal processing circuit 102 separates additional information, generates error correction code, ID information, subcode, etc. according to the recording mode determined by the control circuit 104, generates the recording signal of FIG. Recording is performed on the tape 81 by the head 100.

FIG. 14 shows an embodiment of a digital signal reproducing apparatus for reproducing a signal recorded by the recording method of the present invention. Reference numeral 110 is a reproduction signal processing circuit for reproducing data and ID information from the reproduction signal, 111 is an output clock generation circuit for generating an output clock of reproduction data, and 112 is an interface circuit.

At the time of reproduction, the reproduction operation is first performed in an arbitrary reproduction mode, and the reproduction signal processing circuit 110 detects the ID information. Then, the control circuit 104 determines in which mode the recording was performed, and the operation modes of the reproduction signal processing circuit 110 and the servo circuit 106 are reset and reproduction is performed. The reproduction signal processing circuit 110 detects the synchronization signal, error detection and correction, etc. from the reproduction signal reproduced by the rotary head 100, reproduces the data, the additional information, and the subcode, and outputs them to the interface circuit 112. If the tape is recorded in the time-axis compression mode, the tape feed speed is set to 1 / the compression rate at the time of recording, and the reproduced signal is processed by the reproduction signal processing circuit 110 to set the track address 32 and the block address 33. As a reference, the data is rearranged in the same order as when it was recorded and then output. The output clock generation circuit 111 reproduces a clock synchronized with the data transmission rate at the time of recording by a PLL or the like with reference to the amount of data recorded on the track, and outputs it to the interface circuit 112. In the interface circuit 112, the output clock generation circuit 111
The reproduced data is output from the output terminal 113 with the clock generated in step 1 as a reference. The data may be output separately from the data and the additional information, or may be multiplexed and output.

[0032]

According to the present invention, the first control signal for defining the recording mode and the second control signal for defining the number of data recorded in one track or one frame are added to transmit the data to be recorded. By controlling the recording mode and the amount of data to be recorded on one track according to the rate, it is possible to efficiently record a signal of an arbitrary transmission rate by a simple recording / reproducing process.

[Brief description of drawings]

FIG. 1 is a recording pattern diagram of one track according to an embodiment of the present invention.

FIG. 2 is a block configuration diagram of each area.

FIG. 3 is a configuration diagram of ID information 21.

FIG. 4 is a configuration diagram of data of one track in a data recording area 7.

FIG. 5 is a configuration diagram of data of one track in an additional information recording area 3.

FIG. 6 is a configuration diagram of ID data 34 in a data recording area 7.

7 is a configuration diagram of ID data 34 in an additional information recording area 3. FIG.

FIG. 8 is a diagram showing a recording pattern on a tape.

FIG. 9 is a timing chart during recording.

FIG. 10 is a configuration diagram of data 22 in the subcode recording area 12.

FIG. 11 is a configuration diagram of packs 91 to 94.

FIG. 12 is a configuration diagram of a pack when time information is recorded.

FIG. 13 is a configuration diagram of a digital signal recording device for recording by the recording method of the present invention.

FIG. 14 is a configuration diagram of a digital signal reproducing apparatus for reproducing a signal recorded by the recording method of the present invention.

[Explanation of symbols]

3 ... additional information recording area, 7 ... data recording area, 12 ... subcode recording area, 20 ... synchronization signal, 21 ... ID information,
22 ... Data, 23 ... C1 parity, 15 ... ID data, 31 ... Area code, 32 ... Track address, 33
... block address, 34 ... ID data, 41 ... control information, 42 ... video signal, 43 ... C2 parity, 51 ... additional information, 52 ... C2 parity, 100 ... rotary head, 10
1 is a capstan, 102 ... Recording signal processing circuit, 103
Recording signal detection circuit, 104 control circuit, 105 timing generation circuit, 106 servo circuit, 107 interface circuit.

Claims (6)

[Claims] 1. A digital signal is divided into a predetermined number of bytes, and a sync signal, a control signal and an error detection / correction code are added to each of the digital signals divided into the predetermined number of bytes to form a block format, and a predetermined number of In the digital signal recording method of forming a digital signal recording area by the block and recording on a magnetic recording medium, the control signal is recorded in the recording area together with a first control signal indicating an operating state at the time of recording. A digital signal recording method comprising a second control signal indicating the number of bytes of the digital signal. 2. The digital signal recording method according to claim 1, wherein the first control signal is set according to a recording rate at the time of recording. 3. The digital signal recording method according to claim 1, wherein the control signal includes a third control signal indicating a time-base compression rate during recording. 4. The digital signal recording method according to claim 1, wherein the control signal includes a fourth control signal indicating the number of channels of the digital signal to be recorded. 5. A digital signal is divided into a predetermined number of bytes, and a sync signal, a control signal, and an error detection and correction code are added to each of the digital signals divided into the predetermined number of bytes to form a block format. In a digital signal recording device for forming a digital signal recording area by the block and recording on a magnetic recording medium, a control circuit for setting an operation state at the time of recording according to the type of the digital signal, and the control circuit are set. In this operating state, a first control signal indicating the operating state at the time of recording and a second control signal indicating the number of bytes of the digital signal recorded in the recording area are added to the digital signal for recording. A digital signal recording device characterized by comprising a recording circuit. 6. The operating state at the time of recording is a mode in which the recording rate is different, and the operating state is set so that the recording rate is higher than the transmission rate of the digital signal. Digital signal recorder.