JPH0863886A - Method and apparatus for recording of digital signal - Google Patents

Abstract

PURPOSE: To obtain a digital signal recording method and its apparatus which are compatible with an analog recording VTR by a method wherein four rotary heads are used and a digital compressed video signal and a digital audio signal are recorded at a prescribed recording rate or lower. CONSTITUTION: A data recording region 7 is constituted of 256 blocks, control information 41 such as editing information or the like is recorded in the first two blocks, compressed video signals 42 are recorded in the 234 blocks after that, and parities 43 which are used to correct errors are recorded in the 20 blocks after that. Then, when four rotary heads are used and two-channel recording is performed at the number of revolutions of the head of 1800rpm, data of about 25Mbps can be recorded, and the control information of about 215 kbps can be recorded. Additional information of about 1.6Mbps can be recorded, and a two-channel PCM audio signal can be recorded at a quantization frequency of 48kHz and the number of quantization bits of 16 bits in an additional- information recording region 3.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital signal recording method and apparatus for recording digital signals, and more particularly to a method and apparatus for recording digital compressed video signals.

[0002]

2. Description of the Related Art A home digital V for compressing and recording a digital video signal on a magnetic tape using a rotary head.
TR is Nikkei BP "Data compression and digital modulation" 1
It is described on pages 37 to 150. In this VTR,
Using a dedicated cassette and high-performance metal vapor deposition tape, 2
A digital compressed video signal of 4.948 Mbps and a digital audio signal of 2 channels (1.536 Mbps) are output at a head rotation speed of 9000 rpm and a recording rate of 41.8.
It is recorded at 5 Mbps.

[0003]

However, a VT for recording an analog video signal by using a conventional oxide tape.
R has a head rotation speed of 1800 rpm. Further, it is difficult to record a digital signal having a recording rate of 20 Mbps or more with the oxide tape, and the above-mentioned home digital V
The TR signal cannot be recorded as it is. Regarding the shape of the cassette, compatibility with the conventional analog recording VTR is not considered.

An object of the present invention is to provide a conventional analog recording VT.
An object of the present invention is to provide a digital signal recording method and apparatus compatible with R.

[0005]

The above object can be achieved by using four rotary heads and recording a digital compressed video signal of 25 Mbps and a digital audio signal of 1.6 Mbps at a recording rate of 20 Mbps or less.

[0006]

Since the digital compressed video signal of 25 Mbps and the digital audio signal of 1.6 Mbps can be recorded, the digital compressed video signal and the digital audio signal recorded in the home digital VTR can be recorded as they are.

[0007]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a recording pattern of one track.
Reference numeral 3 is an additional information recording area such as an audio signal, 7 is a data recording area for recording a digital compressed video signal, 12 is a subcode recording area for recording subcodes such as time information and program information, and 2, 6 and 11 are respectively Of the recording areas, 4, 8 and 13 are postambles of the respective recording areas, 5 and 9 are gaps between the respective recording areas, and 1 and 14 are margins of track ends. In this way, by providing the postamble, the preamble, and the gap in each recording area, it is possible to perform postrecording in each area independently.

FIG. 2 shows a block configuration of each area. Figure 2
(A) shows the additional information recording area 3 and the data recording area 7,
Is a block configuration of. Reference numeral 20 is a synchronization signal, 21 is ID information, 22 is a video signal or additional information data, and 23 is a parity (C1 parity) for error detection and correction. The sync signal 20 is 2 bytes, the ID information 21 is 4 bytes, the data 22 is 112 bytes, the parity 23 is 10 bytes, and one block is 128 bytes. FIG. 2B is a block configuration of the subcode recording area 12. In the block of the subcode recording area, the sync signal 20 and the ID information 21 are the same as those in FIG. 2A, the data 22 is composed of 20 bytes, and the parity 23 is composed of 6 bytes. ), Which is 32 bytes, which is ¼ of the block. in this way,
The number of bytes in one block is also set to an integer ratio, and by making the structure of the synchronization signal 11 and the ID information 12 the same in all areas, the generation of blocks during recording and the synchronization signal and ID information during recording Processing such as detection can be processed by the same circuit.

FIG. 3 shows the structure of the ID information 21. 31
Is an area code, 32 is a track address, 33 is a block address within one track, 34 is ID data, and 35 is a parity for detecting an error in the area code 31, the track address 32, the block address 33 and the ID data 34. . The area code 31 is for identifying each area. For example, in the data recording area 7, "0"
0 "," 10 "in the additional information recording area 3, and" 11 "in the sub-code recording area 12. Also, two kinds of codes" 00 "and" 01 "are assigned to the data recording area 7 and variable speed reproduction is performed. It is also possible to identify different data, such as for-use data, etc. The track address 32 is an address for identifying the track, for example, the address is changed in units of one track or two tracks.
The 64 or 128 track can be identified by the address of the bit. The block address 33 is an address for identifying a block in each recording area. For example, 0 to 255 in the data recording area 7, 0 to 19 in the additional information recording area 3, and 0 to 15 in the subcode recording area 12.

The parity 23 is added to the area code 31, track address 32, and block address in the data 22 and ID information 21. As a result, it is possible to improve the detection capability of block addresses and the like during reproduction.

FIG. 4 shows a data structure of one track in the data recording area 7. The sync signal 20 and the ID information 21 are omitted. Data recording area 7 is 25
It is composed of 6 blocks, and the control information 41 such as the editing information of the video signal recorded in the first 2 blocks is recorded, and the compressed video signal 42 is recorded in the subsequent 234 blocks. In the subsequent 20 blocks, a parity (C2 parity) 43 for error correction is recorded. Parity 43
For example, divides 236 blocks of data into two blocks, an even block and an odd block, and stores 1 in each 118 bytes.
Add 0 bytes of parity.

In this embodiment, when four-channel rotary head is used and two-channel recording is performed at a head rotational speed of 1800 rpm, about 25 Mbps (25.15968 Mbp).
The data of s) can be recorded. Also, about 215 kbp
Control information of s (215.04 kbps) can be recorded. FIG. 8 shows a recording pattern on the tape at this time.
Reference numeral 81 is a tape, and reference numeral 82 is one track shown in FIG. 1
A, 1B, 2A, and 2B represent four recording heads, and recording of two tracks is performed by ½ rotation (180 °) of the rotary head.

FIG. 5 shows a data structure of one track in the additional information recording area 3. The sync signal 20 and the ID information 21 are omitted. The additional information recording area 3 is composed of 20 blocks, and the information 51 related to a video signal such as an audio signal is recorded in 15 blocks. Parity (C2 parity) 52 for error correction is recorded in the following 5 blocks. The parity 52 is, for example, 1
1 for every 30 bytes of 2 bytes for each of the 5 blocks
Add 0 bytes of parity. As a result, the data recording area 7 and the C2 parity can have the same configuration, and the processing can be shared.

The additional information recording area 3 has about 1.6 Mbp.
Additional information of s (1.6128 Mbps) can be recorded, a quantization frequency of 48 kHz, a quantization bit number of 16 bits, and a 2-channel PCM audio signal (1.536 Mbps).
s) can be recorded.

FIG. 6 shows ID data 3 in the data recording area 7.
4 is the configuration. The ID data 34 is composed of 8 bytes of 8 blocks to form one piece of information. Then, this information is multiplex-recorded 32 times in 256 blocks to improve the detection capability during reproduction. The 8 blocks of data are made up of 7 types of data, ID-1 to ID7.

ID-1 defines the recording format of the data recording area 7. That is, it is possible to support a plurality of types of formats by changing the value of ID-1.

ID-2 defines the recording mode, that is, the maximum recording capacity. For example, if the recording is performed once every two times, the recording capacity becomes about 12.5 Mbps.
If the recording is performed once every four times, the recording capacity becomes about 6.25 Mbps. In this case, if the tape feed speed is set to 1/2 or 1/4, the track patterns on the tape become almost the same. At the time of recording, the transmission rate of the recording data is identified, the optimum recording mode is set and recording is performed. Then, the recording mode is recorded in ID-2. For example, at 25 Mbps, "1", 1
It is set to "2" at 2.5 Mbps and "3" at 6.25 Mbps.

ID-3 defines the time-base compression mode, that is, the time-base compression rate at the time of recording. This corresponds to a system in which a digital signal is compressed on the time axis and transmitted in a short time, and the digital signal is recorded and then expanded on the time axis for reproduction. For example, it is set to "1" when there is no time base compression, "2" when the time base compression ratio is 2 times, and "3" when the time base compression ratio is 4 times.

ID-4 defines the number of channels of data to be recorded simultaneously. For example, in recording mode 1,
Data of 12.5 Mbps can be recorded on two channels.

ID-5 defines whether or not the rate of data to be recorded is synchronized with the rotational speed of the rotary head. For example, it is set to "1" when synchronized, and "0" when not synchronized. When synchronized, the amount of data recorded on each track can be made constant, and when not synchronized, it must be changed depending on the track.

ID-6 defines the amount of data recorded on one track. For example, when recording 12 Mbps data, recording mode 2 may be selected and 25000 bytes may be recorded on one track. If the data rate is not synchronized with the rotation speed of the rotary head, the data amount may be controlled in units of two tracks.

The ID-7 is information relating to the type of data, for example, recorded data such as whether or not the signal is recorded in a home digital VTR.

As described above, by controlling the recording mode and the amount of data to be recorded on one track according to the transmission rate of the data to be recorded, it is possible to perform efficient recording with a simple recording / reproducing process. At the time of reproduction, first, the ID data 34 may be detected to identify the recording mode and the like, and the reproduction processing circuit may be set to that mode for reproduction.

FIG. 7 shows the structure of the ID data 34 in the additional information recording area 3. ID data 34 is 4 blocks of 4
One piece of information is composed of bytes. Then, this information is multiplexed and recorded in 20 blocks five times to improve the detection capability during reproduction. 4 blocks of data are
It is composed of 6 types of data similar to FIG. 6 of ID-1 to ID-6.

ID data 34 in the subcode recording area 12
Records a start flag indicating the beginning of the program, a flag for skip reproduction, and the like. In the sub-code recording area 12, unlike the data recording area 7 and the additional information recording area 3, the same data is recorded in all blocks in one frame. As a result, it is possible to improve the detection capability during high-speed search.

FIG. 9 shows the structure of the data 22 in the subcode recording area 12. In FIG. 9, 5-byte packs 91, 92, 93, and 94 are recorded as data. The parity 23 is 4 bytes.

FIG. 10 shows the structure of the packs 91 to 94. Byte 0 is an item indicating the content of information recorded in the pack. By switching items, multiple types of information can be recorded. FIG. 11 is a configuration example of a pack when recording time information.

Here, the preamble and postamble are 128 bits, the gap is 256 bits, and the margin is 640 bits. This is 1 block, 2 blocks, and 5 blocks when converted by the block of FIG. At this time, one track has 38400 bits (30
0 block), and at a head rotation speed of 1800 rpm, the recording rate is 18.432 Mbps, that is, 2
It will be 0 Mbps or less.

The head rotation speed is set to 1800 / 1.00
At 1 rpm, the head rotation speed can be made completely the same as that of the conventional analog recording VTR. Also in this case, it is possible to record a digital compressed video signal of 25.1345 Mbps and a digital audio signal of 1.6112 Mbps. The recording rate is 18.414 Mbps.

FIG. 12 shows an embodiment of a digital signal recording apparatus for recording by the recording method of the present invention. 10
Reference numeral 0 is a rotary head, 1A, 1B, 2A and 2B are digital signal recording heads, and 1C and 2C are conventional analog video signal recording heads. 101 is a capstan, 102 is a recording signal processing circuit that generates the recording signal of FIG. 1, 103 is a recording signal detection circuit that detects the transmission rate, type, etc. of the recording signal, and 104 is the result detected by the recording signal detection circuit 103. A control circuit such as a microprocessor for controlling the recording mode and the like according to the above, a timing generation circuit 105 for generating a timing signal serving as a reference for the rotation of the rotary head 100, and 106 for feeding the rotary head and tape. A servo circuit for controlling the speed, 107 is an interface circuit, 109 is an analog video signal recording circuit, and 111 is a data separation circuit.

The recording data input from the input terminal 108 is input to the data separation circuit 111 and the recording signal detection circuit 102 via the interface circuit 107. The recording signal detection circuit 102 detects the type and the like based on the information added to the recording data and outputs it to the control circuit 104. The control circuit 104 determines the recording mode based on the detection result, and sets the operation modes of the recording signal processing circuit 102, the data separation circuit 111, and the servo circuit 106.
In the synchronous mode, although omitted in the figure,
The synchronous clock is output from the timing generation circuit 105,
Input data at that timing. When the input data is a home digital VTR signal, the data separation circuit 111 separates the recording data into a video signal, an audio signal and other control signals and inputs them to the recording signal processing circuit 102. The recording signal processing circuit 102 generates the error correction code, ID information, subcode, etc. of each recording area according to the recording mode judged by the control circuit 104, generates the recording signal of FIG. The tape 8 is formed by the digital recording heads 1A, 1B, 2A and 2B on the head 100.
Record at 1.

When a conventional analog video signal is recorded, the analog video signal input from the input terminal 110 is subjected to predetermined processing by the analog recording circuit 109, and the analog recording heads 1C and 2C on the rotary head 100 are used. Record on tape 81. Although it is omitted in the figure whether the digital signal or the analog signal is recorded, if the identification signal is recorded in the area for recording the CTL signal for tracking or the like, at the time of reproduction. Can be determined.

FIG. 13 shows an embodiment of a digital signal reproducing apparatus for reproducing a signal recorded by the recording method of the present invention. Reference numeral 120 is a reproduction signal processing circuit for reproducing data and ID information from the reproduction signal, 121 is an output clock generation circuit for generating an output clock of reproduction data, 122 is a data processing circuit, 123 is an interface circuit, 125
Is an analog signal reproducing circuit.

At the time of reproduction, first, whether the signal is an analog signal record or a digital signal record is identified by the identification signal recorded in the CTL signal recording area or the like. In the case of digital signal recording, the reproduction operation is performed in an arbitrary reproduction mode, and the reproduction signal processing circuit 110 detects the ID information. Then, the control circuit 104 determines in which mode the recording was performed, and the operation modes of the reproduction signal processing circuit 110 and the servo circuit 106 are reset and reproduction is performed. In the reproduction signal processing circuit 110,
Digital recording heads 1A, 1 on the rotary head 100
B, 2A and 2B are used to detect the sync signal, error detection and correction, etc., from the reproduced signal to reproduce data, additional information,
The subcode is reproduced and output to the data processing circuit 122. The data processing circuit 122 restores the reproduced signal to the signal format at the time of recording and outputs it to the interface circuit 112. If the tape is recorded in the time axis compression mode, the tape feed speed is set to 1 / the compression rate at the time of recording,
The reproduced signal processing circuit 110 rearranges and outputs the reproduced signal in the same order as at the time of recording, using the track address 32 and the block address 33 as a reference. The output clock generation circuit 111 reproduces a clock synchronized with the data transmission rate at the time of recording by a PLL or the like with reference to the amount of data recorded on the track, and outputs it to the interface circuit 112. The interface circuit 112 outputs the reproduction data from the output terminal 124 based on the clock generated by the output clock generation circuit 111. The data may be output separately from the data and the additional information, or may be multiplexed and output.

At the time of reproducing the conventional analog signal, the reproduced signal reproduced by the analog recording heads 1C and 2C on the rotary head 100 is subjected to predetermined processing by the analog signal reproducing circuit 125 and output from the output terminal 126.

FIG. 14 shows an example of the connection between the digital signal recording device of FIG. 12 or the digital signal reproducing device of FIG. 13 and the conventional analog recording VTR and home digital VTR. (A) is a connection for recording the reproduction signal of the conventional analog recording VTR 201 or the reproduction signal of the home digital VTR 202 in the digital signal recording device 200, and (b) is the connection for reproducing the reproduction signal of the digital signal reproducing device 203 in the conventional analog recording mode. This is a connection for recording on the VTR 201 or the home digital VTR 202. In addition,
The digital signal recording device 200 and the digital signal reproducing device 202 may be a device for both recording and reproducing. Furthermore, the input terminal 108 and the output terminal 124 may be terminals for both input and output.

[0038]

According to the present invention, a digital compressed video signal of 25 Mbps and a digital audio signal of 1.6 Mbps can be recorded at a recording rate of 20 Mbps or less.
With the conventional analog recording VTR, it is possible to record the digital compressed video signal and the digital audio signal recorded in the home digital VTR as they are, and it is possible to realize an analog and digital VTR.

[Brief description of drawings]

FIG. 1 is a recording pattern diagram of one track according to an embodiment of the present invention.

FIG. 2 is a block configuration diagram of each area.

FIG. 3 is a configuration diagram of ID information 21.

FIG. 4 is a configuration diagram of data of one track in a data recording area 7.

FIG. 5 is a configuration diagram of data of one track in an additional information recording area 3.

FIG. 6 is a configuration diagram of ID data 34 in a data recording area 7.

7 is a configuration diagram of ID data 34 in an additional information recording area 3. FIG.

FIG. 8 is a diagram showing a recording pattern on a tape.

FIG. 9 is a configuration diagram of data 22 in the subcode recording area 12.

FIG. 10 is a configuration diagram of packs 91 to 94.

FIG. 11 is a configuration diagram of a pack for recording time information.

FIG. 12 is a configuration diagram of a digital signal recording device that performs recording by the recording method of the present invention.

FIG. 13 is a block diagram of a digital signal reproducing apparatus for reproducing a signal recorded by the recording method of the present invention.

14 is the digital signal recording device of FIG. 12 or FIG.
3 digital signal reproducing apparatus and conventional analog recording VT
Connection diagram with R and home digital VTR.

[Explanation of symbols]

3 ... additional information recording area, 7 ... data recording area, 12 ... subcode recording area, 20 ... synchronization signal, 21 ... ID information,
22 ... Data, 23 ... C1 parity, 15 ... ID data, 31 ... Area code, 32 ... Track address, 33
... block address, 34 ... ID data, 41 ... control information, 42 ... video signal, 43 ... C2 parity, 51 ... additional information, 52 ... C2 parity, 100 ... rotary head, 10
1 is a capstan, 102 ... Recording signal processing circuit, 103
... recording signal detection circuit, 104 ... control circuit, 105 ... timing generation circuit, 106 ... servo circuit, 107 ... interface circuit, 109 ... analog signal recording circuit, 11
1 ... Data separation circuit.

Claims (9)

[Claims] 1. A digital signal is divided into a predetermined number of symbols, and a sync signal, a control signal and an error detection and correction code are added to each of the digital signals divided into the predetermined number of symbols to form a block format, and a predetermined number of In a digital signal recording method in which a recording area of one track is formed by the block and a plurality of tracks are simultaneously recorded on a magnetic recording medium by a rotary head, in the recording area, a first digital signal of at least 25 Mbps and 1. 6 Mb
A digital signal recording method, wherein a second digital signal of ps can be recorded, and a recording rate per track at the time of recording is 20 Mbps or less. 2. The recording area is at least 25 Mbps
2. The digital signal according to claim 1, comprising a first recording area capable of recording the first digital signal of 1 and a second recording area capable of recording the second digital signal of at least 1.6 Mbps. Recording method. 3. The recording area is provided with a third area capable of recording control information related to the first digital signal or the second digital signal.
The described digital signal recording method. 4. The digital signal recording method according to claim 1, wherein a preamble, a postamble, and a gap between the areas are provided in the recording area. 5. The rotary head comprises at least four heads, the rotation speed is about 1800 rpm, and the two heads simultaneously record the recording areas of two tracks. 2. The digital signal recording method as described in any one. 6. A digital signal is divided into a predetermined number of symbols, and a sync signal, a control signal and an error detection and correction code are added to each of the digital signals divided into the predetermined number of symbols to form a block form, and a predetermined number of In a digital signal recording apparatus for forming a recording area of one track by the block and simultaneously recording a plurality of tracks on a magnetic recording medium by a rotary head, a first digital signal of at least 25 Mbps and a second digital signal of 1.6 Mbps. A digital signal recording device comprising a digital signal recording circuit for forming a recording area capable of recording a signal and having a recording rate per track of 20 Mbps or less and recording by the rotary head. 7. The rotary head comprises at least four heads, the rotational speed is about 1800 rpm, and the digital signal recording circuit simultaneously records the recording areas of two tracks. The digital signal recording device described. 8. A digital signal recording apparatus according to claim 6, further comprising an analog signal recording circuit for recording an analog signal by the rotary head. 9. The digital signal recording apparatus according to claim 8, wherein the rotary head comprises at least four digital signal recording heads and at least two analog signal recording heads.