JPH0846237A - Silicon light-emitting diode - Google Patents

Abstract

PURPOSE:To enable common use with an active element using a different silicon substrate, by arranging P-type semiconductor and N-type semiconductor on both sides of a thin silicon layer. CONSTITUTION:A silicon light-emitting diode comprises an oxide film 2 formed on a silicon substrate 1, a thin upper silicon layer 6 which is formed on the oxide film 2 and turns to a light emitting region, a thick upper silicon layer 7 which is continuous with the layer 6, and a conductive film 8 which is formed so as to be in contact with the slant surface of one side part of the thin upper silicon layer, via an insulating film 4 formed on both of the silicon layers. P-type and N-type layers are formed on opposite sides of a light-emitting region 6. The thickness of the silicon layer 6 is 3nm or less and 1nm or more.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION The present invention relates to light emitting devices by injecting electrons and holes into a thin silicon layer.

[0002]

2. Description of the Related Art Conventionally, silicon has been known as an indirect transition semiconductor, and a light emitting diode using such silicon as a substrate has extremely poor luminous efficiency. Therefore, a light emitting device using silicon does not use a silicon single crystal wafer that has been used as a substrate for manufacturing an LSI or the like as it is, but forms a porous film formed by anodizing in a solution of hydrofluoric acid. Only those using high quality silicon have been proposed. However, porous silicon is structurally unstable, and it is not possible to perform processes such as local addition of impurities to form a pn junction or attachment of electrodes to flow an electric current in a conventional semiconductor device manufacturing apparatus. There were difficulties. Further, due to structural instability, there is a problem that it changes over time when current injection is continued.

[0003]

SUMMARY OF THE INVENTION The present invention has been proposed to remedy the above-mentioned drawbacks, and its object is to provide a structure of a light emitting device of silicon which can be easily formed by a semiconductor device manufacturing process. It is in.

[0004]

To achieve the above object, the present invention provides (1) an oxide film formed on a silicon substrate, and a thin upper silicon layer formed on the oxide film to serve as a light emitting region,
A conductive layer disposed so as to come into contact with a slope on one side of the thin upper silicon layer via a thick upper silicon layer extending therethrough and an insulating film formed on both of the silicon layers. And a pn layer is formed on both sides of the light emitting region, and the thickness of the silicon layer forming the light emitting region is 3 or less to 1 nanometer or more. It is a feature. (2) An oxide film formed on a silicon substrate, and a thin upper silicon layer formed on the oxide film to serve as a light emitting region,
A thick upper silicon layer extended to this and an insulating film formed on both of the silicon layers are provided, a window is provided in the insulating film on the upper surface of the thin upper silicon layer, and a light emitting region is formed through the window. A silicon light emitting device, wherein a conductive film is provided so as to be in contact with the light emitting region, a pn layer is formed so as to sandwich the light emitting region, and a thickness of a silicon layer forming the light emitting region is 3 or less to 1 nanometer or more. A diode is a feature of the invention. (3) An oxide film formed on the silicon substrate, and a thin upper silicon layer formed on the oxide film to serve as a light emitting region,
A thick upper silicon layer extending on both sides and an insulating film formed on the silicon layer are provided, electrodes are formed on the upper surface of the thick upper silicon layer, and a light emitting region of the thin upper silicon layer is sandwiched therebetween. According to another aspect of the present invention, there is provided a silicon light emitting diode in which a pn layer is formed, and the thickness of the silicon layer forming the light emitting region is 3 or less to 1 nanometer or more.

[0005]

According to the present invention, by arranging p-type and n-type semiconductors on both sides of the thin silicon layer, it can be used together with an active element using another silicon substrate.

[0006]

EXAMPLES Next, examples of the present invention will be described. (Embodiment 1) FIG. 1 shows the spectral characteristics of photoluminescence from thin layer silicon, which is the principle of the present invention, and the thin silicon thickness dependence of its integrated intensity. In the figure, the relative intensities are compared using the thickness of the thin silicon layer (2D silicon layer) as a parameter. About 22Å (2.2 nanometers)
The highest photoluminescence intensity can be obtained. FIG.
(A) shows the case where the film thickness is 22 Å or less, and (b) shows the case where the film thickness is 22 Å or more. This is SIMOX
The upper silicon layer on the wafer was thinned to several tens of liters, and an argon ion laser beam (48 m
The wavelength is 80 Å) and the emitted light is condensed when the diameter is reduced to 100 μm. As is clear from the figure,
Emission of energy much larger than about 1.1 eV of the band gap energy of silicon has been observed. Moreover, its emission intensity is also considerably high. FIG. 1 (c) shows the dependence of the integrated intensity of photoluminescence on the thin silicon layer thickness of the upper layer (this result hardly changes the intensity of the peak of the spectrum). As can be seen from the figure, the film thickness of the upper silicon layer is about 2
The strongest light emission is observed at about 0Å, and the emission intensity drops sharply when the film thickness exceeds 30Å. Further, if the uniformity of the film thickness of the upper silicon layer is improved, the emission intensity at a thin film thickness of about 10Å increases. Therefore, efficient light emission can be obtained with a film thickness of 30 Å or less. It is considered that this light emission involves the quantization level of thin-layer silicon and the light emission level existing at the interface between silicon and the silicon oxide film. From this result, a light emitting device can be formed by forming the structure as shown in FIG. 2C in the process as shown in FIG. Hereinafter, this forming step will be described with reference to the sectional structural view of FIG. Moreover, in the above result, 48
Although we are looking at luminescence excited by light with a wavelength of 80 Å, it is conceivable that if the wavelength of the excitation light is shortened, the film thickness of the upper silicon layer where the emission intensity becomes the strongest shifts to the thinner one.

As shown in FIG. 2A, an SOI substrate, for example, a SIMOX substrate is used (a structure in which a buried oxide film 2 is formed on a silicon substrate 1 and an upper silicon layer 3 is formed on the buried oxide film 2). The layer 3 is processed using the layer 4 such as a silicon oxide film formed thereon as a processing mask to expose a part 5 of the thin upper silicon layer. In the figure, two thin film thickness regions, a thin silicon portion 6 and a thick silicon layer portion 7, are formed. This is because the thin silicon portion 6 is a light emitting region and the thick silicon region is a conductive portion that is connected to an electrode portion. It is for forming a region. Thin silicon layer 6
Has a high resistance, so it has such a structure for increasing efficiency, and is not essential. Therefore, the thick silicon layer portion 7 may be omitted. Further, as is clear from the data in FIG. 1, it is good to set the thickness of the thin silicon layer to about 22 Å in terms of light emission efficiency (this point is common to the following examples). Next, a conductive film 8 of polysilicon or the like is formed and further patterned to connect with the exposed portion 5 of the upper silicon layer and cover the thin silicon layer 6 as shown in FIG. 2B. To do. At this time, the polysilicon has n
An impurity that imparts p-type or p-type is added in advance. This can be added during the formation of the polysilicon film, or can be added by diffusion from the gas phase or ion implantation after the film formation. Further, using the patterned polysilicon film 8 as a mask, an ion implantation method is applied to a portion not covered with the polysilicon layer 8 (in the case of FIG. 2, a connection portion area with the electrode corresponding to the thick silicon layer portion 7). For example, impurities that give a p-type or an n-type are doped and activated. At this time, an impurity giving a type opposite to the type of polysilicon 8 is added (for example, polysilicon is n
In the case of a mold, an impurity that gives p-type is added). Further, if the ion implantation method is used here, impurities are also added to the polysilicon layer. Therefore, the amount of impurities to be added to the polysilicon layer in advance must be larger than the amount to be ion-implanted later. It goes without saying that there is. Next, an insulating film 9 is formed on the entire surface, a window is opened on the electrode lead-out portion of the upper silicon layer 3, that is, on the thick silicon layer portion 7 and the polysilicon portion 8 in this case, and electrodes 10 and 11 connected to them are formed. Are formed (FIG. 2C). With this structure, the thin silicon layer portion 6 in which impurities are not introduced by using polysilicon as a mask is an i layer (low concentration layer) pi
An n diode can be formed.

Next, the operating principle of this element will be described. For example, if the polysilicon 8 is an n-type and the thick upper silicon layer 7 is a p-type, when a positive voltage is applied to the thick silicon layer on the polysilicon side, electrons are generated between the polysilicon 8 and the thin upper silicon layer 6. Injected from the connection part 5 of
In addition, holes are injected from the region of the thick silicon layer 7 and recombine in the low concentration thin silicon layer 6. Since the photoluminescence measurement is performed in FIG. 1, electrons and holes are generated by light irradiation, but in the configuration of FIG.
This means that electrons and holes have been generated. Therefore, if the thickness of the silicon in the region where the electrons and holes are injected is the same as that of the example shown in FIG. 1 (about 30 Å or less), light emission similar to that of FIG. 1 is observed. . Since the side surface of the thin upper silicon layer 6 is used as the current injection surface in the embodiment of FIG. 2, there is also a method of increasing the applied voltage to increase the injection current in order to increase the intensity of light emission, but a pattern for lithography is devised. Then, a method of increasing the area of the side surface (junction area) to increase the amount of current may be used. Further, in this embodiment, impurities may be diffused from the polysilicon 8 to the thin silicon layer 6 by heat treatment or the like, and a portion of the thin silicon layer connected to the polysilicon may become a high-concentration impurity added region. , There is no particular problem. The high-concentration impurity regions are provided in the above-described embodiments and the following embodiments in consideration of the low resistance of the silicon layer to be connected, but this is not essential. It is sufficient for the structure of the diode to have a semiconductor layer for providing p-type and n-type on both sides with the thin silicon layer 6 interposed therebetween.

(Embodiment 2) FIG. 3 shows a second embodiment of the present invention. In the figure, 1 is monocrystalline silicon, 2 is a buried silicon oxide film, 3 is an upper monocrystalline silicon layer, 4 is a silicon oxide film, 5 is an exposed portion of a thin upper silicon layer, 6 is a region of a thin upper silicon layer, 7 Indicates a thick upper silicon layer region, 8 indicates a polysilicon layer, 9 indicates an interlayer insulating film, 10 indicates a connection wiring electrode, and 11 indicates a connection wiring electrode. In the above-described Example 1, the structure in which the polysilicon layer 8 is pasted on the thin silicon layer portion 6 is considered in consideration of ion implantation for impurity introduction for lowering the resistance of the connection layer with the electrode. . This is because there is a concern that when a large amount of impurity ions are implanted into the thin silicon layer, the thin film is polycrystallized and the resistance becomes high. However, as shown in FIG. Even if the structure is not formed on the layer silicon layer portion 6, the resistance can be lowered by devising the method of introducing the impurities. Further, a large amount of impurities can be added to the silicon layer when the substrate is formed. Alternatively, the impurities can be introduced by diffusion from the gas phase. The structure in this case will be described in comparison with the first embodiment. The polysilicon is n-type, the thick upper silicon layer and the thin silicon layer connected thereto are p-type with a high impurity concentration, and the thick silicon layer on the polysilicon side. When a positive voltage is applied to the polysilicon, electrons are injected from the connection portion 5 with the thin upper silicon layer, and holes are injected from the high impurity concentration thin silicon layer connected to the thick silicon layer. It recombines and emits light in the low concentration thin silicon layer below the layer. In this structure, since the polysilicon layer which is the electrode is not provided on the thin silicon layer which is the light emitting layer, the emitted light can be efficiently extracted to the outside. Needless to say, if a transparent silicon oxide film or nitride film is formed on the thin silicon layer and protected as a mask for ion implantation, impurities can be ion-implanted into the connection layer with the electrode.

(Embodiment 3) FIG. 4 shows a third embodiment of the present invention. In the figure, 1 is single crystal silicon, 2 is a buried silicon oxide film, 3 is an upper single crystal silicon layer, 4 is a silicon oxide film, 6 is a region of a thin upper silicon layer, 7 is a region of a thick upper silicon layer, and 8 is a region. A polysilicon layer, 9 is an interlayer insulating film, 10 is a connection wiring electrode, 11 is a connection wiring electrode, and 12 is a window opened in the upper silicon layer. In Embodiments 1 and 2 described above, the current injection portion from polysilicon to the thin silicon layer is provided on the side surface of the thin silicon layer. However, as shown in the sectional structure diagram of FIG.
It is also possible to use a method in which a thin silicon layer and a polysilicon layer 8 are brought into contact with each other through a window 12 opened at the upper part of.
In this structure, as compared with the above-described first and second embodiments, good (having a low connection resistance) connection between the thin silicon layer and the electrode can be facilitated.

(Fourth Embodiment) FIG. 5 shows a fourth embodiment of the present invention. In the figure, 1 is single crystal silicon, 2 is a buried silicon oxide film, 3 is an upper single crystal silicon layer, 4 is a silicon oxide film, 6 is a region of a thin upper silicon layer, 9 is an interlayer insulating film, and 13 is a thick upper silicon layer. Layer region, 14 is a region of thick upper silicon layer, 15 is a connection wiring electrode, 16
Indicates an electrode for connection wiring. The above Examples 1, 2, and 3 are p
Although one side of the in diode (polysilicon is used as the part that gives the p or n type and the thick silicon layer of the SOI substrate is used as the opposite side, the thick silicon layer of the SOI substrate can be used for both p and n). That is, as shown in FIG. 5A, two thick silicon layers 13 and 14 are formed.
Are connected only through the thin silicon layer 6, and the surroundings are also surrounded by thin silicon layers in the same manner (that is, thick silicon layers are formed in an island shape, and the islands are alternately p-type and n-type). When a voltage is applied between the p-type island and the n-type island, a current flows through the thin silicon layer surrounding the islands to emit light) or is completely insulated ( Although not shown in FIG. 5A, it can be formed by a structure in which the silicon layer is removed up to the top of the buried oxide film 2). Here, the thick region 13 of the silicon layer is selectively changed to, for example, a high impurity concentration p-type and 14 is changed to a high impurity concentration n-type by an impurity addition method using a surface protective layer or the like. At this time, the region of the thin silicon layer 6 may have a low impurity concentration in the entire region, or impurities may be introduced so that the low impurity concentration region is partially left. It goes without saying that such selective addition of impurities can be easily performed by the above-mentioned ion implantation technique using a silicon oxide film, polysilicon or the like as a mask. Next, the insulating film 9 is formed on the entire surface, and the electrodes 15, which are connected to the electrode lead-out portions of the upper silicon layers 13 and 14,
16 is formed (FIG. 5B). With such a configuration, a pin diode having the thin silicon layer portion 6 as an i layer (low concentration layer) can be formed.

Since the light emitting diode devices of the above-mentioned first to fourth embodiments can be formed on an SOI wafer having a silicon substrate as a base, devices such as MOS type transistors and bipolar transistors which are active devices using silicon as a substrate. Can be manufactured on the same wafer as the above (needless to say, the silicon of the substrate may be used in the element formation region, or the upper silicon layer of the SOI may be used). It goes without saying that part of the manufacturing process can be shared. Also, if the light receiving device is mounted on the same wafer,
It can be used for exchanging signals between elements via an optical signal, and a circuit element using both an optical signal and an electric signal can be formed.
Here, as the light receiving element, an element of germanium or a compound semiconductor can be used by heteroepitaxial growth or gluing, but using a silicon photodiode is advantageous as an integrated process for manufacturing a circuit element. . Further, in the above-mentioned embodiment, the SOI wafer based on the silicon substrate is described as an example. However, single crystal silicon formed on another insulator such as calcium fluoride or a semiconductor having a wide band gap is reduced to about 22 Å. It goes without saying that it may be used in a thin layer.

[0013]

As described above, according to the present invention, the light emitting diode has the diode structure in which the p-type and n-type semiconductors are connected to both sides of the thin silicon layer.
The present invention provides a light-emitting element that could not be conventionally made with silicon, and enables it to be used together with an active element using another silicon substrate. Further, the present invention has an effect that the structure of the light emitting diode is simple and the manufacturing is easy.

[Brief description of drawings]

FIG. 1 is a diagram showing a relationship between an emission spectrum by photoluminescence measurement and its relative intensity and film thickness. In the figure, the thickness of the thin silicon layer is used as a parameter. (A) shows the Si film thickness of 22 Å or less, (b) shows the film thickness of 22 Å or more, and (c) shows the film thickness dependence of the integrated intensity of the photoluminescence spectrum.

FIG. 2 is a first embodiment of the present invention, in which (a) to (c) show manufacturing steps.

FIG. 3 shows a second embodiment of the present invention.

FIG. 4 shows a third embodiment of the present invention.

FIG. 5 shows a fourth embodiment of the present invention, (a), (b)
Indicates a manufacturing process.

[Explanation of symbols]

 1 Single Crystal Silicon 2 Buried Silicon Oxide Film 3 Upper Single Crystal Silicon Layer 4 Silicon Oxide Film 5 Exposed Area of Thin Upper Silicon Layer 6 Thin Upper Silicon Layer Region 7 Thick Upper Silicon Layer Region 8 Polysilicon Layer 9 Interlayer Insulating Film 10 Electrode for connection wiring 11 Electrode for connection wiring 12 Window opened in upper silicon layer 13 Area of thick upper silicon layer 14 Area of thick upper silicon layer 15 Connection wiring electrode 16 Connection wiring electrode

Claims (3)

[Claims] 1. An oxide film formed on a silicon substrate,
The thin upper silicon layer, which is formed on the oxide film and serves as a light emitting region, the thick upper silicon layer extended to the thin silicon layer, and the insulating film formed on both of the silicon layers. A conductive film disposed so as to come into contact with the slope on one side of the light emitting region.
A silicon light emitting diode, wherein an n layer is formed and a thickness of a silicon layer forming the light emitting region is 3 or less to 1 nanometer or more. 2. An oxide film formed on a silicon substrate,
The thin upper silicon layer includes a thin upper silicon layer formed on the oxide film to be a light emitting region, a thick upper silicon layer extended to the light emitting region, and an insulating film formed on both the silicon layers. A window is provided in the insulating film on the upper surface, a conductive film is provided so as to be in contact with the light emitting region through the window, a pn layer is formed with the light emitting region interposed therebetween, and the thickness of the silicon layer forming the light emitting region. The silicon light emitting diode is characterized in that the length is 3 or less or 1 nanometer or more. 3. An oxide film formed on a silicon substrate,
A thin upper silicon layer formed on the oxide film to be a light emitting region, and thick upper silicon layers extending on both sides thereof,
An insulating film formed on the silicon layer, electrodes are formed on the upper surface of the thick upper silicon layer, pn layers are formed with the light emitting region of the thin upper silicon layer sandwiched therebetween, and the light emitting region is formed. The thickness of the silicon layer is 3
A silicon light-emitting diode having a thickness of the following to 1 nanometer or more.