JPH0846133A - Semiconductor device incorporating capacitor - Google Patents

Abstract

PURPOSE:To obtain a semiconductor device incorporating a capacitor in which short circuit between the electrodes of the capacitor is prevented while reducing the size and cost. CONSTITUTION:The semiconductor device incorporating a capacitor comprises a semiconductor chip 33, a capacitor 32 disposed on the rear side of the semiconductor chip 33, and a part 31a for mounting the capacitor 32 on the rear side thereof, wherein the mounting part 31a is set back from the end part of the capacitor 32 and made smaller than the capacitor 32.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device with a built-in capacitor, and more particularly to a semiconductor device with a built-in capacitor in which a capacitor is formed on the back side of a semiconductor chip and the back side is mounted on a mounting portion.

[0002]

2. Description of the Related Art Conventionally, when a semiconductor device is mounted on an electronic device, in order to prevent malfunction due to noise generated from a semiconductor chip or the like provided inside the semiconductor device, the power supply line and ground of the semiconductor device are grounded. A separate capacitor was inserted between the wires. Further, in order to prevent the power supply noise from adversely affecting the semiconductor device, a separate capacitor is inserted between the power supply line and the ground line of the semiconductor device.

The insertion of such a capacitor has conventionally been performed externally. However, the method of mounting a capacitor on the outside of the semiconductor device is because the noise reduction effect is not sufficient due to the inductance of the lead wire between the semiconductor device and the capacitor, and the capacitor must be mounted for each semiconductor device. In addition, there is a problem that the mounting density of the printed wiring board is reduced.

Therefore, in order to solve these problems, it has recently been considered to incorporate a capacitor into a semiconductor device.

An example will be described below.

FIG. 3 is a block diagram showing a semiconductor device with a built-in capacitor disclosed in Japanese Patent Publication No. 5-81188 (hereinafter referred to as "Publication 1"), in which (a) is a sectional view. Yes, (b) is a plan view.

In the semiconductor device with a built-in capacitor, a first dielectric layer 2 made of a substance having a high dielectric constant is formed on an upper surface of a semiconductor chip mounting portion 1a of a lead frame 1 which is usually made of metal. A first conductor layer 3 is formed on the upper surface of the dielectric layer 2, and a part of the conductor layer 3 is exposed on the upper surface of the first conductor layer 3 to form a second dielectric layer 4 Is formed, and a second conductor layer 5 is formed on the upper surface of the second dielectric layer 4 separately from the first conductor layer 3.

Further, a semiconductor chip 7 is mounted and fixed on the second conductor layer 5 by a conductive adhesive 6 such as a metal brazing material.

A plurality of electrodes including a first power supply electrode 8a and a second power supply electrode 8b are formed on the upper surface of the semiconductor chip 7, and the first power supply electrode 8a is a first conductor layer. The exposed portion of 3 and the second power supply electrode 8b are electrically connected to the semiconductor chip mounting portion 1a by bonding wires 9, respectively.

In the semiconductor device with a built-in capacitor having the above structure, the first dielectric layer 2 is used as a dielectric between the first and second power supply electrodes 8a and 8b, and the semiconductor chip mounting portion 1a is formed.
A capacitor having both electrodes of the first conductor layer 3 and the first conductor layer 3 is inserted, and the second dielectric layer 4 is used as a dielectric between the ground line and the power supply electrode 8a. A capacitor having both electrodes of the first conductor layer 3 is inserted.

Therefore, it is possible to prevent malfunction caused by noise generated from the semiconductor chip 7 and the like, and prevent adverse effects of power supply noise on the semiconductor device.

Also, in FIGS.
A cross-sectional view of the semiconductor device disclosed in Japanese Patent Publication No. 2 (hereinafter referred to as "Publication 2") is shown. FIG. 4 shows a first embodiment of the known document 2, and FIG. 5 shows a second embodiment.

The semiconductor device is a semiconductor device having a built-in capacitor, and the semiconductor device of the first embodiment is, as shown in FIG. 4, formed on the back surface of a semiconductor chip 11 having a semiconductor element formed on a silicon substrate by a sputtering method or A titanium and gold film is deposited by a vacuum evaporation method to form an upper electrode 12 of the thin film capacitor, and a SrTiO ₂ film is deposited on the surface of the upper electrode 12 by a reactive sputtering method to form a dielectric film 13. Further, the lower electrode 14 of the thin film capacitor is formed by using the same method as that for forming the upper electrode 12.

Next, the semiconductor chip 11 on which the thin film capacitor is formed is mounted on the ceramic PGA package 15. The element mounting portion 15a of the PGA package 15 is connected to an external lead 16 that supplies a power supply potential via an internal wiring. After the semiconductor chip 11 is fixed to the element mounting portion 15a via the metal brazing material, the electrodes on the semiconductor chip 11 and the internal wiring 18 of the PGA package 15 are electrically connected by the metal thin wires 17. The substrate potential of the semiconductor chip 11 is the GND potential via the metal wire 17 and the internal wiring 1
8 is connected. Next, the PGA package 15 is hermetically sealed by the cap 19 to form a semiconductor device.

According to this structure, a bypass capacitor (thin film capacitor) is formed between the GND and the power supply (between the back surface of the semiconductor chip 11 and the element mounting portion 15a of the PGA package 15), and the internal wiring 18 of the PGA package 15 and the outside are formed. The power supply noise induced by the inductance of the lead 16 can be reduced.

Further, in the semiconductor device of the second embodiment, as shown in FIG. 5, the upper electrode 12 of the thin film capacitor formed on the back surface of the semiconductor chip 11 is placed inside the end portion of the semiconductor chip 11 by about 0.5 mm. After retreating and forming small,
The dielectric film 13 is formed so as to cover the entire surface of the upper electrode 12, and the lower electrode 14 is further formed on the surface of the dielectric film 13. The semiconductor chip 11 has the same structure as that of the first embodiment except that the silicon oxide film 20 (which may be formed in the same manner as when forming the dielectric film 13) is formed on the side surface of the semiconductor chip 11 by heat treatment. The semiconductor chip 11 and the element mounting portion 1
Metal brazing material 2 when mounting with brazing material 21 on 5a
1 upper electrode 12 and lower electrode 14 of the thin film capacitor
It has an advantage that a short circuit between them can be prevented.

[0017]

In the semiconductor device with a built-in capacitor disclosed in the above-mentioned prior art document 1, when the semiconductor chip 7 is fixed, the conductive adhesive 6 crosses over the second dielectric layer 4 and Of the first conductor layer 3 exposed from the dielectric layer 4 of the semiconductor chip 7 and the semiconductor chip mounting portion 1a beyond the first dielectric layer 2 and contacting the power source electrode 8 of the semiconductor chip 7.
The second dielectric layer 4 needs to be sufficiently larger than the semiconductor chip 7 and the second conductor layer 5 because short circuit may occur between a or 8b and the bottom surface of the semiconductor chip substrate or both electrodes of the capacitor. The first conductor layer 3 needs to be larger than the second conductor layer 5, and the first dielectric layer 2 needs to be sufficiently larger than the first conductor layer 3. For this reason, the semiconductor chip mounting portion 1a becomes considerably larger than the chip size, and the capacitor-embedded semiconductor device becomes large and cannot be downsized.

The above-described semiconductor device with a built-in capacitor has been described for the case where there are two power supply electrodes.
In the two cases, the first conductor layer 3 and the second dielectric layer 4 are omitted. Here, the semiconductor chip mounting portion 1a
However, it is the same as the chip size, which is considerably larger than that of the chip size. However, in order to improve the mounting density, it is necessary to downsize the semiconductor device with a built-in capacitor.

Further, in the semiconductor device of the first embodiment of the known document 2, since the upper electrode 12 of the thin film capacitor is provided up to the end of the semiconductor chip 11, the element mounting portion 15a is provided with a metal brazing material. When fixed, the metal brazing material rises up along the ends of the lower electrode 14 and the dielectric film 13 and contacts the upper electrode 12 to short-circuit between both electrodes of the capacitor, that is, the upper electrode 12 and the lower electrode 14. There is.

Further, in the semiconductor device of the first embodiment of the known document 2, the upper electrode 12 is retracted inward from the end of the semiconductor chip 11 by about 0.5 mm to be small and covers the entire surface of the upper electrode 12. As described above, since the dielectric film 13 is provided and the side surface of the semiconductor chip is covered with the silicon oxide film 12 (insulating film), the upper electrode 12 is formed as described above.
And the lower electrode 13 are not short-circuited, but covering the side surface of the semiconductor chip with the insulating film 12 requires the insulating film 12 to be formed after cutting the chip (after cutting (dicing) from the wafer). It is necessary to process it at high cost. The present invention has been made in view of the above problems, and an object of the present invention is to provide a capacitor-embedded semiconductor device which can prevent a short circuit between both electrodes of a capacitor, and can be made compact and inexpensive.

[0021]

A capacitor-embedded semiconductor device according to the present invention comprises a semiconductor chip, a capacitor provided on the back side of the semiconductor chip, and a mounting portion on which the back side of the capacitor is mounted. The mounting portion is characterized in that the end portion of the mounting portion is retracted inward from the end portion of the capacitor and is smaller than the capacitor. The capacitor is provided with a smaller end than the semiconductor chip by retracting the end portion of the capacitor inward from the end portion of the semiconductor chip, and the back surface side outer peripheral end portion and the side surface outer peripheral portion are covered with an insulator. It is characterized by that.

The end portions of the mounting portion are each set back from the end portion of the semiconductor chip by 50 μm or more.

[0023]

According to the semiconductor device with a built-in capacitor described in claim 1 of the present invention, the mounting portion is configured to be smaller than the capacitor by retracting the end portion of the mounting portion to the inside of the end portion of the capacitor. When the semiconductor chip is mounted on the mounting portion via the conductive adhesive, the conductive adhesive does not rise along the side surface of the capacitor, which may cause a short circuit between both electrodes of the capacitor. Can be prevented.

According to another aspect of the semiconductor device with a built-in capacitor, the capacitor is provided with a smaller end than the semiconductor chip by retracting the end of the capacitor inward of the end of the semiconductor chip. Since the outer periphery of the back surface and the outer periphery of the side surface are covered with an insulator, the flow of the adhesive is stopped at the end of the insulator on the back surface of the capacitor.

Further, according to the semiconductor device with a built-in capacitor described in claim 3, since the end portion of the mounting portion is set back from the end portion of the semiconductor chip by 50 μm or more, the positional deviation when mounting the semiconductor chip is caused. Can be tolerated.

[0026]

FIG. 1 is a constitutional view showing an embodiment of the present invention, in which (a) is a perspective view from an obliquely right side and (b) is a perspective view from a front side. 2 is an enlarged view of a main part of FIG. 1, in which (a) is a sectional view and (b) is a plan view.

As shown in FIGS. 1 and 2, in the semiconductor device with a built-in capacitor according to the present embodiment, the semiconductor chip 33 having the dielectric film 32 on the back side is electrically conductive on the mounting portion 31a of the lead frame 31. Mounted via adhesive 34,
The power supply electrode 33a and the ground electrode 33b on the surface side of the semiconductor chip 33 are connected to the lead frame 31 by wires 35, respectively, and these are sealed with a mold resin 36.

Mounting portion 31a of the lead frame 31
Is provided so as to recede inward from the end of the dielectric film 32 on the back surface side of the semiconductor chip 33, and the dielectric film 32 is distributed substantially evenly outward from the end of the mounting portion 31a. It is mounted while protruding.

Specifically, titanium (Ti) is formed on the back surface side of the semiconductor chip 33 having a semiconductor element formed on a silicon substrate.
/ An electrode 37 of gold (Pt) or the like is formed, and a dielectric film (capacitor) 32 is further formed on the back surface side thereof.

Usually, since the built-in capacitor is 10 nF or more and the chip size is several mm ² , a capacitor of about 1 μF / cm ² is required. When the film thickness is about 100 nm, ε = C × d / ε ₀ = 1 μF / cm ² × 100 nm / ε ₀
= 113, and a film having a dielectric constant of 113 or more is required.

Therefore, the dielectric film 32 is formed of BS having a high dielectric constant.
It is desirable to form a high dielectric material such as T (Ba _X Sr _1-x TiO ₃ ). As a method of forming the dielectric film 32, a sputtering method, a MOCVD method, a coating method and the like are known.

In the figure, reference numeral 38 denotes an electrode formed on the back surface side of the dielectric film 32, and the electrode 38 is not always necessary.

Here, as shown in FIG. 6, the dielectric film 32
Is formed on the entire back surface side of the semiconductor chip 33, that is, on the entire surface of the wafer (state before chip division), a crack may occur when the dielectric film 32 is cut in a dicing process of dividing the chip. If the cracks are present, the dielectric film 32 may leak and the capacitor may not function properly.

Therefore, in this embodiment, as shown in FIGS. 1 and 2, the dielectric film 32 is formed inside the chip edge so that the dielectric film 32 is not cut in the dicing process for dividing the chip. . Specifically, since the cutting position shift in the dicing process for dividing the chips formed on the entire surface of the wafer is about 30 μm, if the capacitors are formed inside the chip edge by about 30 μm,
No cracks occur in the capacitor. However, the smaller the capacity, the smaller the capacity. Therefore, it is desirable that the capacity be as large as possible. As the forming method, a dielectric film is formed on the entire surface of the wafer and then formed by photoetching.

Next, Pt is formed on the lower side (back side) of the dielectric film 32.
And the like electrode 38 is formed.

After that, a protective insulating film 39 for covering the outer peripheral end of the electrode 38 and the outer peripheral side surface of the dielectric film 32 is formed if necessary. As a result, the flow of the conductive adhesive 34 is stopped at the end of the protective insulator 39 on the rear surface side of the dielectric film 32, and the conductive adhesive 34 short-circuits between the electrodes 37 and 38 of the capacitor. Can be prevented. Further, it is possible to prevent the occurrence of leakage between electrodes due to adhesion of ionic impurities on the side surface of the dielectric layer 32.

Thus, the capacitor 32 is provided on the back surface of the chip.
The semiconductor chip 33 on which the
A capacitor built-in type semiconductor device is completed by fixing and assembling with a conductive adhesive 34 such as Ag paste.

However, the semiconductor chip 33 is mounted on the mounting portion 31a 'of the ordinary flat lead frame 31' as shown in FIG.
When the chip is mounted and fixed by the conductive adhesive 34, the conductive adhesive 34 wraps around the side surface of the chip and the capacitor electrode 3
A short circuit may occur between 7 and 38.

Therefore, in this embodiment, as shown in FIGS. 1 and 2, the chip mounting portion 31a of the lead frame 31 is made smaller than the chip, and the lead in the lead-out direction is bent downward at the edge of the chip mounting portion. The structure is such that there is no lead frame on the periphery of the chip on which the conductive adhesive 34 is placed. Here, in order to prevent the conductive adhesive 34 from wrapping around the side surface of the chip even if the mounting portion 31a is misaligned when the chip is mounted, the mounting portion 31a is made smaller than the chip shape by 100 μm or more on each side (mounting). Part 3
The end of 1a is 5 more than the end of the capacitor 32.
This can be dealt with by providing a small size so as to recede inward by 0 μm or more). However, if it is made too small, the stability at the time of mounting the chip deteriorates, so it is desirable not to make it too small.

Thus, when the semiconductor chip 33 is mounted and fixed to the mounting portion 31a of the lead frame 31 with the conductive adhesive 34, it is possible to prevent the disadvantage that the excessive conductive adhesive 34 wraps around the side surface of the chip. Therefore,
A short circuit between the capacitor electrodes 37 and 38 will not occur.

Then, the power supply electrode 33 of the semiconductor chip 33
a and the ground electrode 33b by connecting the wire to the lead frame 31 with the wire 35, respectively.
This is where the capacitor is inserted between the power supply line of the semiconductor device and the ground line (the back surface of the chip).

As described above, the capacitor built-in type semiconductor device of this embodiment can be downsized as shown in FIG. 2B as compared with the prior art reference 1 shown in FIG. 3B. .

As described above, according to the above-described embodiment, the mounting portion 31a of the lead frame 31 has its end portion retracted inward from the end portion of the dielectric film (capacitor) 32, and thus the dielectric film. Since the size is smaller than 32, when the semiconductor chip 33 is mounted on the mounting portion 31a via the conductive adhesive 34, the adhesive 34 rises along the side surface of the dielectric film 32. There is no inconvenience, so that both electrodes 37, 38 of the dielectric film 32 are
It is possible to prevent a short circuit between them. This contributes to the yield and lowers the price. Further, the mounting portion 31a '(see FIG. 6) of the lead frame 31' which is conventionally larger than the dielectric film 32 is provided so that the mounting portion 31a of the lead frame 31 is smaller than the dielectric film 32. Since the size of the semiconductor chip 33 is subtracted from the size of the conventional mounting portion 31a ', the mold package can be made smaller, and the size can be reduced.

Further, the dielectric film 32 is provided so as to be smaller than the semiconductor chip 33 by retracting its end portion inward from the end portion of the semiconductor chip 33, and the outer peripheral end portion on the back surface side of the dielectric film 32 and Since the outer peripheral portion of the side surface is covered with the protective insulating material 39, the adhesive flow is stopped at the end portion of the protective insulating material 39 on the rear surface side of the dielectric film 32. Further, it is possible to prevent the occurrence of leakage between electrodes due to adhesion of ionic impurities on the side surface of the dielectric layer 32.

Further, by retreating the end portions of the mounting portion 31a from the end portions of the dielectric film 32 by 100 μm or more, it is possible to allow the positional displacement when mounting the semiconductor chip. Therefore, it is possible to prevent a short circuit between the two electrodes 37 and 38 due to a positional shift when the chip is mounted.

[0046]

According to the above structure, in the semiconductor device with a built-in capacitor according to the first aspect of the present invention, the end portion of the mounting portion of the lead frame is retracted inward from the end portion of the capacitor, and the semiconductor device is more than the capacitor. Since it is configured to be small, the adhesive does not rise along the side surface of the capacitor when the semiconductor chip is mounted on the mounting portion via the conductive adhesive, and thus between the electrodes of the capacitor. Prevent short circuit. With this configuration, downsizing and cost reduction have become possible.

According to a second aspect of the present invention, there is provided a semiconductor device with a built-in capacitor, wherein the end portion of the capacitor is retracted inward from the end portion of the semiconductor chip so as to be smaller than the semiconductor chip. Also, since the outer periphery of the side surface is covered with an insulator, the flow of the adhesive is stopped at the end of the insulator on the back surface side of the capacitor.

Further, in the semiconductor device with a built-in capacitor according to a third aspect of the present invention, the end portion of the mounting portion is set back from the end portion of the capacitor by 50 μm or more.
The electrodes 37 and 38 will not be short-circuited even when the chip is mounted.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing an embodiment of the present invention, (a)
Is a perspective view from the right diagonal side, and (b) is a perspective view from the front side.

FIG. 2 is an enlarged view of a main part of FIG. 1, in which (a) is a sectional view and (b) is a plan view.

3A and 3B are configuration diagrams showing a conventional example, in which FIG. 3A is a sectional view and FIG. 3B is a plan view.

FIG. 4 is a cross-sectional view showing another conventional example.

FIG. 5 is a cross-sectional view showing another conventional example.

FIG. 6 is a cross-sectional view showing another conventional example.

[Explanation of symbols]

 31 lead frame 31a mounting portion 32 dielectric film 33 semiconductor chip 34 conductive adhesive 36 mold resin 37, 38 electrode 39 protective insulating film

Claims (3)

[Claims] 1. A semiconductor chip, a capacitor provided on a back surface side of the semiconductor chip, and a mounting portion on which the back surface side of the capacitor is mounted, the mounting portion having an end portion thereof being an end of the capacitor. A semiconductor device with a built-in capacitor, wherein the semiconductor device has a smaller size than the capacitor and is retracted inward from the portion. 2. The capacitor is provided so that its end portion is retracted inward from the end portion of the semiconductor chip and is smaller than the semiconductor chip, and the back surface side outer peripheral end portion and the side surface outer peripheral portion are made of an insulator. The semiconductor device with a built-in capacitor according to claim 1, wherein the semiconductor device has a built-in capacitor. 3. The capacitor-embedded semiconductor device according to claim 1, wherein the end of the mounting portion is set back from the end of the semiconductor chip by 50 μm or more.