JPH0837478A - Automatic equalizer - Google Patents

Abstract

PURPOSE:To set the equalizing characteristic in a short time with high accuracy by obtaining not a signal error rate but an equalized error so as to set a parameter so as to reduce the required data amount than the data amount to obtain the signal error rate. CONSTITUTION:A discrimination circuit 6 receives difference data 15 outputted sequentially from a difference extract circuit 5 to calculate an equalizing error and a tap coefficient revision signal is outputted to a tap coefficient revision circuit 7 based o the equalizing error. The circuit 7 outputs a tap coefficient 16 based on the revision signal. The discrimination circuit 6 has M-sets of difference data storage sections to calculate an equalizing error from the total sum of the M-sets of difference data and to store the data thereby obtaining a new tap coefficient revision signal and it is outputted to the circuit 7. The equalizing error is calculated from the total sum of the M-sets of the difference data obtained by using the tap coefficient 16 from the new tap coefficient revision signal and stored and it is compared with the equalizing error stored precedingly. Then the new tap coefficient revision signal is obtained in a decreasing way of the equalizing error and it is outputted to the circuit 7 repetitively.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an equalizer used in a device for recording / reproducing a digital signal or a communication device, and more particularly to an automatic equalizer capable of automatically setting optimum parameters.

[0002]

2. Description of the Related Art Generally, a waveform equalizer is used to reduce errors in digital data generated during reproduction of digital signals and communication. For example, digital VT
In a reproducing system of a recording / reproducing apparatus such as R, a waveform equalizer composed of a transversal filter or the like is used to compensate for deterioration of a high frequency band and waveform distortion in recording / reproducing so that digital data is correctly detected. There is.

In the above waveform equalizer, in order to make it suitable for the transmission system of the equipment used, its parameters are adjusted in advance at the time of product shipment and fixed. It is customary.

However, in a recording / reproducing apparatus, for example, the frequency characteristic of the reproducing system fluctuates due to various factors such as changes with time in characteristics of the magnetic head and the magnetic tape, the optical pickup and the optical disk, environmental changes and the like. If there is such a variation, the waveform equalizer is not suitable for the transmission system and the error increases. Therefore, as a waveform equalizer, an automatic equalizer having a function capable of always maintaining an optimum state in response to fluctuations in the frequency characteristic of the reproduction system has been desired.

As a conventional automatic equalizer, there is known one which automatically changes the characteristic parameter of the waveform equalizer using the signal error rate as an evaluation function (Japanese Patent Laid-Open No. 2397/1990).
31 publication (H04B3 / 06)).

[0006]

However, in the above-mentioned conventional automatic equalizer, although the equalizer can be set in the optimum state, the error rate of the signal is used as the evaluation function, so that the characteristic parameter is determined. However, there is a drawback in that the amount of data in is required to be considerably large, and thus it takes a long time to converge to an optimum state.

In view of the above circumstances, it is an object of the present invention to provide an automatic equalizer capable of shortening the time until it converges to an optimum state.

[0008]

The automatic equalizer of the present invention comprises:
A parameter changeable equalizer, a means for identifying data from the output signal of the equalizer, an expected value set for each identified data, and a signal level based on the output signal of the equalizer. Of the difference data, means for generating an equalization error from the difference data, and means for setting the parameters of the equalizer so that the error becomes small based on the equalization error. It is characterized by being.

Further, in the above configuration, a means for generating an expected value for each identification data from a signal level based on the output signal of the equalizer may be provided.

Further, in the above configuration, one expected value arithmetic circuit is provided, and another expected value is also generated based on the output of this expected value arithmetic circuit, and the output of the one expected value arithmetic circuit or the generation The expected value for each piece of identification data may be generated by selecting one of the other expected values or a fixed value given in advance according to the identification data.

In any one of the above configurations, the minimum change amount of the tap coefficient of the equalizer and the data amount required to obtain the equalization error are the convergence probabilities with respect to the change of the minimum change amount of the tap coefficient. May be determined based on the relationship obtained regarding the data amount.

Further, in the above-mentioned configuration, the one having a smaller data amount out of the data amount in the saturated state of the relation determined by the signal noise ratio of the reproducing system is adopted as the data amount of the reproducing system and A value greater than or equal to the minimum tap coefficient change amount when the convergence probability is 90% or more may be adopted as the minimum tap coefficient change amount of the reproduction system.

[0013]

According to the first structure, the data is discriminated from the signal waveform-equalized by the equalizer (for example, 0, 1 or-).
1, 0, 1), an expected value is set for each of the identified data, the difference between the expected value and the signal level based on the output signal of the equalizer is obtained, and the equalization is performed from the difference data. The error is required. Then, the parameters are set so that this equalization error becomes small. In this way, the parameter is set by obtaining the above-mentioned equalization error rather than the signal error rate, and the data amount required to obtain the above-mentioned equalization error is the data amount when obtaining the signal error rate. Since the number is relatively small, it is possible to set the equalization characteristic with high accuracy in a short time.

Further, according to the second configuration, since the expected value for each identification data is generated from the signal level based on the output signal of the equalizer, when the signal level fluctuates (double speed reproduction in the recording / reproducing apparatus). If you do), it is also possible.

Further, according to the third structure, since only one expected value calculation circuit is required, the circuit structure can be simplified.

Further, according to the fourth configuration, it is possible to avoid a situation in which the necessary convergence probability cannot be obtained.

By the way, the smaller the minimum change amount of the tap coefficient of the equalizer, the finer the control of the equalization characteristic becomes possible. However, since the change of the equalization error when the tap coefficient is changed is small, the difference in the reproduction data is different. There may be a case where the tap coefficient cannot be quickly brought to a place (convergence point) where the equalization error is minimized due to the influence of equalization error variation due to noise or noise. Further, the larger the number of data required to obtain the equalization error, the smaller the variation of the equalization error can be. However, no matter how much the number of data is increased, it is necessary to obtain the necessary convergence probability. A state where the minimum change amount of the tap coefficient does not become small, that is, a saturation state occurs.

According to the fifth configuration, while obtaining the necessary convergence probability, the number of data is reduced as much as possible to accelerate the convergence speed, and the minimum change amount of the tap coefficient can be minimized to perform fine control. .

[0019]

【Example】

(Embodiment 1) The present invention will be described below with reference to the drawings showing the embodiment.

In this embodiment, an automatic equalizer for a digital VTR is shown. Further, in this digital VTR, data detection is performed by using partial response class IV.

FIG. 1 is a diagram for explaining the partial response class IV. FIG. 1A shows signal conversion elements, and FIG. 1B shows signal waveforms converted by each element. ing. Below, Partial Response Class I
V will be briefly described with reference to FIG. The input signal (A) is modulated into a signal (B) by digital modulation (I-NRZI method) and recorded by a head tape system. The signal (C) reproduced from this signal becomes a signal (D) whose waveform is equalized by passing through a transversal filter, and further delayed by one analog bit to become a signal (E), which is output by a comparator (F). To get
That is, in the example of the figure, the input signal (A) which becomes “..., 1, 0, 1, ...” Finally, becomes “...,
, 1, 0, 1, ... ”, which means that the reproduction is performed.

FIG. 2 shows the automatic equalizer of this embodiment. The reproduction signal (10) is amplified by the reproduction amplifier 1 into a reproduction signal (12) and then divided into two systems, one of which is input to the equalization circuit 2 and the other of which is input to the clock reproduction circuit 3. It A clock synchronized with the reproduced signal is generated from the clock reproduction circuit 3 and input to the data detection circuit 4 and the difference extraction circuit 5.

The equalization circuit 2 includes an amplified reproduction signal (1
2) is waveform-equalized, and the waveform-equalized signal (13) is output to the data detection circuit 4.

FIG. 3 is a block diagram showing the equalization circuit 2. The equalization circuit 2 is delayed by the delay elements 20, 21, 22, 23 provided on the signal input line of the reproduction signal (12) and the reproduction signal (12) and the delay elements 20, 22, 23 described above. Gain adjusting circuits 25, 26, 2 for inputting an output and outputting a value obtained by multiplying the output by each set tap coefficient.
7, 28, and an adder 24 for adding and outputting the outputs of the gain adjusting circuits 25 to 28 and the delay element 21.

Of the above gain adjusting circuits, the gain adjusting circuit 2
Although the tap coefficients of 5 and 28 are fixed, the tap coefficients of the gain adjusting circuits 26 and 27 are changed by the tap coefficient changing signal from the tap coefficient changing circuit 7.

The data detection circuit 4 outputs the analog 1-bit delay output (17) and the identification data (14) to the difference extraction circuit 5 and the reproduction output data (11).

FIG. 4 is a block diagram showing the data detection circuit 4. The data detection circuit 4 includes an analog 1-bit delay circuit 41, a detection level creation circuit 42, a comparator 43, and a data detection unit 44.

The analog 1-bit delay circuit 41 performs the operation of generating the signal (E) in the partial response class IV described above, and generates the analog 1-bit delay output (17).

The detection level creating circuit 42 sends to the comparator 43 the detection levels (61) and (62) which become the reference of which value of the analog 1-bit delay output (17) is -1, 0 or 1. Output.

The comparator 43 inputs the analog 1-bit delay output (17) and the detection levels (61) and (62), and the identification data (14) which is either -1, 0 or 1.
Is output to the difference extraction circuit 5. The identification data (14) is
If the output (17) is higher than the detection level (61), it is set to "1", if it is between the detection levels (61) and (62), it is set to "0", and if it is lower than the detection level (62), it is set to "1". -1 ".

The data detector 44 identifies the identification data (14).
Input "1" for "-1", "0" for "0", and "1" for "1".
Output as 1).

The differential extraction circuit 5 inputs the analog 1-bit delay output (17) and the identification data (14) to generate expected values (63), (64), (65), and the differential data (15). ) Is output to the determination circuit 6.

FIG. 5 is a block diagram showing the difference extraction circuit 5. The difference extraction circuit 5 includes an A / D converter 30, expected value calculation circuits 31, 32, 33, a switch 34, and a difference calculation circuit 35.

The A / D converter 30 outputs the digitized value of the analog 1-bit delay output (17) to the expected value calculation circuits 31, 32, 33 and the difference calculation circuit 35.

The expected value calculation circuits 31, 32 and 33 have the expected value (6
3), (64), and (65) are calculated respectively. For example, the expected value calculation circuit 31 holds N (1> N) analog 1-bit delay outputs (17) when it is determined that the data is “−1”, and stores the average value (or 2) of the levels.
The average value) is set as the expected value (63). Similarly, the expected value calculation circuits 32 and 33 respectively average the N levels of the analog 1-bit delay output (17) determined to be data “0” and “1” as expected values (64) and (65), respectively. And

This specific operation will be described with respect to the expected value calculation circuit 33. This arithmetic circuit 33 has N digital data storage units, and takes in the digitized delay output (17) when the identification data (14) is "1" and stores it in the oldest data storage unit. Write and output a value obtained by dividing the total value of the new N values including this value by N as the expected value (65). That is, the identification data (14)
Each time is set to "1", the data is updated to calculate N moving averages. The same applies to the other expected value calculation circuits 31 and 32.

The switch 34 switches the outputs of the expected value calculation circuits 31, 32 and 33 according to the data of the identification data (14) and outputs them to the difference calculation circuit 35. For example, if the identification data (14) is “1”, the expected value calculation circuit 33
Is selected, and the expected value (65) as the output is input to the difference calculation circuit 35. If other data "0" or "-1" is input as the identification data, switching is performed according to the input.

The difference value calculation circuit 35 digitizes the analog 1-bit delay output (17) and the expected value (6
3), (64), and (65), the difference between the expected value selected by the switch 34 and the difference data (1
5) is output.

The decision circuit 6 receives the difference data (15) sequentially output from the difference extraction circuit 5, calculates an equalization error based on the difference data (15), and further outputs a tap coefficient change signal from the equalization error. Output to the tap coefficient changing circuit 7. The tap coefficient changing circuit 7 outputs the tap coefficients (16a) and (16b) based on the change signal.

Specifically, the decision circuit 6 has M difference data storage units, calculates an equalization error from the sum of M difference data, and stores the equalization error. A new tap coefficient change signal is obtained, and this is used as the tap coefficient change circuit 7
Output to. Then, the equalization error is calculated again from the total sum of the M difference data obtained thereafter by the tap coefficients (16a) and (16b) by the new tap coefficient change signal, and this is stored, and this and the previous time are stored. By repeating the comparison with the equalization error, a new tap coefficient change signal is obtained again in the direction in which the equalization error becomes smaller, and this is repeatedly output to the tap coefficient change circuit 7.

Next, a series of operations for changing the tap coefficient will be described in detail with reference to FIG. FIG. 6 shows an analog 1-bit delay output (17), a detection level (61),
6 is a graph showing the relationship between (62) and expected values (63), (64), (65). A ₁ , a ₂ , ..., A in the figure
Reference numeral ₁₅ indicates the detection position of the analog 1-bit delay output (17) output from the data detection circuit 4 based on the clock from the clock reproduction circuit 3.

At the signal position a ₁ , since the signal level is lower than the detection level (62), data "-1" is detected. Here, the expected value for this data “−1” is the expected value (63), and its difference data is Δa in the figure.
Becomes ₁ . Since the signal level at the next signal position a ₂ is higher than the detection level (61), it is detected as data “1”, and the expected value for this data “1” is the expected value (65). Is Δa ₂ . At the signal position a ₃ , the signal level is the detection level (6
Since it is between 1) and (62), it is detected as data “0”, the expected value for this data “0” is the expected value (64), and the difference data thereof is Δa ₃ . Below, the difference data is similarly obtained.

The difference data string (Δa ₁ , Δa ₂ , ..., Δa _m ) is obtained by performing the difference data calculation process M times.
Is obtained, and this is cumulatively added to obtain the equalization error S ₀ . Next, the tap coefficient (16a) of the gain adjusting circuit 26 is set to C _{−1 and} is maintained as it is (the tap coefficient changing signal is not changed), and the tap coefficient (16b) of the gain adjusting circuit 27 is set to C _1.
As a result, the tap coefficient change signal is generated so that C ₁ + ΔC ₁ . Then, the above process is repeated M times to obtain a new equalization error S ₁ . Where S ₀ > S ₁
When it becomes, the tap coefficient C ₁ + of the gain adjusting circuit 27
The [Delta] C ₁ is further [Delta] C ₁ is changed to the same direction C ₁ + 2ΔC
_The tap coefficient change signal is generated so that it becomes ₁ . vice versa,
When S ₀ <S ₁ , the tap coefficient change signal is generated so that the tap coefficient of the gain adjusting circuit 27 becomes C ₁ −ΔC ₁ . When S ₀ = S ₁ , the tap coefficient of the gain adjusting circuit 27 may be changed to either one.

Change the tap coefficient of the gain adjusting circuit 27 by P
After repeating (P is 1 or more) times, the tap coefficient C ₋₁ of the gain adjusting circuit 26 is similarly changed P times. Then, by repeating this one-time tap coefficient changing operation several times, it becomes possible to set the equalization characteristic with high accuracy.

As described above, since the parameter is set by obtaining the above equalization error instead of the signal error rate, the signal error rate is obtained as the amount of data required to obtain the above equalization error. The amount of data is smaller than that in the case, and it is possible to set the equalization characteristic with high accuracy in a short time. For example, even when M is 10 ³ as described above, the amount of data for determining the characteristic parameter is considerably smaller than that in the conventional case where the error rate of the signal is used as the evaluation function, and the time required to converge to the optimum state is large. It gets shorter. Further, since the expected value for each identification data is generated from the signal level of the analog 1-bit delay output (17), when the signal level fluctuates (double speed (2 times, 3 times, 1/2 times etc. in the recording / reproducing apparatus) ) When playing back).

(Embodiment 2) Another embodiment of the present invention will be described below.

The automatic equalizer of the present embodiment is the same as the first embodiment in that it generates an equalization error from the difference data, but the first embodiment is different from the difference data string (Δa ₁ , Δa ₂ , ..., Δa). _m ) is cumulatively added to obtain the equalization error S (S = ΣΔa _i ), whereas in the present embodiment, as shown in FIG. 8, the difference Δa _i is normalized by the expected value L _i of the detection point. Thus, the equalization error S'is obtained. That is, the equalization error S ′ is S ′ = ΣΔ
It is calculated by a _i / L _i .

For this reason, in this embodiment, as shown in FIGS. 7 and 9, the difference value calculation circuit 35 'passes through the digitized value of the analog 1-bit delay output (17) and the switch 34'. The difference Δa _i with respect to the expected value for each supplied data is calculated by the difference calculator 35b ′, and further has a divider 35a ′. The divider 35a ′ calculates the difference Δa _i as data “1”. Is divided by the expected value L _i , and the divided value is output as difference data (15 ′).

Then, the decision circuit 6 inputs the above difference data (15 ') and cumulatively adds it by a cumulative adder to calculate the equalization error S', and similarly to the first embodiment, the tap coefficient. The change signal is output to the tap coefficient change circuit 7.

As a result, a better equalization characteristic can be stably obtained. That is, in the configuration of the first embodiment, the expected value for each identification data is generated from the signal level based on the output signal of the equalizer so that the double speed reproduction can be supported. In some cases, it may not be possible to converge to an optimal state. In this respect, according to the configuration of the present embodiment, the difference is normalized by the expected value L _i (reference level) to obtain the equalization error S ′. Therefore, even during double speed reproduction (with amplitude fluctuation), during normal reproduction (amplitude). Good characteristics can be stably obtained in the same manner as (fixed).

Further, in this embodiment, the circuit configuration is simplified by providing only one expected value calculation circuit 32 for generating the expected value (65) for the data "1". Since the expected value (64) is almost "0", it can be fixed at 0 level, and the expected values (63) and (65) can be fixed.
The absolute value of is the same and the relationship of positive and negative is reversed. It is sufficient to input one and set the other to the opposite level. Therefore, the switch 34 'is provided with the 0 level output function and the reverse level output function, and these three expected values are switched and output by the switching operation by the signal (14). We are trying to simplify it.

In the above embodiments, the ternary value detection of the partial response class IV is performed. However, not only the ternary value detection, but also the binary value detection such as integral detection and other partial response (binary value detection). , 5 value detection), an automatic equalizer can be similarly constructed. Further, although the gain adjustment circuit having the variable tap coefficient is set to two systems, three or more systems may be used, and the method of setting the tap coefficient after obtaining the equalization error is not limited to the above method. , Other methods may be used. In addition, the equalization error S (S = ΣΔa _i ) and the equalization error S ′ (S ′) between the normal reproduction and the double-speed reproduction.
= ΣΔa _i / L _i ) may be switched and output.

(Embodiment 3) Another embodiment of the present invention will be described below. The present embodiment relates to the minimum change amount of the tap coefficient of the gain adjusting circuits 26 and 27 capable of changing the tap coefficient in the equalization circuit 2.

The smaller the minimum change amount of the tap coefficient, the finer the control of the equalization characteristic becomes. However, since the change in the equalization error when the tap coefficient is changed is small, the equalization error due to the difference in reproduced data or noise is generated. There may be a case where the tap coefficient cannot be brought to the place (convergence point) where the equalization error is minimized due to the influence of the variation of.
Further, the larger the number of data required to obtain the equalization error, the smaller the variation of the equalization error can be. However, no matter how much the number of data is increased, the required convergence rate (for example, 95%). There occurs a state in which the minimum change amount of the tap coefficient required to obtain ## EQU1 ## does not become small.

FIG. 10 is a graph showing the convergence rate with respect to the minimum change amount of the tap coefficient for a certain tape / head system (reproduction system). The number of data required to obtain the equalization error is 1000, 2000 pieces, 3000 pieces, 4
The cases of 000 and 5000 are respectively shown. As can be seen from this figure, for example, when the tap coefficient minimum change amount is 1/35 (the value when the coefficient of the center tap shown by S in the drawing of FIG. 3 is "1"), the number of data is 1000. Then the convergence rate is 15% and the number of data is 2
With 000, the convergence rate is 70% and the number of data is 300.
When the number is 0 or more, the convergence rate is 95%.

In the tape / head system of FIG. 10, there is almost no change in the convergence rate even if the number of data is 3000 or more (hereinafter, this state is called a saturated state). It is desirable that the minimum change amount of the tap coefficient is as small as possible in order to perform fine control, and that the convergence rate is 95% or more. From this, in the tape / head system of FIG. 10, the number of data is set to 3000 and the minimum change amount of tap coefficient is set to 1/35. When the number of data is 3000, the convergence rate of 95% or more can be secured even if the tap coefficient minimum change amount is 1/35 or more.

It is considered that the above-mentioned saturation occurs due to the influence of noise in the tape / head system. The noise of the tape / head system is represented by C / N. Therefore, in the saturated state determined by the relationship with this C / N, the minimum number of data is adopted and the convergence rate is 95% (9
It is sufficient to set the tap coefficient minimum change amount that can ensure practical use even if it is 0% or more). Figure 10 above
In this case, the tap coefficient minimum change amount may be set to 1/35. However, if C / N of the tape / head system is improved in the future, 1/40 or the like may be adopted as the minimum change amount of the tap coefficient.

The measurement conditions for obtaining the data shown in FIG. 10 were WC / N of 26 dB. W-C / N
To obtain, the Nyquist frequency is recorded and reproduced, and the reproduction level (peak-to-p) of the Nyquist frequency at that time is recorded.
eak) is C (carrier), and N (noise)
Is the rms (root mean square) obtained by integrating the noise from the frequency 0 to the clock frequency.
It may be digitized in e).

Further, as the measurement condition for obtaining the data shown in FIG. 10 above, there is tap updating, and as the updating method, there are the following four methods, Case 1 to Case 4, for example. In FIG. 10, the method of Case 1 was used. The method of case 1 is also the method already described in the first embodiment.

The method of Case 1 is schematically shown in FIG.
1 (a), one tap (C _-1 or C ₁ ) is temporarily fixed, the other tap is updated, and if the equalization error is the minimum under this condition, the tap that is temporarily fixed Repeat this by swapping the coefficient and the updated tap coefficient,
If it is the smallest even if replaced, it is fixed there.

The method of Case 2 is schematically shown in FIG.
As shown in 1 (b), the equalization error between the current tap coefficient and the tap coefficient in four directions is calculated, and the tap coefficient is changed in the direction in which the equalization error is minimized. If the coefficient becomes the minimum, it is fixed there.

The method of Case 3 is schematically shown in FIG.
As shown in (c) of 1, the equalization error between the current tap coefficient and the tap coefficient in four directions is calculated, and the tap coefficient is updated in eight directions from the minimum and maximum information of the equalization error. If the current tap coefficient becomes the minimum, it is fixed there.

The method of Case 4 is schematically shown in FIG.
As shown in (d) of 1, the equalization error between the current tap coefficient and the tap coefficient in the eight directions is calculated, and the tap coefficient is updated in the direction in which the equalization error is minimized. If the coefficient becomes the minimum, it is fixed there.

With the above methods of cases 2 to 4, it is possible to widen the range in which the equalization error converges to the minimum point as compared with the method of case 1.

The following three cases are conceivable as methods for controlling the amount of change in the tap coefficient. In addition, in FIG. 10, the method of case A was used.

Case A: One step (minimum change amount of tap coefficient adopted as described above × 1) is changed.

Case B: By changing by 2 steps (minimum change amount of tap coefficient adopted as described above × 2),
When the equalization error becomes the minimum, the step is changed step by step.

Case C: 4 steps (minimum amount of change in tap coefficient adopted as described above × 4) are changed,
When the equalization error becomes the minimum, the step is changed step by step.

In the above case, the range in which the equalization error converges to the minimum point becomes wider in the order of A, B, and C.

[0070]

As described above, according to the present invention, the amount of data required to obtain the equalization error is smaller than the amount of data required to obtain the signal error rate. Accurate equalization characteristics can be set. Further, by generating the expected value for each identification data from the signal level based on the output signal of the equalizer, it is possible to deal with the case where the signal level changes.

[Brief description of drawings]

FIG. 1 is an explanatory diagram of a partial response level IV.

FIG. 2 is a block diagram showing an automatic equalizer of the present invention.

FIG. 3 is a block diagram showing an equalizer.

FIG. 4 is a block diagram showing a data detection circuit.

FIG. 5 is a block diagram showing a difference extraction circuit.

FIG. 6 shows an analog 1-bit delay output, a detection level,
It is a graph which shows the relationship with an expected value, and difference data.

FIG. 7 is a block diagram showing another example of a difference extraction circuit.

FIG. 8 is an analog 1-bit delay output and a detection level;
It is a graph which shows the relationship with an expected value, and difference data.

FIG. 9 is a block diagram of a difference calculation circuit in another automatic equalizer of the present invention.

FIG. 10 is a graph showing the relationship between the tap coefficient minimum change amount and the convergence rate in a certain tape / head system of the present invention.

FIG. 11 is a schematic diagram showing a tap updating method of the present invention.

[Explanation of symbols]

 2 Equalization circuit 4 Data detection circuit 5 Difference extraction circuit 6 Judgment circuit 7 Tap coefficient change circuit

Claims (5)

[Claims] 1. An equalizer capable of changing parameters, a means for identifying data from an output signal of the equalizer, an expected value set for each identified data, and an output signal of the equalizer. Means for extracting the difference from the signal level based on
An automatic equalizer comprising means for generating an equalization error from the difference data, and means for setting a parameter of the equalizer so as to reduce the error based on the equalization error. Chemist. 2. The automatic equalizer according to claim 1, further comprising means for generating an expected value for each identification data from a signal level based on an output signal of the equalizer. 3. An expected value arithmetic circuit is provided, and another expected value is also generated based on the output of this expected value arithmetic circuit, and the output of the one expected value arithmetic circuit or the other expected value is generated. 3. The automatic system according to claim 2, wherein an expected value for each identification data is generated by selecting one of a value and a fixed value given in advance according to the identification data. Equalizer. 4. A relation in which the minimum change amount of the tap coefficient of the equalizer and the data amount required to obtain the equalization error are the convergence probabilities with respect to the change in the minimum change amount of the tap coefficient for the data amount. The automatic equalizer according to any one of claims 1 to 3, wherein the automatic equalizer is defined based on 5. The data amount of the reproduction system having the smaller data amount out of the data amount in the saturated state of the relationship determined by the signal noise ratio of the reproduction system is adopted as the data amount of the reproduction system. 5. The automatic equalizer according to claim 4, wherein a value equal to or greater than the minimum tap coefficient change amount when the probability is 90% or more is adopted as the minimum tap coefficient change amount of the reproduction system.