JPH0834172B2 - Epitaxial wafer - Google Patents

Description

TECHNICAL FIELD OF THE INVENTION The present invention relates to an epitaxial wafer in which a single-layer or multi-layer epitaxial growth containing indium phosphide is performed on an indium phosphide substrate.

[Technical background of the invention and its problems]

III-V group compound semiconductors are used for optical devices such as semiconductor lasers, photodiodes and field effect transistors.
Used as a material for electronic devices. In the case of producing an element using a compound semiconductor, generally, a single or multi-layer compound semiconductor thin film is epitaxially grown on a single crystal substrate such as indium phosphide (hereinafter referred to as InP) gallium arsenide. As a method for performing epitaxial growth, a liquid phase growth method, a vapor phase growth method, a metal organic pyrolysis vapor phase growth method and the like are known.

The characteristics of the manufactured device largely depend on the quality of the epitaxial layer, and the presence of dislocations in the epitaxial layer deteriorates the characteristics and the yield.

The dislocations in the epitaxial layer do not necessarily have a one-to-one correspondence with the dislocations in the substrate, but it is generally recognized that the less dislocations in the substrate, the less dislocations in the epitaxial layer.

Therefore, in order to reduce dislocations in the epitaxial layer and improve device performance and yield, it is usual to use a substrate with few dislocations.

In the case of InP, a substrate with few dislocations can be obtained only by heavily doping with sulfur or zinc. However, when epitaxial growth is carried out on a highly doped substrate, undesired phenomena such as impurity diffusion from the substrate and autodoping may occur. On the other hand, the semi-insulating substrate used for manufacturing field effect transistors has an etch pit density of tens of thousands / cm ²
Therefore, it is desirable to reduce dislocations in the epitaxial layer in order to improve device characteristics, yield, and the like.

[Object of the Invention]

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide an epitaxial wafer having an epitaxial growth layer with few defects even when epitaxial growth is performed on a substrate with many defects.

[Outline of Invention]

The present invention relates to an epitaxial wafer in which one or more epitaxial layers including at least one indium phosphide layer are grown on a tin-doped n-type indium phosphide substrate, and a trace amount of one or more indium phosphide layers is provided. (EN) An epitaxial wafer having gallium added thereto.

In the present invention, when the amount of Ga added is increased, In
The lattice constants of the P epitaxial layer and the InP substrate have shifted,
It is expected that the strain will increase and eventually the mismatched dislocation will occur. In the experiment, the amount of Ga in group III in the solid phase was 3
%, The etch pit density is about the same as when Ga is not added. Therefore, the Ga addition amount should be within the range of 3% of the group III in the solid phase. In addition, when the amount of Ga added is less than 0.08%, the average etch pit density is about the same as that of the substrate. Of which 0.08
It is desirable to make it more than%.

〔The invention's effect〕

The InP epitaxial layer to which the present invention is applied and the conventional method I
For nP epitaxial layers, the density of the crystal dislocations and the corresponding etch pits was compared, and when the substrate etch pit density was about 40,000 / cm ² , the InP epitaxial layer to which the present invention was applied showed It was 1/2 to 1/4 of the etch pit density of the InP epitaxial layer.

In addition, a conventional method InP epitaxial layer, GaInAsP layer and the like are epitaxially grown on the InP epitaxial layer to which the present invention is applied, and the etch pit density of the uppermost layer is compared with that of the same structure only by the conventional method. also,
The wafer containing the InP layer according to the present invention had an etch pit density of 1/2 or less. Furthermore, it is possible to provide an epitaxial wafer which is advantageous in suppressing the variation in defect generation with respect to the amount of gallium added, as compared with the case where a semi-insulating substrate is used.

[Examples of the Invention] Before describing the examples of the present invention, reference examples of the present invention will be described with reference to FIGS. 1 to 5. In order to directly observe the effects of the reference example and the example of the present invention, the etch pit density was compared by etching samples having different Ga addition amounts with an etching solution mixed in the ratio of phosphoric acid 2: hydrobromic acid 1. It was Since etch pits generally appear corresponding to dislocations,
The density is a quantitative index of dislocation. Figure 1 compares etch pit densities by epitaxially growing InP monolayers of several microns on the InP iron-doped semi-insulating substrate with an etch pit density of about 40,000 / cm ² by changing the amount of Ga added. . By adding a very small amount of Ga, the etch pit density was greatly reduced, and there was not much change until the amount of Ga added was about 2%. However, the etch pit density increased rapidly near 3%
It was almost the same as when Ga was not added.

Figures 2 and 3 show that the added amount of Ga is 0% and 0.7, respectively.
%, Film thicknesses of 3.5 μm and 4 μm are photographs taken after 40 seconds of etching treatment at room temperature. 4 and 5 are
The growth layers of the samples in FIGS. 2 and 3 are removed by etching, and the etch pit densities of the substrates are compared. The difference between the etch pit densities observed in FIGS. Not seen in Figures 4 and 5.

Next, examples of the present invention will be described. The etching pits were created and evaluated in the same manner as in the reference example.

FIG. 6 shows the case where a Ga-doped InP layer according to the present invention is grown for several microns on a LnP tin-doped n-type substrate having an etch pit density of about 30,000 / cm ² , and further a normal InP layer is grown for several microns. It is a plot of the etch pit density of the upper InP layer against the amount of Ga added to the lower InP. It can be seen that the etch pits in the upper layer are also reduced by including the Ga-doped InP layer in the lower layer in the multilayer wafer.

[Brief description of drawings]

FIG. 1 is a diagram showing the relationship between the amount of Ga added and the etch pit density in the reference example of the present invention, and FIG. 2 shows that Ga is not added.
The crystal structure (etch pits) of the InP epitaxial layer is shown in a micrograph. Figure 3 shows the crystal structure (etch pits) of the InP epitaxial layer containing 0.7% Ga.
Is a micrograph showing the crystal structure (etch pits) of the substrate from which the epitaxial layer of FIG. 2 has been peeled off. FIG. 5 shows the epitaxial layer of FIG. 6 is a micrograph showing the crystal structure (etch pits) of the substrate, and FIG. 6 shows the InP containing Ga according to the present invention grown in the lower layer and the normal InP grown in the upper layer added to the lower layer. FIG. 6 is a diagram showing the relationship between the amount of Ga and the etch pit density of the upper layer.

Claims (2)

[Claims] 1. An epitaxial wafer in which at least one epitaxial layer including at least one indium phosphide layer is grown on a tin-doped n-type indium phosphide substrate, and a trace amount is present in one or more indium phosphide layers. Gallium is added to the epitaxial wafer. 2. The epitaxial wafer according to claim 1, wherein the amount of said gallium added is 0.08% to 3% with respect to said indium in a solid phase ratio.