JPH0670974B2 - Method for manufacturing compound semiconductor epitaxial wafer - Google Patents

Description

TECHNICAL FIELD The present invention relates to an epitaxial wafer of a III-V group compound semiconductor, and more specifically to a low dislocation density of a III-V group compound semiconductor, which enables improvement of characteristics of various semiconductor devices. The present invention relates to a method for manufacturing an epitaxial wafer.

Conventional technology Conventionally used Si semiconductor devices have limitations on various physical properties of Si, and cannot keep up with recent trends such as high-speed operation and high-frequency operation of semiconductor devices. Areas that cannot be dealt with have appeared. Therefore, as an alternative to group IV single-element semiconductors such as Si, GaAs, InAs, In
Attention has been paid to compound semiconductors represented by III-V groups such as P.

This compound semiconductor has a zincblende type crystal structure similar to the diamond type covalent crystal, and can be artificially manufactured while maintaining this crystal structure, enabling the production of various functional devices not found in Si. . Also, by combining two kinds of binary compound semiconductors (for example, GaAs and InAs) that share one element (for example, As), the ternary element whose lattice constant changes continuously and monotonically according to its composition A mixed crystal (for example, GaInAs) can be obtained. As a result, it is possible to obtain a heterojunction that can maintain lattice matching between different semiconductor crystals, and this can be said for multi-element mixed crystals of quaternary or higher.

Thus, using such heterojunction semiconductors, ultrafast electronic devices such as high electron mobility transistors (HE
Other than MT), various optoelectronic devices such as LDs are being developed.

When manufacturing various compound semiconductor devices such as lasers or light emitting diodes, optoelectronic integrated circuits (OEIC), field effect transistors (FET), HEMTs, etc., in which transistors, resistors, etc. are formed on one substrate Liquid phase epitaxial growth method (LPE method), vapor phase epitaxial growth method (VPE method), metalorganic vapor phase epitaxial growth method (OMVPE method), molecular beam epitaxial growth method (M
An epitaxial wafer in which an epitaxial film is grown on a semi-insulating III-V group compound semiconductor substrate by the BE method) is used. Such an epitaxial wafer is also used in an integrated circuit (IC) manufactured by the ion implantation method.

However, the characteristics of these devices, integrated circuits, etc. are greatly influenced by the quality of the epitaxial wafer used. For example, in lasers and light emitting diodes, dislocations in the epitaxial wafer are dark line defects (DL
D), which significantly shortens the lifetime of the device, is described in, for example, W. Frank et al. [Applied Physics, 1980, 23 , 30.
3]. In addition, the fact that the threshold voltage of an FET also has a close correlation with dislocations is described in, for example, Ishii et al. [IEEE Transaction of Electron Devices (IEEE Transac
tion of Electron Devices), 1984, ED- 31 , 1051].

Some dislocations in such an epitaxial layer are generated during epitaxial growth and some are propagated from the substrate. Therefore, in order to reduce the dislocations, at least the dislocation density of the substrate to be used should be as low as possible. There is a need. However, the conventionally used semi-insulating substrate has a remarkably high dislocation density of 10,000 / cm ² or more, which is far from satisfying the above requirements.

For the misfit dislocations due to the lattice mismatch between the substrate and the epitaxial growth layer, a buffer layer made of a mixed crystal of a suitable compound semiconductor is interposed between them to form a lattice constant between the substrate and the epitaxial layer. It is known that the difference between them can be eased.

Problems to be Solved by the Invention Even in a compound semiconductor, which is attracting attention as a material for a high-performance semiconductor device in place of a Si semiconductor, various problems still need to be improved. In the epitaxial wafer used for manufacturing this compound semiconductor device, crystal defects based on dislocations propagated from the substrate or formed during epitaxial growth greatly affect the performance of the device after manufacturing.

Therefore, it is necessary to manufacture a high-quality product in which the defects in the epitaxial wafer are reduced as much as possible.
However, at present, such a high-quality epitaxial wafer having a low dislocation density has not been realized.

Therefore, an object of the present invention is to provide a method for manufacturing an epitaxial wafer of a III-V group compound semiconductor having a low dislocation density.

Means for Solving the Problems In view of the above-mentioned current situation of epitaxial wafers of compound semiconductors, the inventors of the present invention have made various studies and researches in order to develop an objective high-quality epitaxial wafer, and as a result, dislocation of this type of wafer The density has a close relationship with the thickness of the epitaxial layer and the concentration of the additive in the substrate.To reduce this, the homologous element is added to the substrate in a specified amount, and the thickness of the epitaxial layer is reduced. It was found that it is effective to make the value within a predetermined range, and the present invention was completed based on such a new finding.

That is, in the method for producing a compound semiconductor epitaxial wafer of the present invention, a semi-insulating substrate of a III-V group compound semiconductor containing a large amount of a homologous element is formed, and a lattice matching with the substrate is performed by epitaxial growth on the substrate. While holding II
A method for manufacturing a III-V compound semiconductor epitaxial wafer in which at least one epitaxial layer of an IV compound semiconductor is grown, which is characterized in that the thickness d (μm) of the epitaxial layer is expressed by the following formula (1): However, the epitaxial layer is grown while monitoring its thickness according to the concentration of the homologous element in the substrate so that it is thinner than the thickness indicated by N: the homologous element addition amount [10 ¹⁹ / cm ³ ]. It is in.

In the method for producing a compound semiconductor epitaxial wafer of the present invention, as a preferable substrate, additional element and combination of epitaxial layers, GaAs-In-GaAs, In
P-Al or Ga-InP may be mentioned, but the present invention is not limited to these, and similar results can be expected for various other combinations. Needless to say, the present invention includes not only the binary system but also mixed crystals of the ternary system or more, and it is also applicable to the case where the epitaxial layer is formed of two or more layers which are the same or different.

First, in the method of the present invention, the substrate is various conventionally known methods, for example, the liquid sealed Czochralski method, the Bridgman method, or an improved method thereof (for example, the 3-temperature horizontal Bridgman method: 3T-HB method). It can be obtained by producing an ingot by, for example, and slicing it.

According to these methods, it is easy to add a homologous element,
It is also relatively easy to control the concentration, and it is possible to advantageously obtain the target added homologous element-containing substrate.

Furthermore, the epitaxial layer is formed by the LPE method, V.
PE method, OMVPE method or MBE method can be used,
The growth epitaxial film is formed while monitoring the film thickness of the grown epitaxial film by using a crystal oscillator or by utilizing an optical interference method so that the thickness becomes a value corresponding to the amount of the added homologous element in the substrate.

The substrate and the epitaxial layer may, of course, contain a dopant depending on the purpose. For example, Cr for making the substrate semi-insulating, or each dopant for making the epitaxial layer p-type or n-type. Can be used.

The structure of the compound semiconductor epitaxial wafer obtained by the method of the present invention is shown in FIG. Where substrate 1
Is, for example, GaAs doped with a large amount of a homologous element (In),
The epitaxial layer 2 is, for example, undoped GaAs. Also, the relationship between the amount of additive element such as In (N × 10 ¹⁹ / cm ³⁾ and the thickness of the epitaxial layer dμm is shown in FIG.

Action The performance of various semiconductor devices made from a compound semiconductor epitaxial wafer is greatly affected by the quality of the epitaxial wafer itself, and the life is shortened and the threshold voltage is affected. This is especially due to the high dislocation density in the epitaxial layer. Some of these dislocations are propagated from the substrate and some are due to the epitaxial layer itself. It is necessary to reduce the dislocation density of. A substrate having such a low dislocation density can be obtained by adding a predetermined amount of an element in the same group as the constituents of the substrate according to the various methods described above. It is also important to have a lattice constant close to that of the epitaxial layer to be formed later.

In general, when a compound semiconductor substrate does not contain an additive composed of a homologous element, lattice defects such as dislocations exist on the surface due to the limitation of the manufacturing method. As a result, when an epitaxial layer is directly grown on such a substrate surface, dislocations on the substrate surface also propagate to the epitaxial layer and crystal defects are generated due to the dislocation. Therefore, in general, an additive of a homologous element is added to the substrate to improve the dislocation density of the substrate and suppress the propagation of dislocations. However, this is still insufficient, and affects various characteristics of the semiconductor device as described above.

By the way, the present inventor has a close relation between the dislocation density in a single crystal thin film formed on a substrate by epitaxy and the amount of a homologous element added to the substrate and the thickness of an epitaxial layer formed on the substrate. I knew that. Therefore, it has been found that the dislocation density of the obtained epitaxial wafer can be controlled to a low value by appropriately adjusting the amount of this homologous element and the film thickness of the epitaxial film.

Thus, the present inventors have extensively investigated the relationship between the dislocation density of the produced epitaxial wafer and the amount of the homologous element and the thickness of the epitaxial layer, and the amount of the homologous element to be added to the substrate N (× 10 ¹⁹ / cm 2). ³ ) and the film thickness d (μm) of the epitaxial layer are in the lower (or left) region of the equation (1) of the dN coordinates divided by the relational equation shown in (1) above. It was found that, by selecting, even if a misfit (difference between the lattice constant of the substrate and the lattice constant between the epitaxial layer) was observed in the substrate, dislocation did not occur in the epitaxial layer due to this.

This is the case, for example, in the paper by H. Nagai [Journal of Applied Physics (J. Appl.
s.), 1974, 45 -9, 3789], when an epitaxial layer having a different lattice constant from the substrate is grown,
The epitaxial layer elastically deforms to match the lattice of the substrate, and therefore the crystal structure of the epitaxial layer deforms from, for example, cubic to tetragonal, but when the epitaxial layer is thin, the epitaxial layer only undergoes elastic deformation. It seems to be based on what happens. However, conversely, when the epitaxial layer is thick, the stress that tries to return to the original lattice determined by the composition of the epitaxial layer becomes gradually stronger, and when the stress exceeds the critical value, it is misfit to the epitaxial layer. Dislocations are introduced and the stress is relieved, but crystal defects are formed.

Thus, according to the method for producing a compound semiconductor epitaxial wafer of the present invention, 10,000 pieces / cm 3
The extremely high dislocation density of ² or more can be reduced to about 100 dislocations / cm ² . Therefore, by using such a low dislocation density wafer, high performance OEIC,
Various semiconductor devices such as FET and HEMT can be manufactured with high yield.

Examples Hereinafter, the method for producing an epitaxial wafer of the present invention will be described in more detail with reference to examples, and the effects exhibited by the methods will be proved. However, the scope of the present invention is not limited to the following examples.

Example 1 (i) Preparation of In-Containing GaAs Substrate A high-purity quartz boat having a width of 55 mm and a length of 550 mm was sandblasted to adjust the wettability with the melt. Then 4.5 kg
Of polycrystalline GaAs (containing a small amount of As ₂ O ₃ , 0.03 to 0.1 wt% Cr and a predetermined amount of In) was loaded and grown in the <111> direction using a seed crystal by the 3T-HB method. Temperature in three areas
T ₁ , T ₂ and T ₃ were kept at 1240 ° C, 1200 ° C and 600 ° C, respectively. The temperature gradient near the solid-liquid interface was adjusted to be 1 ° C / cm, and the In-containing Cr-doped GaAs crystal was grown at a quartz boat moving speed of 5 mm / hour to ensure sufficient growth in the T ₂ region. Annealed and then cooled according to a predetermined temperature program to obtain an ingot.

GaAs ingots with different In concentrations were similarly prepared.

(Ii) Manufacture of epitaxial wafer GaAs prepared in the above step (i) with an In concentration of 3.7 × 10 ¹⁹ / cm ^3.
Epitaxial layer of 2 to 4 μm on the substrate by vapor phase method
I grew it. At this time, crystal defects in the epitaxial layer were observed by X-ray topography, but no misfit was observed. On the other hand, an epitaxial layer was grown to 10 to 12 μm on the GaAs substrate containing the same In concentration by the above method. At this time, misfit dislocations were generated in the <110> direction in the epitaxial layer.

When GaAs was epitaxially grown to a thickness of 5 μm on the GaAs substrate obtained in the same manner as above containing In concentration of 1.7 × 10 ¹⁹ / cm ³ , no misfit dislocation was observed. It was

Misfit dislocations were observed even in a 2 μm epitaxial growth layer on a GaAs substrate to which an In concentration of 6.2 × 10 ¹⁹ / cm ^{3 was} added.

In the same manner, GaAs substrates having different In concentrations were used in the same manner, and GaAs epitaxial layers of various thicknesses were grown on the GaAs substrates to examine the presence or absence of misfit dislocations.

The above results are plotted in FIG.

From the results shown in FIG. 2, it was found that the equation (1) was obtained by connecting the boundaries where misfit dislocations were generated, and a good epitaxial layer without misfit dislocations was obtained in the lower (or left) region.

EFFECTS OF THE INVENTION As described above in detail, according to the method of the present invention, a substrate having a low dislocation density by adding a predetermined amount of a homologous element to the substrate is used, and the thickness of the epitaxial growth layer is changed according to the addition amount of the element. Is limited to a value within a predetermined range, a high-quality compound semiconductor epitaxial wafer having sufficient lattice matching with the substrate and no misfit dislocations can be manufactured.

Therefore, according to the method for producing an epitaxial wafer of the present invention, it is possible to improve the characteristics of various semiconductor devices, and in particular, a laser, a light emitting diode, or a constituent element of which has a significantly shortened life due to the presence of dislocations. In OEIC, it is expected that the performance will be greatly improved and the yield will be improved. Further, it is possible to improve the threshold voltage uniformity in other devices such as FETs.

As described above, the manufacturing method of the present invention is extremely effective in promoting the practical application of a compound semiconductor, which is expected as a semiconductor material capable of operating at high speed and high frequency, in place of a Si semiconductor device.

[Brief description of drawings]

The attached FIG. 1 is a sectional view schematically showing the structure of a compound semiconductor epitaxial wafer obtained by the method of the present invention, and FIG. 2 shows the relationship between the amount of homologous elements N in the substrate and the thickness d of the epitaxial layer. It is a plotted graph. (Main reference numbers) 1 ... In-doped GaAs substrate, 2 ... GaAs epitaxial layer

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Kiyohiko Kiyohiko 1-1-1 Kunyokita, Itami City, Hyogo Prefecture Sumitomo Electric Industries, Ltd. Itami Works (72) Inventor Masaaki Sekinobu 1-Kunyo Kita, Itami City, Hyogo Prefecture No. 1 in Sumitomo Electric Industries Itami Works

Claims (3)

[Claims] 1. A semi-insulating substrate of a III-V group compound semiconductor containing a large amount of a homologous element is formed, and an epitaxial growth method is applied thereon to maintain lattice matching with the substrate.
In a method for manufacturing a III-V compound semiconductor epitaxial wafer in which at least one epitaxial layer of a III-V compound semiconductor is grown, the thickness d [μm] of the epitaxial layer is expressed by the following formula (1): However, the epitaxial layer is grown while monitoring its thickness according to the concentration of the homologous element in the substrate so that it is thinner than the thickness indicated by N: the homologous element addition amount [10 ¹⁹ / cm ³ ]. 3. A method for manufacturing the III-V compound semiconductor epitaxial wafer as described above. 2. The III-V group compound according to claim 1, wherein the substrate is a GaAs substrate, the added homologous element is In, and the epitaxial layer is a GaAs epitaxial layer. Method for manufacturing semiconductor epitaxial wafer. 3. The substrate is an InP substrate, the added homologous element is Al or Ga, and the epitaxial layer is InP.
The method for producing a III-V compound semiconductor epitaxial wafer according to claim 1, wherein the III-V compound semiconductor epitaxial wafer is an epitaxial layer.