JPH08339934A - Manufacture of laminated inductor - Google Patents

Manufacture of laminated inductor

Info

Publication number
JPH08339934A
JPH08339934A JP16713295A JP16713295A JPH08339934A JP H08339934 A JPH08339934 A JP H08339934A JP 16713295 A JP16713295 A JP 16713295A JP 16713295 A JP16713295 A JP 16713295A JP H08339934 A JPH08339934 A JP H08339934A
Authority
JP
Japan
Prior art keywords
conductor
conductor pattern
pattern
paste
conductive pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16713295A
Other languages
Japanese (ja)
Inventor
Seiichi Kobayashi
小林  清一
Shigeru Nishiyama
西山  茂
Shuichi Ishida
修一 石田
Mitsuo Sakakura
光男 坂倉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toko Inc
Original Assignee
Toko Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toko Inc filed Critical Toko Inc
Priority to JP16713295A priority Critical patent/JPH08339934A/en
Publication of JPH08339934A publication Critical patent/JPH08339934A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To form a conductor pattern with high accuracy and obtain a laminated inductor of a small tolerance and also increase the thickness of the conductor and thereby increase Q by forming the conductor pattern with photosensitive conductor paste and connecting ends of the conductor pattern to terminal electrodes. CONSTITUTION: Photosensitive conductor paste 12a is applied to the entire surface of an insulator layer 11a and then is dried. After that, the paste is exposed to ultraviolet rays, etc., and then development is so performed that only a terminal connecting section 15 and a conductor pattern 13a which is connected to the terminal connecting section 15 and is extending from the section 15 may be left behind, which means the conductor pattern 13a is formed by photolithography using the photosensitive conductor pattern 12a. Ends of the conductor pattern 13a are connected to terminal electrodes. By this method, the conductor pattern 13 of high accuracy is formed and thereby a laminated inductor of a small tolerance can be obtained. At the same time, by making the thickness of the conductor large, Q can be increased.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は積層インダクタの製造方
法に係るもので、印刷法によって絶縁体層と導体パター
ンを交互に形成して、絶縁体層中を積層方向に重畳して
周回する導体パターンを形成する、積層インダクタの製
造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a laminated inductor, in which an insulating layer and a conductive pattern are alternately formed by a printing method, and the insulating layer and the conductor pattern are superposed in the stacking direction and circulate. The present invention relates to a method for manufacturing a laminated inductor which forms a pattern.

【0002】[0002]

【従来の技術】インダクタ(コイル)の分野でも小型化
・薄型化の要求に対応するために、巻線を用いないタイ
プのインダクタが実用化されている。これらのインダク
タは印刷法や薄膜法、またはシート法によって製造され
るものが多い。
2. Description of the Related Art In the field of inductors (coils) as well, in order to meet the demand for size reduction and thickness reduction, a type of inductor that does not use windings has been put into practical use. Many of these inductors are manufactured by a printing method, a thin film method, or a sheet method.

【0003】印刷法によって導体パターンを形成する場
合、導体パターンの線幅を数十μm以下に形成すること
はできず、またその精度も十分でなく、設計値から数十
μm程度ずれるのが一般的である。
When a conductor pattern is formed by a printing method, the line width of the conductor pattern cannot be formed to be less than several tens of μm, and its accuracy is not sufficient, and it is generally displaced from the designed value by about several tens of μm. Target.

【0004】それに対して薄膜法(スパッタリング法な
ど)によって導体パターンを形成した場合、その膜厚を
大きくすることができず、せいぜい数μm程度しか得ら
れない。導体抵抗を小さくしてQを大きくするために
は、膜厚を大きくする必要があるので、その上に導体の
メッキ層を形成するのが一般的である。
On the other hand, when the conductor pattern is formed by the thin film method (such as the sputtering method), the film thickness cannot be increased, and at most about several μm can be obtained. Since it is necessary to increase the film thickness in order to reduce the conductor resistance and increase the Q, it is common to form a conductor plating layer on the film thickness.

【0005】[0005]

【発明が解決しようとする課題】このように、従来の製
造方法では、高いQを得ることができるが精度の高い高
周波インダクタが得られなかったり、精度は良いがQを
大きくすることが難しくなったり、製造工数が多くなる
といった問題がある。
As described above, according to the conventional manufacturing method, a high Q can be obtained but a high-frequency inductor having a high precision cannot be obtained, or the Q is difficult to increase although the precision is good. There is also a problem that the number of manufacturing processes increases.

【0006】本発明は、高い精度で導体パターンを形成
して狭公差の積層インダクタを得るとともに、膜厚も大
きくすることができてQの高い積層インダクタを提供す
るものである。
The present invention provides a laminated inductor having a high Q, which is capable of forming a conductor pattern with high accuracy to obtain a laminated inductor having a narrow tolerance and increasing the film thickness.

【0007】[0007]

【課題を解決するための手段】本発明は、導体パターン
を形成するための導体材料を変えることによって、上記
の課題を解決するものである。
SUMMARY OF THE INVENTION The present invention solves the above problems by changing the conductor material for forming a conductor pattern.

【0008】すなわち、絶縁体層と導体パターンを交互
に印刷して、絶縁体層間に約半ターンの導体パターンを
端部を接続しながら積層方向に重畳して周回する導体パ
ターンを形成する積層インダクタの製造方法において、
導体パターンを感光性導体ペーストによって形成し、導
体パターンの端部をそれぞれ端子電極に接続することに
特徴を有するものである。
That is, a laminated inductor in which an insulating layer and a conductive pattern are alternately printed to form a conductive pattern which overlaps and circulates in the stacking direction while connecting the end portions of the conductive pattern of about half a turn between the insulating layers. In the manufacturing method of
It is characterized in that the conductor pattern is formed by a photosensitive conductor paste and the end portions of the conductor pattern are connected to the terminal electrodes, respectively.

【0009】また、絶縁体層と導体パターンを交互に印
刷して、絶縁体層間に約半ターンの導体パターンを端部
を接続しながら積層方向に重畳して周回する導体パター
ンを形成する積層インダクタの製造方法において、感光
性導体ペーストを絶縁体層上に塗布し、乾燥し、露光お
よび現像によって約半ターンの導体パターンを形成し、
導体パターンの端部をそれぞれ端子電極に接続すること
に特徴を有するものである。
A laminated inductor in which an insulating layer and a conductive pattern are alternately printed to form a conductive pattern which overlaps and circulates in the stacking direction while connecting end portions of the conductive pattern of about half turn between the insulating layers. In the method for producing, a photosensitive conductor paste is applied onto the insulator layer, dried, and exposed and developed to form a conductor pattern of about half a turn,
It is characterized in that each end of the conductor pattern is connected to the terminal electrode.

【0010】[0010]

【作用】感光性導体ペーストを用いてフォトリソグラフ
ィー技術によって導体パターンを形成するので、数μm
の公差で 100μm以下の導体パターンが形成でき、また
厚みも20μm以上の導体パターンが得られる。
[Function] Since the conductor pattern is formed by the photolithography technique using the photosensitive conductor paste, several μm
With a tolerance of, a conductor pattern of 100 μm or less can be formed, and a conductor pattern of 20 μm or more in thickness can be obtained.

【0011】[0011]

【実施例】以下、図面を参照して、本発明の実施例につ
いて説明する。
Embodiments of the present invention will be described below with reference to the drawings.

【0012】図1(a)〜(f)と図2(a)〜(c)
は本発明の工程を示す平面図である。図示しないマイラ
ーフィルム等の表面に所定の厚さの絶縁体層11aを印刷
によって形成する。ペーストを全面に印刷した後に乾燥
させたものである。図では一素子分のみを示している
が、実際に製造する際には縦横に多数の素子を配列して
同時に形成する(図1a)。
1A to 1F and 2A to 2C.
[Fig. 3] is a plan view showing a process of the present invention. An insulator layer 11a having a predetermined thickness is formed by printing on the surface of a Mylar film or the like (not shown). The paste is printed on the entire surface and then dried. Although only one element is shown in the figure, a large number of elements are arrayed in the vertical and horizontal directions and are simultaneously formed during actual manufacturing (FIG. 1a).

【0013】本発明においては、導体パターンの形成方
法が従来と異なっている。感光性の導体ペースト12aを
絶縁体層11aの全面に塗布(印刷)して形成し、乾燥さ
せる(図1b)。その後に紫外線等で露光し、現像によ
って端子接続部分15とそれに接続されて伸びる導体パタ
ーン13aのみを残すようにする(図1c)。
In the present invention, the method of forming the conductor pattern is different from the conventional method. A photosensitive conductor paste 12a is applied (printed) on the entire surface of the insulator layer 11a to form it and dried (FIG. 1b). After that, it is exposed to ultraviolet rays or the like, and by development, only the terminal connecting portion 15 and the conductor pattern 13a connected thereto and extending are left (FIG. 1c).

【0014】感光性導体ペーストは、特開平5- 67405号
公報に東レ株式会社によるものが示され、a)導電性を有
する金属成分粒子、b)側鎖にエチレン系不飽和基を有す
るアクリル系共重合体、c)光反応重合性化合剤、d)光重
合開始剤、によって構成することが記載されている。導
体材料によって、若干材料を変えてもよいが、基本的に
はこれらの成分から成るものである。
The photosensitive conductor paste is disclosed by Toray Industries, Inc. in JP-A-5-67405, and includes a) metal component particles having conductivity, and b) acrylic resin having ethylenically unsaturated groups in side chains. It is described that it is composed of a copolymer, c) a photoreactive polymerizable compound, and d) a photopolymerization initiator. Although the material may be slightly changed depending on the conductor material, it is basically composed of these components.

【0015】所定の厚みに上記の組成の感光性導体ペー
ストを塗布(印刷)して、約80°Cで5分間乾燥させ
る。導体パターンに応じたマスクを用いて紫外線で約10
分間露光し、現像によって不要な部分の導体膜を除去し
て所定の導体パターンを得ることができる。この導体膜
は 500°Cで30分、 800°Cで30分程度で焼成すること
ができる。
A photosensitive conductor paste having the above composition is applied (printed) to a predetermined thickness and dried at about 80 ° C. for 5 minutes. Approximately 10 with UV using a mask that matches the conductor pattern
It is possible to obtain a predetermined conductor pattern by exposing for a minute and removing an unnecessary portion of the conductor film by development. This conductor film can be baked at 500 ° C. for 30 minutes and at 800 ° C. for about 30 minutes.

【0016】上記の方法によって線幅が数十μmで厚み
が20μm以上の導体パターンの形成が可能である。線幅
の寸法誤差も数μmに抑えることができる。
By the above method, a conductor pattern having a line width of several tens of μm and a thickness of 20 μm or more can be formed. The dimensional error of the line width can be suppressed to several μm.

【0017】上記のようにして形成した導体パターン13
aの先端を露出させて、絶縁体層11aの半分よりやや広
い面積に絶縁体層11bを印刷する。これによって、導体
パターン13aは先端以外の部分が絶縁体層11bで覆われ
る(図1d)。
The conductor pattern 13 formed as described above
The tip of a is exposed and the insulator layer 11b is printed in an area slightly larger than half of the insulator layer 11a. As a result, the conductor pattern 13a is covered with the insulating layer 11b except the tip (FIG. 1d).

【0018】次に、導体パターン13aの先端を含み、一
部が絶縁体層11bの表面に達するように感光性導体ペー
スト12bを印刷する(図1e)。乾燥後、露光と現像に
よって図1dに示した導体パターン13aの先端に接続さ
れた約半ターンの導体パターン13bを形成する(図1
f)。これによって最初の約半ターンの導体パターンが
形成されることになる。
Next, a photosensitive conductor paste 12b is printed so as to include the tip of the conductor pattern 13a and reach a part of the surface of the insulator layer 11b (FIG. 1e). After drying, by exposure and development, a conductor pattern 13b of about half a turn connected to the tip of the conductor pattern 13a shown in FIG. 1d is formed (FIG. 1).
f). As a result, the conductor pattern of the first half turn is formed.

【0019】続いて、導体パターン13bの先端を残して
絶縁体層11cを形成し(図2a)、導体パターン13bの
先端を含む部分に感光性導体ペースト12cを印刷する
(図2b)。この感光性導体ペースト12cを露光・現像
して導体パターン13cを形成する。これによって、前の
約半ターンに接続された次の約半ターンの導体パターン
が形成される(図2c)。この工程を繰り返して、所定
のターン数の積層インダクタを形成する。
Then, the insulator layer 11c is formed by leaving the tip of the conductor pattern 13b (FIG. 2a), and the photosensitive conductor paste 12c is printed on the portion including the tip of the conductor pattern 13b (FIG. 2b). The photosensitive conductor paste 12c is exposed and developed to form a conductor pattern 13c. This forms the conductor pattern of the next approximately half turn connected to the previous approximately half turn (FIG. 2c). By repeating this process, the laminated inductor having a predetermined number of turns is formed.

【0020】所定の積層が完了したのちに乾燥、分割に
よって素子を得て、これを所定の温度と時間で焼成して
積層インダクタが得られる。絶縁体層の材料にはフェラ
イト等の磁性体、あるいはフォルステライト等の非磁性
体のいずれを用いてもよい。導体ペーストは銀または銀
/パラジウムを主成分とするものを用いるとよい。
After the predetermined lamination is completed, an element is obtained by drying and dividing, and this is fired at a predetermined temperature and time to obtain a laminated inductor. As the material of the insulator layer, either a magnetic substance such as ferrite or a non-magnetic substance such as forsterite may be used. It is preferable to use a conductor paste containing silver or silver / palladium as a main component.

【0021】[0021]

【発明の効果】本発明によれば、感光性導体ペーストに
より膜厚が大きくて低抵抗の導体パターンを形成するこ
とができるので、高いQの高周波インダクタが得られ
る。また、フォトリソグラフィー技術によって形成する
ので、パターンの精度が良好で狭公差の高周波インダク
タが得られる。
According to the present invention, a conductive pattern having a large film thickness and a low resistance can be formed by a photosensitive conductive paste, so that a high Q high frequency inductor can be obtained. Further, since it is formed by the photolithography technique, it is possible to obtain a high-frequency inductor having a good pattern accuracy and a narrow tolerance.

【0022】更に、厚膜によって端子電極を形成するこ
とができるので、薄膜法によるものと異なり端子電極を
直接焼き付けて形成することが可能となる利点もある。
Furthermore, since the terminal electrode can be formed of a thick film, there is an advantage that the terminal electrode can be directly baked and formed, unlike the thin film method.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明の実施例を示す平面図FIG. 1 is a plan view showing an embodiment of the present invention.

【図2】 本発明の実施例を示す平面図FIG. 2 is a plan view showing an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

11:絶縁体層 12:感光性導体ペースト 13:導体パターン 11: Insulator layer 12: Photosensitive conductor paste 13: Conductor pattern

───────────────────────────────────────────────────── フロントページの続き (72)発明者 坂倉 光男 埼玉県比企郡玉川村大字玉川字日野原828 番地 東光株式会社玉川工場内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Mitsuo Sakakura 828, Hinohara, Tamagawa, Tamagawa-mura, Hiki-gun, Saitama Toko Co., Ltd. Tamagawa factory

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 絶縁体層と導体パターンを交互に印刷し
て、絶縁体層間に約半ターンの導体パターンを端部を接
続しながら積層方向に重畳して周回する導体パターンを
形成する積層インダクタの製造方法において、導体パタ
ーンを感光性導体ペーストによって形成し、導体パター
ンの端部をそれぞれ端子電極に接続することを特徴とす
る積層インダクタの製造方法。
1. A laminated inductor in which an insulating layer and a conductive pattern are alternately printed, and a conductive pattern of about half a turn is overlapped in a stacking direction while connecting end portions of the conductive pattern between the insulating layers to form a conductive pattern. 2. The method for manufacturing a laminated inductor according to claim 1, wherein the conductor pattern is formed of a photosensitive conductor paste, and the end portions of the conductor pattern are respectively connected to the terminal electrodes.
【請求項2】 絶縁体層と導体パターンを交互に印刷し
て、絶縁体層間に約半ターンの導体パターンを端部を接
続しながら積層方向に重畳して周回する導体パターンを
形成する積層インダクタの製造方法において、感光性導
体ペーストを絶縁体層上に塗布し、乾燥し、露光および
現像によって約半ターンの導体パターンを形成し、導体
パターンの端部をそれぞれ端子電極に接続することを特
徴とする積層インダクタの製造方法。
2. A laminated inductor in which an insulating layer and a conductive pattern are alternately printed, and a conductive pattern of about a half turn is connected between the insulating layers to form a conductive pattern which is superposed in the stacking direction and circulates in the stacking direction. In the manufacturing method of 1., a photosensitive conductor paste is applied onto the insulator layer, dried, exposed and developed to form a conductor pattern of about half a turn, and the ends of the conductor pattern are connected to terminal electrodes, respectively. And method for manufacturing a laminated inductor.
【請求項3】 絶縁体層と導体パターンを交互に印刷し
て、絶縁体層間に約半ターンの導体パターンを端部を接
続しながら積層方向に重畳して周回する導体パターンを
形成する積層インダクタの製造方法において、導体パタ
ーンを感光性導体ペーストによって形成し、当該導体ペ
ーストを絶縁体ペーストと一体に焼成し、導体パターン
の端部をそれぞれ端子電極に接続することを特徴とする
積層インダクタの製造方法。
3. A laminated inductor in which an insulating layer and a conductive pattern are alternately printed, and a conductive pattern of about a half turn is overlapped in the stacking direction while forming a conductive pattern which is overlapped in the stacking direction while connecting end portions of the insulating layer. In the method for manufacturing a multilayer inductor according to claim 1, wherein the conductor pattern is formed of a photosensitive conductor paste, the conductor paste is integrally fired with the insulator paste, and the ends of the conductor pattern are respectively connected to terminal electrodes. Method.
【請求項4】 絶縁体層と導体パターンを交互に印刷し
て、絶縁体層間に約半ターンの導体パターンを端部を接
続しながら積層方向に重畳して周回する導体パターンを
形成する積層インダクタの製造方法において、感光性導
体ペーストを絶縁体層上に塗布し、乾燥し、露光および
現像によって約半ターンの導体パターンを形成し、その
導体パターンの端部を除く部分に絶縁体ペーストを塗布
して乾燥し、その絶縁体ペースト上に感光性導体ペース
トを塗布し、乾燥し、露光および現像によって前の約半
ターンの導体パターンに接続された約半ターンの導体パ
ターンを形成し、更に絶縁体ペーストと導体ペーストと
を積層して所定のターン数の導体パターンを形成するこ
とを特徴とする積層インダクタの製造方法。
4. A laminated inductor in which an insulating layer and a conductive pattern are alternately printed, and a conductive pattern of about half a turn is overlapped in the stacking direction while forming a conductive pattern which is overlapped in the stacking direction while connecting end portions of the conductive pattern between the insulating layers. In the manufacturing method of 1., a photosensitive conductor paste is applied onto the insulator layer, dried, and exposed and developed to form a conductor pattern of about half a turn, and the insulator paste is applied to a portion of the conductor pattern excluding the end portion. Then, apply a photosensitive conductor paste on the insulator paste, dry it, and form a half-turn conductor pattern connected to the previous half-turn conductor pattern by exposure and development, and further insulate A method for manufacturing a laminated inductor, comprising: stacking a body paste and a conductor paste to form a conductor pattern having a predetermined number of turns.
【請求項5】 絶縁体層を積層体の半分より僅かに広い
面積に形成して、約半ターンの導体パターンの端部を露
出させる請求項4記載の積層インダクタの製造方法。
5. The method for manufacturing a laminated inductor according to claim 4, wherein the insulating layer is formed in an area slightly larger than half of the laminated body to expose an end portion of the conductor pattern of about half a turn.
JP16713295A 1995-06-09 1995-06-09 Manufacture of laminated inductor Pending JPH08339934A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16713295A JPH08339934A (en) 1995-06-09 1995-06-09 Manufacture of laminated inductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16713295A JPH08339934A (en) 1995-06-09 1995-06-09 Manufacture of laminated inductor

Publications (1)

Publication Number Publication Date
JPH08339934A true JPH08339934A (en) 1996-12-24

Family

ID=15844029

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16713295A Pending JPH08339934A (en) 1995-06-09 1995-06-09 Manufacture of laminated inductor

Country Status (1)

Country Link
JP (1) JPH08339934A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1120796A2 (en) * 2000-01-26 2001-08-01 TDK Corporation Electronic component and manufacturing method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1120796A2 (en) * 2000-01-26 2001-08-01 TDK Corporation Electronic component and manufacturing method thereof
EP1120796A3 (en) * 2000-01-26 2004-02-04 TDK Corporation Electronic component and manufacturing method thereof

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